Abstract: Embodiments of the present disclosure are directed towards an inductor structure having one or more strips of conductive material disposed around a core. The strips may have contacts at a first end and a second end of the strips, and may be disposed around the core with a gap between the contacts. The inductor structure may be mounted on a surface of a substrate, and one or more traces may be formed in the surface of the substrate to electrically couple two or more of the strips of conductive material to one another to form inductive coils. Other embodiments may be described and/or claimed.

Abstract: This disclosure relates generally to a chip package assembly arranged to be electrically coupled to a circuit board including a plurality of circuit board contacts. The chip package assembly may include a chip package including a first side and a second side, the second side including a first plurality of contacts arranged to be electrically coupled to the plurality of circuit board contacts and a second plurality of contacts arranged to be electrically coupled to a remote device via a connector assembly.

Abstract: Embodiments of the present disclosure are directed towards an inductor structure having one or more strips of conductive material disposed around a core. The strips may have contacts at a first end and a second end of the strips, and may be disposed around the core with a gap between the contacts. The inductor structure may be mounted on a surface of a substrate, and one or more traces may be formed in the surface of the substrate to electrically couple two or more of the strips of conductive material to one another to form inductive coils. Other embodiments may be described and/or claimed.

Abstract: This disclosure relates generally to a chip package assembly arranged to be electrically coupled to a circuit board including a plurality of circuit board contacts. The chip package assembly may include a chip package including a first side and a second side, the second side including a first plurality of contacts arranged to be electrically coupled to the plurality of circuit board contacts and a second plurality of contacts arranged to be electrically coupled to a remote device via a connector assembly.

Abstract: Embodiments of the present disclosure are directed towards an inductor structure having one or more strips of conductive material disposed around a core. The strips may have contacts at a first end and a second end of the strips, and may be disposed around the core with a gap between the contacts. The inductor structure may be mounted on a surface of a substrate, and one or more traces may be formed in the surface of the substrate to electrically couple two or more of the strips of conductive material to one another to form inductive coils. Other embodiments may be described and/or claimed.

Abstract: An integrated circuit package includes a first capacitor supported by a surface of a substrate, and a second capacitor supported by the surface of the substrate. The first capacitor is within a die shadow region, and the second capacitor lies outside of the die shadow region.

Abstract: An integrated circuit package includes a first capacitor supported by a surface of a substrate, and a second capacitor supported by the surface of the substrate. The first capacitor is within a die shadow region, and the second capacitor lies outside of the die shadow region.

Abstract: An integrated circuit package includes a first capacitor supported by a surface of a substrate, and a second capacitor supported by the surface of the substrate. The first capacitor is within a die shadow region, and the second capacitor lies outside of the die shadow region.

Abstract: A electrical interface for an electronic package, using lands on the package which are non-planar with metal layers within the package. This non-planar or tilted land grid array (TLGA) package is assembled with a complementary TLGA socket to make electronic connection to the package.

Abstract: A grounded conductive plate in a land grid array package assembly includes a plurality of openings. The openings allow contacts from the socket to pass through to contact a package. The diameter of each opening is customizable to produce desired impedance between the contacts and the conductive plate. Impedance discontinuity seen by signals passing through the socket may be reduced.

Abstract: A fabrication method and semiconductor package provide enhanced performance. The semiconductor package includes a semiconductor die having an integrated circuit (IC), and a substrate having a die side coupled to the IC. A plurality of multi-signal bus bars is coupled to a socket side of the substrate such that the bus bars enable I/O signals to be transported between the substrate and a socket.

Abstract: A socket cover with a recessed center, method for using such a socket cover and system using such a socket cover are described herein.

Abstract: A fabrication method and semiconductor package provide enhanced performance. The semiconductor package includes a semiconductor die having an integrated circuit (IC), and a substrate having a die side coupled to the IC. A plurality of multi-signal bus bars is coupled to a socket side of the substrate such that the bus bars enable I/O signals to be transported between the substrate and a socket.

Abstract: A fabrication method and semiconductor package provide enhanced performance. The semiconductor package includes a semiconductor die having an integrated circuit (IC), and a substrate having a die side coupled to the IC. A plurality of multi-signal bus bars is coupled to a socket side of the substrate such that the bus bars enable I/O signals to be transported between the substrate and a socket.

Abstract: A chip interface assembly and method of assembling a chip interface provide enhanced performance. The chip interface assembly includes a semiconductor package and a socket. The semiconductor package has a female contact architecture, where the female contact architecture is mated with a male contact architecture of the socket. By reversing the traditional male/female arrangement of conventional interconnection interfaces, difficulties associated with signaling throughput, clearance, hardware complexity and electrical losses can be obviated.

Abstract: A chip interface assembly and method of assembling a chip interface provide enhanced performance. The chip interface assembly includes a semiconductor package and a socket. The semiconductor package has a female contact architecture, where the female contact architecture is mated with a male contact architecture of the socket. By reversing the traditional male/female arrangement of conventional interconnection interfaces, difficulties associated with signaling throughput, clearance, hardware complexity and electrical losses can be obviated.

Abstract: A fabrication method and semiconductor package provide enhanced performance. The semiconductor package includes a semiconductor die having an integrated circuit (IC), and a substrate having a die side coupled to the IC. A plurality of multi-signal bus bars is coupled to a socket side of the substrate such that the bus bars enable I/O signals to be transported between the substrate and a socket.

Abstract: A method and apparatus for a conductive plate for a socket. The conductive plate includes a plurality of openings. The conductive plate is electrically connected to ground and is contained within a socket that may receive an electronic package. The openings allow pins from the electronic package to pass through to contacts in the socket. The diameter of each opening is customizable to produce desired impedance between the electronic package pin inserted in the contact and the conductive plate. Impedance discontinuity seen by signals passing through the socket from the electronic package pins is reduced. The electronic plate may contain one or more pins insertable into contacts in the socket where the contacts provide the electrical connection to ground.

Abstract: A chip interface assembly and method of assembling a chip interface provide enhanced performance. The chip interface assembly includes a semiconductor package and a socket. The semiconductor package has a female contact architecture, where the female contact architecture is mated with a male contact architecture of the socket. By reversing the traditional male/female arrangement of conventional interconnection interfaces, difficulties associated with signaling throughput, clearance, hardware complexity and electrical losses can be obviated.

Abstract: A method and apparatus for a conductive plate for a socket. The conductive plate includes a plurality of openings. The conductive plate is electrically connected to ground and is contained within a socket that may receive an electronic package. The openings allow pins from the electronic package to pass through to contacts in the socket. The diameter of each opening is customizable to produce desired impedance between the electronic package pin inserted in the contact and the conductive plate. Impedance discontinuity seen by signals passing through the socket from the electronic package pins is reduced. The electronic plate may contain one or more pins insertable into contacts in the socket where the contacts provide the electrical connection to ground.