Patents by Inventor Brett A. Smith

Brett A. Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110026324
    Abstract: The invention provides methods for programming a floating gate. A floating gate tunneling device is used with an analog comparing device in a circuit having a floating reference node and an offset-mitigating feedback loop for iteratively programming a floating gate, or multiple floating gates.
    Type: Application
    Filed: October 11, 2010
    Publication date: February 3, 2011
    Inventors: Ross E. Teggatz, Wayne T. Chen, Brett Smith, Eric Blackall
  • Publication number: 20110006742
    Abstract: The invention provides control methods and systems for harvesting energy from a variable-output power apparatus. One or more variable-output power elements configured for producing energy are used as input to a power regulation circuit operably coupled between the power elements and a load. One or more power signals in the circuit are monitored and the power regulation circuit output is dynamically adjusted based on the one or more monitored power signals. According to aspects of the invention, the output duty cycle or frequency may be adjusted in response to monitored parameters.
    Type: Application
    Filed: July 11, 2010
    Publication date: January 13, 2011
    Applicant: TRIUNE IP LLC
    Inventors: Ross Teggatz, Wayne Chen, Amer Atrash, Brett Smith, Eric Blackall
  • Patent number: 7859911
    Abstract: The invention provides circuits and systems for programming a floating gate. A floating gate tunneling device is used with an analog comparing device in a circuit having a floating reference node and an offset-mitigating feedback loop for iteratively programming a floating gate, or multiple floating gates.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: December 28, 2010
    Assignee: Triune IP LLC
    Inventors: Ross E. Teggatz, Wayne T. Chen, Brett Smith, Eric Blackall
  • Publication number: 20100315158
    Abstract: The disclosed invention provides apparatus and methods for dynamic biasing in electronic systems and circuits. The apparatus and methods disclosed provide non-linear biasing responsive to monitored load conditions.
    Type: Application
    Filed: June 13, 2010
    Publication date: December 16, 2010
    Applicant: TRIUNE IP LLC
    Inventors: Amer Atrash, Ross Teggatz, Brett Smith
  • Publication number: 20100315121
    Abstract: A system for receiving data is provided. The system includes an inductive data device, such as a device that receives high-speed data over an inductive coupling. An adjustable impedance is coupled to the inductive data device, where the adjustable impedance is used for dynamically controlling ringing in the inductive data device, such as by damping ringing signals generated by circuit inductances or capacitances.
    Type: Application
    Filed: June 10, 2010
    Publication date: December 16, 2010
    Inventors: Amer Atrash, Ross Teggatz, Brett Smith, Wayne Chen
  • Publication number: 20100259225
    Abstract: Advances in the arts are disclosed with novel methods and circuit systems for controlling power in an energy harvesting system. Techniques and related systems for controlling power output of an energy harvesting device provide for monitoring at least one power parameter at a power source and monitoring at least one power parameter at a load such as a storage medium. The power source output is adjusted in order to optimize energy harvesting and/or storage based on real-time performance parameters.
    Type: Application
    Filed: April 10, 2010
    Publication date: October 14, 2010
    Applicant: TRIUNE IP LLC
    Inventors: Ross E. Teggatz, Wayne T. Chen, Brett Smith
  • Publication number: 20100230784
    Abstract: The invention provides advances in the arts with useful and novel integrated packaging having passive components included within packages also containing one or more ICs. The integrated passive components may include inductors, transformers, and capacitors, and are preferably constructed of leadframe materials. Typically, one or more magnetic field storage body is used in forming the coils in order to enhance the electrical performance characteristics of the passive component.
    Type: Application
    Filed: March 16, 2010
    Publication date: September 16, 2010
    Applicant: TRIUNE IP LLC
    Inventors: Ross E. Teggatz, Wayne T. Chen, Brett Smith
  • Publication number: 20100213949
    Abstract: Disclosed are advances in the arts with novel methods and apparatus for detecting faulty connections in an electrical system. Exemplary preferred embodiments include basic, ASIC, AC, DC, and RF monitoring techniques and systems for monitoring signals at one or more device loads and analyzing the monitored signals for determining fault conditions at the device loads and/or at the main transmission lines. The invention preferably provides the capability to test and monitor electrical interconnections without fully activating the host system.
    Type: Application
    Filed: February 22, 2010
    Publication date: August 26, 2010
    Applicant: TRIUNE IP LLC
    Inventors: Ross E. Teggatz, Wayne T. Chen, Brett Smith
  • Patent number: 7697150
    Abstract: Representative embodiments provide for a security lock apparatus configured to securely couple a sheet handling device in cooperative relationship with an imaging device in response to a first predefined user action, the security lock apparatus further configured to de-couple the sheet handling device from the imaging device in response to a second predefined user action, wherein the security lock apparatus is further configured to be inoperable by unauthorized personnel. The present invention provides a method including supporting a security lock apparatus with an imaging device, performing an authorized predefined locking action coupled to the security lock apparatus, and securely coupling the sheet handling device in cooperative relationship with the imaging device using the lock apparatus in response to the performing the authorized locking action.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: April 13, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Brett Smith, Andrew Alegria
  • Publication number: 20100027343
    Abstract: The invention provides circuits, systems, and methods for monitoring a non-volatile memory (NVM) cell, or an array of NVM cells. The monitor is capable of switching from a normal operating state to an evaluation state, monitoring for one or more particular characteristics, and returning to the normal operating state. Alternative embodiments of the invention are disclosed using various triggers and producing outputs capable of reporting or feeding back to influence the operation of the monitoring systems and methods, the NVM circuitry, or an external system. The invention includes an energy conservation feature, in that no power is consumed in the normal operating state, and low power in the evaluation state.
    Type: Application
    Filed: June 25, 2009
    Publication date: February 4, 2010
    Inventors: Ross E. Teggatz, Wayne T. Chen, Brett Smith
  • Publication number: 20100014203
    Abstract: Systems, circuits, and methods are described for providing efficient, monitoring capabilities for providing output reactive to monitored conditions. According to the disclosed methods, steps are included for providing a floating gate monitoring circuit in association with a monitored circuit and programming the floating gate to a selected charge level. The programmed floating gate charge level is then compared with a signal level in a monitored circuit. In an additional step, selected comparison criteria are used for selectably activating output. Exemplary embodiments of methods and associated circuits and systems employing the methods are also disclosed, in which protection for a monitored circuit is provided in the event of undervoltage, undercurrent, overvoltage, or undervoltage.
    Type: Application
    Filed: January 30, 2009
    Publication date: January 21, 2010
    Inventors: Ross E. Teggatz, Wayne T. Chen, Brett Smith
  • Publication number: 20100014348
    Abstract: The invention provides circuits, systems, and methods for programming a floating gate. A floating gate tunneling device is used with an analog comparing device in a circuit having a floating reference node and an offset-mitigating feedback loop for iteratively programming a floating gate, or multiple floating gates.
    Type: Application
    Filed: January 30, 2009
    Publication date: January 21, 2010
    Inventors: Ross E. Teggatz, Wayne T. Chen, Brett Smith, Eric Blackall
  • Publication number: 20090189669
    Abstract: Methods and apparatus to reduce propagation delay of circuits are disclosed. A disclosed apparatus to reduce propagation delay of a circuit comprises a level shifter to selectively turn a first circuit on and off; a first switch to couple the first circuit to a second circuit when the first circuit is on, wherein the second circuit is to selectively receive a first current from the first circuit based on a signal the second circuit receives from the level shifter; and a second switch to couple the first circuit to a reference signal based on the first current, the second switch causing the first circuit to start to turn off.
    Type: Application
    Filed: January 29, 2008
    Publication date: July 30, 2009
    Inventors: Kee Chee Tiew, Brett Smith, Abidur Rahman
  • Patent number: 7560972
    Abstract: Methods and apparatus to reduce propagation delay of circuits are disclosed. A disclosed apparatus to reduce propagation delay of a circuit comprises a level shifter to selectively turn a first circuit on and off; a first switch to couple the first circuit to a second circuit when the first circuit is on, wherein the second circuit is to selectively receive a first current from the first circuit based on a signal the second circuit receives from the level shifter; and a second switch to couple the first circuit to a reference signal based on the first current, the second switch causing the first circuit to start to turn off.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: July 14, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Kee Chee Tiew, Brett Smith, Abidur Rahman
  • Patent number: 7511527
    Abstract: Methods and apparatus to test power transistors of integrated circuits on a wafer are disclosed. An example method comprises measuring a drain-source on resistance of a first transistor, measuring a drain-source on resistance of a second transistor, computing a scaling ratio between the transistors based on the drain-source on resistances of the transistors, measuring a first current indicative of an over-current condition of the first transistor, and computing a second current of the second transistor based on the current of the second transistor and the scaling ratio.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: March 31, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Kee Chee Tiew, Brett Smith
  • Patent number: 7352161
    Abstract: System and method for a burst-mode switching voltage regulator with good stability and small output voltage ripple. A preferred embodiment comprises a current sense circuit coupled to a power switch in the burst-mode switching voltage regulator to sense a current flowing through the power switch. The sensed current can then be used (in conjunction with a feedback control signal that is based on the output voltage and is generated at the output of the burst-mode switching generator) to control the operation of the power switch to regulate the output voltage of the burst-mode switching voltage regulator. This enables the use of an output regulator with a small equivalent series resistance to minimize voltage ripple while providing good operational stability and fast transient response.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: April 1, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Kee-Cheo Tiew, Jingwel Xu, Brett Smith
  • Publication number: 20070080708
    Abstract: The H-bridge circuit with shoot through current prevention during power-up includes: a high side transistor; a low side transistor coupled in series with the high side transistor; pull down devices coupled to a control node of the high side transistor and to a control node of the low side transistor; and wherein the pull down devices are controlled by a pull down circuit including a Power On Reset circuit, monitoring the digital power supply such that the high side and low side transistors are OFF until the digital power supply has settled to a desired operating voltage.
    Type: Application
    Filed: September 29, 2005
    Publication date: April 12, 2007
    Inventors: Shanmuganand Chellamuthu, Brett Smith, Thomas Schmidt, Abidur Rahman
  • Publication number: 20070019450
    Abstract: A system and method is provided for regulating an output current in a switching supply circuit. In one embodiment, a switching supply circuit comprises a high-side field-effect transistor (FET), a low-side FET, and a driver control circuit operative to switch the high-side FET and the low-side FET between opposing “ON” and “OFF” states. The system further comprises a simulated output generator that is operative to combine both a first output waveform associated with the high-side FET and a second output waveform associated with the low-side FET to generate a simulated output signal that is a substantial representation of an output signal of the switching supply circuit, the simulated output signal being provided as a feedback to the driver control circuit.
    Type: Application
    Filed: July 13, 2005
    Publication date: January 25, 2007
    Inventors: Kee-Chee Tiew, Jingwei Xu, Brett Smith
  • Publication number: 20060222034
    Abstract: A high pulse repetition rate gas discharge laser system pulse power system magnetic reactor may comprise a housing comprising a core containing compartment between an inner wall of the housing, an outer wall and a bottom wall of the housing; a cooling mechanism operative to withdraw heat from the at least one of the inner wall, outer wall and bottom of the housing; at least one two magnetic cores contained within the core containing compartment; a cooling fin disposed between each of the at least two magnetic cores; and a thermal conductivity enhancement mechanism intermediate at least one of each respective cooling fin and each respective core and a respective one of the inner wall, the outer wall or the bottom wall, the thermal conductivity enhancement mechanism comprising a band comprising a plurality of torsion spring or leaf spring elements.
    Type: Application
    Filed: March 31, 2005
    Publication date: October 5, 2006
    Applicant: Cymer, Inc.
    Inventors: Richard Ujazdowski, Richard Ness, J. Algots, Vladimir Fleurov, Frederick Palenschat, Walter Gillespie, Bryan Moosman, Thomas Steiger, Brett Smith, Thomas McKelvey
  • Patent number: 7069462
    Abstract: Scheduling operation modes of a managed device. A method embodiment of the present invention includes providing a device remote from the managed device with an interface enabling selection of options for scheduling the occurrence of operation modes for the managed device. Options selected through the interface are received from the remote device. The occurrence of operation modes of the managed device are then scheduled according to received options.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: June 27, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kevin A. Owen, Andrew Alegria, Brett Smith