Abstract: A method of controlling monitoring of a vacuum system, the vacuum system, and the monitoring control system are disclosed. The method comprises: selecting at least one of a plurality of processes for monitoring the vacuum system from a data store storing the plurality of processes. Executing the at least one selected process Wherein one of the at least one selected processes comprises a process for monitoring a parameter of the vacuum system and for responding to changes in the parameter to trigger at least one of: execution of a further one of the plurality of processes; output of an alarm or notification signal; and output of a control signal for controlling operation of at least one component of the vacuum system.

Abstract: A device has a digital-to-analog converter to convert waveform data into analog waveforms, a waveform memory to store stored waveform data, an external waveform interface to receive real-time waveform data from an external device, a waveform multiplexer connected to the digital-to-analog converter to select between the first memory and the external waveform interface, a sequencer to receive and execute instructions to identify and access waveform data to drive the digital-to-analog converter, a sequencer instruction memory to provide stored instructions to the sequencer, an external instruction interface to receive real-time instructions for the sequencer, and a sequencer multiplexer to select between the sequencer instruction memory and the external instruction interface connected to the sequencer.

Abstract: An arbitrary waveform generator including a first processor configured to output first digital data, a second processor configured to output second digital data, a first digital-to-analog converter to receive the first digital data from the first processor and output a first analog signal representing the first digital data, a second digital-to-analog converter to receive the second digital data from the second processor and output a second analog signal representing the second digital data, a system phase detector to receive the first analog signal and the second analog signal and determine a phase difference between the first analog signal and the second analog signal, and a controller configured to receive the phase difference from the system phase detector and determine a delay time for the first processor to delay an output of third digital data based on the phase difference.

Abstract: An arbitrary waveform generator including a first processor configured to output first digital data, a second processor configured to output second digital data, a first digital-to-analog converter to receive the first digital data from the first processor and output a first analog signal representing the first digital data, a second digital-to-analog converter to receive the second digital data from the second processor and output a second analog signal representing the second digital data, a system phase detector to receive the first analog signal and the second analog signal and determine a phase difference between the first analog signal and the second analog signal, and a controller configured to receive the phase difference from the system phase detector and determine a delay time for the first processor to delay an output of third digital data based on the phase difference.

Abstract: A device has a digital-to-analog converter to convert waveform data into analog waveforms, a waveform memory to store stored waveform data, an external waveform interface to receive real-time waveform data from an external device, a waveform multiplexer connected to the digital-to-analog converter to select between the first memory and the external waveform interface, a sequencer to receive and execute instructions to identify and access waveform data to drive the digital-to-analog converter, a sequencer instruction memory to provide stored instructions to the sequencer, an external instruction interface to receive real-time instructions for the sequencer, and a sequencer multiplexer to select between the sequencer instruction memory and the external instruction interface connected to the sequencer.

Abstract: A process equipment heating system has a group of electric heaters and a heater checking system. The heater checking system is configured to determine a resistance value R1 for the group of electric heaters, compare the resistance value R1 with a reference resistance value RR and judge a fault condition if the resistance value R1 differs from the reference resistance value RR by more than a predetermined amount.

Abstract: A device includes at least two digital-to-analog converters, each digital-to-analog converter having a digital-to-analog converter clock modulator, a system reference clock modulator, and a phase detector to track the phases of the clock and the system reference clock. A method of calibrating a phase detector includes providing a pulse waveform, aligning a phase of a digital-to-analog clock to a phase of an internal system reference clock, aligning a phase of a modulated system reference clock with a phase of a modulated, divided, digital-to-analog clock, storing the aligned phase of the modulated system reference clock as a calibration value, synchronizing the digital-to-analog converters and adjusting the phase of the digital-to-analog converters to a center of a desired phase, and storing the aligned phase of the digital-to-analog converters as a calibration value.

Abstract: A process equipment heating system has a group of electric heaters and a heater checking system. The heater checking system is configured to determine a resistance value R1 for the group of electric heaters, compare the resistance value R1 with a reference resistance value RR and judge a fault condition if the resistance value R1 differs from the reference resistance value RR by more than a predetermined amount.