Patents by Inventor Brian A. Leete

Brian A. Leete has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10349354
    Abstract: An apparatus of a Bluetooth low energy (BLE) device is provided for decreasing awake time of a host by receiving and processing peripheral data along a sideband channel and waking the host upon an event of interest, the apparatus comprising circuitry configured to receive BLE GATT data from a BLE core along a sideband channel, process the BLE GATT data, monitor processed BLE GATT data for an event of interest, and send a notification of a detection of the event of interest to the host.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: July 9, 2019
    Assignee: Intel IP Corporation
    Inventors: Eduard Kvetny, Olga Adamovsky, Remi Laudebat, Brian Leete
  • Publication number: 20180132180
    Abstract: An apparatus of a Bluetooth low energy (BLE) device is provided for decreasing awake time of a host by receiving and processing peripheral data along a sideband channel and waking the host upon an event of interest, the apparatus comprising circuitry configured to receive BLE GATT data from a BLE core along a sideband channel, process the BLE GATT data, monitor processed BLE GATT data for an event of interest, and send a notification of a detection of the event of interest to the host.
    Type: Application
    Filed: July 11, 2017
    Publication date: May 10, 2018
    Applicant: Intel Corporation
    Inventors: Eduard Kvetny, Olga Adamovsky, Remi Laudebat, Brian Leete
  • Patent number: 9706493
    Abstract: An apparatus of a Bluetooth low energy (BLE) device is provided for decreasing awake time of a host by receiving and processing peripheral data along a sideband channel and waking the host upon an event of interest, the apparatus comprising circuitry configured to receive BLE GATT data from a BLE core along a sideband channel, process the BLE GATT data, monitor processed BLE GATT data for an event of interest, and send a notification of a detection of the event of interest to the host.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: July 11, 2017
    Assignee: Intel IP Corporation
    Inventors: Eduard Kvetny, Olga Adamovsky, Remi Laudebat, Brian Leete
  • Patent number: 9634496
    Abstract: Techniques for powering up a wireless power receiving device are described herein. An example computing device includes a power receiving unit to wirelessly receive power from a power transmitting unit. The platform hardware includes a System on a Chip (SoC), a multicomm device, and a power sequence manager. The multicomm device is for wireless communication with two or more communication standards. One of the communication standards is used as a side channel for communicating with the power transmitting unit. The power sequence manager component manages activation of platform components of the platform hardware during a low battery cold boot condition. Upon detecting wireless power, the multicomm device is configured to automatically activate and the power sequence manager component is to suppress activation of other platform components of the platform hardware.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: April 25, 2017
    Assignee: Intel IP Corporation
    Inventors: Yuval Elad, Shahar Porat, Zeev Oster, Siva Ramakrishnan, Reed D. Vilhauer, Brian A. Leete, Yuval Bachrach
  • Publication number: 20170090537
    Abstract: Techniques for powering up a wireless power receiving device are described herein. An example computing device includes a power receiving unit to wirelessly receive power from a power transmitting unit. The platform hardware includes a System on a Chip (SoC), a multicomm device, and a power sequence manager. The multicomm device is for wireless communication with two or more communication standards. One of the communication standards is used as a side channel for communicating with the power transmitting unit. The power sequence manager component manages activation of platform components of the platform hardware during a low battery cold boot condition. Upon detecting wireless power, the multicomm device is configured to automatically activate and the power sequence manager component is to suppress activation of other platform components of the platform hardware.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Applicant: INTEL IP CORPORATION
    Inventors: Yuval Elad, Shahar Porat, Zeev Oster, Siva Ramakrishnan, Reed D. Vilhauer, Brian A. Leete, Yuval Bachrach
  • Publication number: 20160381637
    Abstract: An apparatus of a Bluetooth low energy (BLE) device is provided for decreasing awake time of a host by receiving and processing peripheral data along a sideband channel and waking the host upon an event of interest, the apparatus comprising circuitry configured to receive BLE GATT data from a BLE core along a sideband channel, process the BLE GATT data, monitor processed BLE GATT data for an event of interest, and send a notification of a detection of the event of interest to the host.
    Type: Application
    Filed: June 26, 2015
    Publication date: December 29, 2016
    Applicant: Intel IP Corporation
    Inventors: Eduard Kvetny, Olga Adamovsky, Remi Laudebat, Brian Leete
  • Patent number: 7836339
    Abstract: According to an embodiment of the invention, a method and apparatus for computer memory power backup are described. According to one embodiment, a memory system includes a first memory; a second memory coupled to the first memory and to a host, the second memory to transfer data between the first memory and the host; and a backup power source, the backup power source providing power to the first memory and the second memory if a main power source fails.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: November 16, 2010
    Assignee: Intel Corporation
    Inventors: Brian A. Leete, Carl I. Green
  • Patent number: 7769947
    Abstract: Disclosed herein are methods that may be implemented in a mobile computer system. An exemplary method may include initiating a split of a storage volume of the mobile computer system. The storage volume may comply with a fault tolerant storage technology. Suitable technologies include, but are not limited to, those based on Redundant Array of Independent (or Inexpensive) Disks (RAID). In one aspect, the initiation of the split of the storage volume may be based, at least in part, on power availability. Then, a reduction of a power consuming state of a first storage device of the volume may be initiated.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: August 3, 2010
    Assignee: Intel Corporation
    Inventors: Sriram Ranganathan, Brian A. Leete, Francis Corrado
  • Publication number: 20090006745
    Abstract: Methods and apparatus relating to accessing snapshot data image of a data mirroring volume are described. In one embodiment, a host computer is allowed to access a first data volume and a second data volume. The second data volume may comprise data corresponding to a snapshot image of the first data volume prior to a suspension of data mirroring. Other embodiments are also disclosed.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 1, 2009
    Inventors: Joseph S. Cavallo, Brian Leete
  • Publication number: 20090006744
    Abstract: Methods and apparatus relating to automated intermittent data mirroring volumes are described. In one embodiment, data mirroring may be suspended in response to occurrence of a scheduled or predefined event. Other embodiments are also disclosed.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 1, 2009
    Inventors: Joseph S. Cavallo, Brian Leete
  • Patent number: 7334082
    Abstract: A method and system to detect an occurrence of a predetermined event within the system, and change a power state of a hard drive (HD) in response to the event, are described. In one embodiment, in response to detecting consecutive HD reads have been satisfied by a non-volatile cache (NVC) of the HD, for at least a predetermined period of time, or detecting that a predetermined quantity of consecutive HD reads have been satisfied by the NVC, spinning down the HD. In an alternative embodiment, in response to detecting a predetermined number of HD data transactions have been serviced by the NVC or the HD, canceling a planned spinning down of the HD or spinning up the HD.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: February 19, 2008
    Assignee: Intel Corporation
    Inventors: Andrew S. Grover, Guy Therien, Brian A. Leete
  • Publication number: 20080034106
    Abstract: Methods and apparatus to provide reduced power consumption for bulk data transfers are described. In some embodiments, a query regarding data to be read on a bulk endpoint of a communication device is transmitted on an interrupt endpoint of the communication device. Other embodiments are also described and claimed.
    Type: Application
    Filed: August 2, 2006
    Publication date: February 7, 2008
    Inventors: Sanjay Bakshi, Carol Bell, Krishnan Rajamani, Brian Leete
  • Patent number: 7266621
    Abstract: A device is presented including a host controller. A host controller driver is connected to the host controller. The host controller arranges queue element transfer descriptors (qTDs) in a circularly linked order. Also presented is a method including determining whether execution of a first queue element transfer descriptor (qTD) in a first bank including many qTDs results in a short packet condition. Following an alternate pointer in the first bank that points to a second bank if execution of the first qTD resulted in the short packet condition. Following a next pointer to a second qTD in the first bank if the execution of the first qTD completed normally. Also executing the second qTD in the first bank. The qTDs in the first bank and the second bank are circularly linked.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: September 4, 2007
    Assignee: Intel Corporation
    Inventor: Brian A. Leete
  • Patent number: 7233880
    Abstract: A temperature sensitive memory, such as a ferroelectric polymer memory, may be utilized as a disk cache memory in one embodiment. If the temperature begins to threaten shutdown, the memory may be transitioned from a write-back to a write-through cache memory. In such case, the system is ready for shutdown without the loss of critical data.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: June 19, 2007
    Assignee: Intel Corporation
    Inventors: Richard L. Coulson, Brian A. Leete
  • Publication number: 20070079067
    Abstract: Disclosed herein are methods that may be implemented in a mobile computer system. An exemplary method may include initiating a split of a storage volume of the mobile computer system. The storage volume may comply with a fault tolerant storage technology. Suitable technologies include, but are not limited to, those based on Redundant Array of Independent (or Inexpensive) Disks (RAID). In one aspect, the initiation of the split of the storage volume may be based, at least in part, on power availability. Then, a reduction of a power consuming state of a first storage device of the volume may be initiated.
    Type: Application
    Filed: September 30, 2005
    Publication date: April 5, 2007
    Inventors: Sriram Ranganathan, Brian Leete, Francis Corrado
  • Patent number: 7185120
    Abstract: A device is presented including a host controller capable of attaching a quantity of queue heads to a frame list. The quantity of queue heads are attached to the frame list before any transaction descriptors where split-isochronous transaction descriptors are supported.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: February 27, 2007
    Assignee: Intel Corporation
    Inventors: Brian A. Leete, John I. Garney
  • Publication number: 20060122805
    Abstract: A temperature sensitive memory, such as a ferro-electric polymer memory, may be utilized as a disk cache memory in one embodiment. If the temperature begins to threaten shutdown, the memory may be transitioned from a write-back to a write-through cache memory. In such case, the system is ready for shutdown without the loss of critical data.
    Type: Application
    Filed: January 24, 2006
    Publication date: June 8, 2006
    Inventors: Richard Coulson, Brian Leete
  • Patent number: 7028124
    Abstract: A method and apparatus for generating, initializing, and scheduling of two interrupt queue heads to represent a single endpoint are described. In an embodiment, a method includes generating primary and secondary interrupt queue heads to represent a single interrupt endpoint. The method further includes initializing the primary and secondary interrupt queue heads. The method also includes scheduling the primary and secondary queue heads in immediately subsequent frames.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: April 11, 2006
    Assignee: Intel Corporation
    Inventors: Brian A. Leete, John S. Howard, Brad W. Hosler
  • Patent number: 6957356
    Abstract: A device is presented including a host controller to generate a transaction schedule. The transaction schedule includes many transactions. The transactions are stored in many data structures. Each of the data structures contain initialized transactions or initialized and non-initialized transactions. The host controller executes the transactions that are initialized and the data structures each contain a pointer to the next initialized transaction.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: October 18, 2005
    Assignee: Intel Corporation
    Inventor: Brian A. Leete
  • Publication number: 20050154962
    Abstract: Method and system to spin up a hard disk prior to a data exchange request. In one embodiment, the occurrence of a predetermined event is detected. In response, the hard disk is activated prior to a request to exchange data with the hard disk. In one embodiment, the predetermined event is a cacche of the hard disk reaching a predetermined level of dirty data, the predetermined level being less than completely full. In an alternative embodiment, the predetermined event includes detecting a presence of a computer user.
    Type: Application
    Filed: December 30, 2003
    Publication date: July 14, 2005
    Inventors: Andrew Grover, Brian Leete