Patents by Inventor Brian Doyle

Brian Doyle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200005861
    Abstract: A MTJ device includes a free (storage) magnet and fixed (reference) magnet between first and second electrodes, and a programmable booster between the free magnet and one of the electrodes. The booster comprises a magnetic material layer. The booster may further comprise an interface layer that supports the formation of a skyrmion spin texture, or a stable ferromagnetic domain, within the magnetic material layer. A programming current between two circuit nodes may be employed to set a position of the skyrmion or magnetic domain within the magnetic material layer to be more proximal to, or more distal from, the free magnet. The position of the skyrmion or magnetic domain to the MTJ may modulate TMR ratio of the MTJ device. The TMR ratio modulation may be employed to discern more than two states of the MTJ device. Such a multi-level device may, for example, be employed to store 2 bits/cell.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 2, 2020
    Inventors: Kevin O'Brien, Brian Doyle, Kaan Oguz, Noriyuki Sato, Charles Kuo, Mark Doczy
  • Publication number: 20190304963
    Abstract: A backend electrostatic discharge (ESD) diode device structure is presented comprising: a first structure comprising a first material, wherein the first material includes metal; a second structure adjacent to the first structure, wherein the second structure comprises a second material, wherein the second material includes a semiconductor or an oxide; and a third structure adjacent to the second structure, wherein the third structure comprises of the first material, wherein the second structure is between the first and third structures. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 3, 2019
    Applicant: Intel Corporation
    Inventors: Prashant Majhi, Ilya Karpov, Brian Doyle, Ravi Pillarisetty, Abhishek Sharma
  • Publication number: 20190280188
    Abstract: An apparatus comprises a magnetic tunnel junction (MTJ) including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier between the free and fixed layers, the tunnel barrier directly contacting a first side of the free layer, a capping layer contacting the second side of the free magnetic layer and boron absorption layer positioned a fixed distance above the capping layer.
    Type: Application
    Filed: December 28, 2016
    Publication date: September 12, 2019
    Inventors: Justin BROCKMAN, Christopher WIEGAND, MD Tofizur RAHMAN, Daniel OUELETTE, Angeline SMITH, Juan ALZATE VINASCO, Charles KUO, Mark DOCZY, Kaan OGUZ, Kevin O'BRIEN, Brian DOYLE, Oleg GOLONZKA, Tahir GHANI
  • Patent number: 10347830
    Abstract: Some embodiments include apparatuses and methods having a memory element included in a non-volatile memory cell, a transistor, an access line coupled to a gate to the transistor, a first conductive line, and a second conductive line. The memory element can include a conductive oxide material located over a substrate and between the first and second conductive lines. The memory element includes a portion coupled to a drain of the transistor and another portion coupled to the second conductive line. The first conductive line is coupled to a source of the transistor and can be located between the access line and the memory element. The access line has a length extending in a first direction and can be located between the substrate and the memory element. The first and second conductive lines have lengths extending in a second direction.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: July 9, 2019
    Assignee: Intel Corporation
    Inventors: Sasikanth Manipatruni, Elijah Ilya Karpov, Brian Doyle, Dmitri E. Nikonov, Ian Young
  • Publication number: 20190189913
    Abstract: The present disclosure relates to the fabrication of spin transfer torque memory devices, wherein a magnetic tunnel junction of the spin transfer torque memory device is formed with Heusler alloys as the fixed and free magnetic layers and a tunnel barrier layer disposed between and abutting the fixed Heusler magnetic layer and the free Heusler magnetic layer, wherein the tunnel barrier layer is lattice matched to the free Heusler magnetic layer. In one embodiment, the tunnel barrier layer may be a strontium titanate layer.
    Type: Application
    Filed: September 27, 2016
    Publication date: June 20, 2019
    Applicant: Intel Corporation
    Inventors: Brian Doyle, Kaan Oguz, Satyarth Suri, Kevin O'Brien, Mark Doczy, Charles Kuo
  • Publication number: 20190173096
    Abstract: A solid oxide fuel cell capable of directly utilizing hydrocarbons as a fuel source at operating temperatures between 200° C. and 500° C. The anode, electrolyte, and cathode of the solid oxide fuel cell can include technologies for improved operation at temperatures between 200° C. and 500° C. The anode can include technologies for improved direct utilization of hydrocarbon fuel sources.
    Type: Application
    Filed: July 19, 2017
    Publication date: June 6, 2019
    Inventors: Meilin Liu, Ik Whang Chang, Yu Chen, Ben M. Deglee, Brian Doyle, Franklin Tao, Lei Zhang
  • Publication number: 20190061039
    Abstract: A welding-type system includes a power supply configured to control preheating of an electrode wire. A controller is configured to receive a plurality of power values corresponding to a power output of the power supply and calculate an arc power value corresponding to an arc condition at the preheated electrode wire based on a rate of change of the plurality of power values. A target power output value is determined based on the calculated arc power value, and the power output is adjusted based on the determined target power value.
    Type: Application
    Filed: August 30, 2017
    Publication date: February 28, 2019
    Inventors: Brian Doyle, Shuang Liu, Erik Miller, Adam E. Anders
  • Patent number: 10201081
    Abstract: A system comprises an article comprising one or more fabric layers, a plurality of electronic devices, each being incorporated into or onto one of the one or more fabric layers, and one or more communication links between two or more of the plurality of electronic devices. Each of the plurality of electronic devices can comprise a flexible substrate coupled to the fabric layer, one or more metallization layers deposited on the flexible substrate, and one or more electronic components electrically coupled to the one or more metallization layers.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: February 5, 2019
    Assignee: Intel Corporation
    Inventors: Christopher Jezewski, Ravi Pillarisetty, Brian Doyle
  • Patent number: 10162733
    Abstract: The present disclosure generally discloses a testing capability related to service testing in a communication network. The testing capability may be configured to support debugging of failures identified during service validation testing of a service in a communication network. The testing capability may be configured to support debugging of failures (e.g., transmission failures or the like) associated with a failed service validation test (e.g., a transmission verification test or the like). The testing capability may be configured to support debugging of failures identified during service validation testing of an Ethernet service. The testing capability may be configured to support debugging of failures (e.g., frame loss or the like) identified during service validation testing of an Ethernet service where the service validation testing of the Ethernet service is performed based on International Telecommunication Union (ITU)—Standardization (ITU-T) Y.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: December 25, 2018
    Assignee: Nokia of America Corporation
    Inventors: Hardeep Singh, Jayesh Patel, Brian Doyle
  • Publication number: 20180331281
    Abstract: Some embodiments include apparatuses and methods having a memory element included in a non-volatile memory cell, a transistor, an access line coupled to a gate to the transistor, a first conductive line, and a second conductive line. The memory element can include a conductive oxide material located over a substrate and between the first and second conductive lines. The memory element includes a portion coupled to a drain of the transistor and another portion coupled to the second conductive line. The first conductive line is coupled to a source of the transistor and can be located between the access line and the memory element. The access line has a length extending in a first direction and can be located between the substrate and the memory element. The first and second conductive lines have lengths extending in a second direction.
    Type: Application
    Filed: July 26, 2018
    Publication date: November 15, 2018
    Inventors: Sasikanth Manipatruni, Elijah Ilya Karpov, Brian Doyle, Dmitri E. Nikonov, Ian Young
  • Publication number: 20180323588
    Abstract: A cable stripping tool for use with electrical cables comprising an inner core and at least one outer sheath. The cable stripper includes a body including a cable retaining portion having a rotational axis defined therethrough. The cable retaining portion is configured to receive a cable such that its longitudinal axis is coaxial with the rotational axis. The cable stripper also includes first and second cutting blades movable transversely relative to the rotational axis between a retracted position and a cutting position, the cutting blades each having a blade edge. The blade edges of the first and second blades are axially spaced from each other relative to the rotational axis and are arranged such that in the cutting position the first cutting blade is spaced a first radial distance from the rotational axis and the second blade is spaced a second radial distance from the rotational axis that is greater than the first radial distance.
    Type: Application
    Filed: November 4, 2016
    Publication date: November 8, 2018
    Inventors: Steven John Blanks, Anthony Brian Doyle
  • Patent number: 10043971
    Abstract: Some embodiments include apparatuses and methods having a memory element included in a non-volatile memory cell, a transistor, an access line coupled to a gate to the transistor, a first conductive line, and a second conductive line. The memory element can include a conductive oxide material located over a substrate and between the first and second conductive lines. The memory element includes a portion coupled to a drain of the transistor and another portion coupled to the second conductive line. The first conductive line is coupled to a source of the transistor and can be located between the access line and the memory element. The access line has a length extending in a first direction and can be located between the substrate and the memory element. The first and second conductive lines have lengths extending in a second direction.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: August 7, 2018
    Assignee: Intel Corporation
    Inventors: Sasikanth Manipatruni, Elijah Ilya Karpov, Brian Doyle, Dmitri E. Nikonov, Ian Young
  • Publication number: 20180021888
    Abstract: Systems and methods of a laser welding device to weld aluminum are disclosed. The device includes a laser generator to generate welding-type lasing power and a lens to focus the welding-type lasing power at a focal point on an aluminum workpiece to generate a weld puddle. A laser scanner to control the lens to move the focal point of the welding-type lasing power in multiple dimensions over the aluminum workpiece during welding, the laser generator and the laser scanner to perform the welding without filler metal being added to the workpiece.
    Type: Application
    Filed: July 20, 2017
    Publication date: January 25, 2018
    Inventors: Shuang Liu, Erik Miller, Brian Doyle
  • Publication number: 20180021887
    Abstract: Systems and methods of a laser welding device are disclosed. The laser welding device includes a laser generator configured to generate welding-type lasing power. A lens focuses the welding-type lasing power at a focal point on a workpiece to generate a puddle during a welding-type operation. A wire feeder is configured to feed wire to the puddle generated by the laser generator. A laser scanner controls the lens to move the focal point of the welding-type lasing power in multiple dimensions over the workpiece during the welding-type operation. In some examples, the feed wire is used in an additive manufacturing process.
    Type: Application
    Filed: July 20, 2017
    Publication date: January 25, 2018
    Inventors: Shuang Liu, Erik Miller, Brian Doyle
  • Publication number: 20180004624
    Abstract: The present disclosure generally discloses a testing capability related to service testing in a communication network. The testing capability may be configured to support debugging of failures identified during service validation testing of a service in a communication network. The testing capability may be configured to support debugging of failures (e.g., transmission failures or the like) associated with a failed service validation test (e.g., a transmission verification test or the like). The testing capability may be configured to support debugging of failures identified during service validation testing of an Ethernet service. The testing capability may be configured to support debugging of failures (e.g., frame loss or the like) identified during service validation testing of an Ethernet service where the service validation testing of the Ethernet service is performed based on International Telecommunication Union (ITU)-Standardization (ITU-T) Y.
    Type: Application
    Filed: June 30, 2016
    Publication date: January 4, 2018
    Applicant: Alcatel-Lucent USA Inc.
    Inventors: Hardeep Singh, Jayesh Patel, Brian Doyle
  • Publication number: 20170347448
    Abstract: A system comprises an article comprising one or more fabric layers, a. plurality of electronic devices, each being incorporated into or onto one of the one or more fabric layers, and one or more communication links between two or more of the plurality of electronic devices. Each of the plurality of electronic devices can comprise a flexible substrate coupled to the fabric layer, one or more metallization layers deposited on the flexible substrate, and one or more electronic components electrically coupled to the one or more metallization layers.
    Type: Application
    Filed: August 14, 2017
    Publication date: November 30, 2017
    Inventors: Christopher Jezewski, Ravi Pillarisetty, Brian Doyle
  • Patent number: 9736936
    Abstract: A system comprises an article comprising one or more fabric layers, a plurality of electronic devices, each being incorporated into or onto one of the one or more fabric layers, and one or more communication links between two or more of the plurality of electronic devices. Each of the plurality of electronic devices can comprise a flexible substrate coupled to the fabric layer, one or more metallization layers deposited on the flexible substrate, and one or more electronic components electrically coupled to the one or more metallization layers.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: August 15, 2017
    Assignee: Intel Corporation
    Inventors: Christopher Jezewski, Ravi Pillarisetty, Brian Doyle
  • Patent number: 9705963
    Abstract: A method for evaluating an online entity presence includes receiving a set of social media information for at least one entity and calculating a social media measurement where the social media measurement is associated with the set of social media information. The method further includes receiving a set of online profile information for the at least one entity, the set of online profile information being associated with one or more non-social media online profiles, and calculating an online profile measurement wherein the online profile measurement is associated with the set of online profile information. The method further includes calculating a reach value, the reach value being associated with the social media measurement and the online profile measurement and providing a reach score to a user where the reach score associated with the reach value.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: July 11, 2017
    Assignee: Thomson Reuters Global Resources Unlimited Company
    Inventors: Jill Schornack, Eric Iverson, Brian Doyle, Aaron Hareid
  • Patent number: 9670675
    Abstract: The invention pertains to the field of construction of buildings and structures. The invention relates to alignment guides for constructing building components, namely walls, ceilings and floors to be used in buildings and structures. This invention also relates to kits of specific alignment guides and methods of using alignment guides.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: June 6, 2017
    Inventor: Brian Doyle
  • Patent number: 9548441
    Abstract: Magnetic tunnel junctions (MTJ) suitable for spin transfer torque memory (STTM) devices, include perpendicular magnetic layers and one or more anisotropy enhancing layer(s) separated from a free magnetic layer by a crystallization barrier layer. In embodiments, an anisotropy enhancing layer improves perpendicular orientation of the free magnetic layer while the crystallization barrier improves tunnel magnetoresistance (TMR) ratio with better alignment of crystalline texture of the free magnetic layer with that of a tunneling layer.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: January 17, 2017
    Assignee: Intel Corporation
    Inventors: Kaan Oguz, Mark L. Doczy, Brian Doyle, Uday Shah, David L. Kencke, Roksana Golizadeh Mojarad, Robert S. Chau