Patents by Inventor Brian J. Marley

Brian J. Marley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Transparently attached flash memory security
    Patent number: 10877673
    Abstract: An apparatus includes an interface circuit and a monitor circuit communicatively coupled to the interface circuit. The monitor circuit is configured to identify a command issued to a memory communicatively coupled to the monitor circuit through the interface circuit, determine whether the command is authorized, and, based on a determination that the command is not authorized, cancel the command.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: December 29, 2020
    Assignee: MICROCHIP TECHNOLOGY INCORPORATED
    Inventors: Brian J. Marley, Richard E. Wahler
  • Transparently Attached Flash Memory Security
    Publication number: 20190187922
    Abstract: An apparatus includes an interface circuit and a monitor circuit communicatively coupled to the interface circuit. The monitor circuit is configured to identify a command issued to a memory communicatively coupled to the monitor circuit through the interface circuit, determine whether the command is authorized, and, based on a determination that the command is not authorized, cancel the command.
    Type: Application
    Filed: December 13, 2018
    Publication date: June 20, 2019
    Applicant: Microchip Technology Incorporated
    Inventors: Brian J. Marley, Richard E. Wahler
  • Integrated circuit with multiple functions sharing multiple internal signal buses according to distributed bus access and control arbitration
    Patent number: 5774684
    Abstract: An integrated circuit (IC) includes multiple circuits and functions which share multiple internal signal buses, three physical and five logical, according to distributed bus access and control arbitration. The multiple internal signal buses are shared among three tiers of internal circuit functions: a central processing unit and a DMA controller; a DRAM controller and a bus interface unit; and peripheral interface circuits, such as PCMCIA and display controllers. Two of the physical buses correspond to two of the logical buses and are used for communications within the IC. The third physical bus corresponds to three of the logical buses and is used for communications between the IC and circuits external to the IC. Arbitration for accessing and controlling the various signal buses is distributed both within and among the three tiers of internal circuit functions.
    Type: Grant
    Filed: October 8, 1996
    Date of Patent: June 30, 1998
    Assignee: National Semiconductor Corporation
    Inventors: Ralph Warren Haines, Dan Craig O'Neill, Stephen C. Pries, William V. Miller, Kent B. Waterson, David S. Weinman, Michael J. Shay, Jianhua Helen Pang, Daniel R. Herrington, Brian J. Marley, John R. Gunther, Alexander Perez, James Andrew Colgan, Robert James Divivier