Abstract: An implementation of a system disclosed herein provides a method for managing data streams of sequential nature, wherein the method provides for determining that a sequence of incoming write commands are associated with an LBA range mapped to a source band and writing data of the incoming write commands to physical blocks of a destination band assigned to the LBA range of the source band such that the data of the incoming write commands is written according to a sequential order of data receipt and in a forward write direction to sequentially fill physically-consecutive blocks in the destination band.

Abstract: Systems and methods are disclosed for a seeding mechanism for error detection codes. An error detection code may be generated using specifically modified seed input and stored to data sectors not containing valid data. A data storage device may determine if read attempts are directed to an invalid sector by analysis of the stored error detection code. In some embodiments, an apparatus may determine a first error detection code stored to a target data storage sector does not match a second error detection code calculated for the target data storage sector, compare the first error detection code to a modified error code value to determine whether the target data storage sector contains valid data, and return an indication that the target data storage sector does not contain valid data when the error detection code matches the modified error code value.

Abstract: A data storage device includes one or more storage media that include multiple physical storage locations. The device also includes at least one cache memory having a logical space that includes a plurality of separately managed logical block address (LBA) ranges. Additionally, a controller is included in the device. The controller is configured to receive data extents addressed by a first LBA and a logical block count. The controller is also configured to identify at least one separately managed LBA range of the plurality of separately managed LBA ranges in the at least one cache memory based on LBAs associated with at least some of the received data extents. The controller stores the at least some of the received data extents in substantially monotonically increasing LBA order in at least one physical storage location, of the at least one cache memory, assigned to the identified at least one LBA range.

Abstract: Apparatus and method for managing a media cache of a data storage device. In some embodiments, a media cache master table is maintained in a memory as a data structure having a plurality of entries that describe data sets stored in a non-volatile media cache memory. A first timecode stamp value is written to respective first and second locations in the table at the commencement of a data transfer operation to transfer data associated with the plurality of entries in the table. The first location is updated with a new, second timecode stamp value responsive to detection of an error condition that interrupts the data transfer operation. An error recovery operation is subsequently performed responsive to a detected mismatch between the timecode stamp values in the first and second locations.

Abstract: A data storage device includes a storage tier and a storage controller operably coupled to the storage tier and configured to be communicatively coupled to a host device. The storage controller includes a first memory operably coupled to the storage controller and configured to store a superseding data structure. The storage controller further includes a second memory operably coupled to the storage controller and configured to store a forward map configured to map a plurality of logical block addresses to physical locations on the storage tier. The storage controller further includes a sifting module configured to sift the forward map based on data contained in the superseding data structure. The storage controller further includes a compression module configured to compress the forward map to generate a compressed forward map.

Abstract: The disclosure is related to systems and methods of managing data storage in a memory device. In a particular embodiment, a method is disclosed that includes receiving, in a data storage device, at least one data packet that has a size that is different from an allocated storage capacity of at least one physical destination location on a data storage medium in the data storage device for the at least one data packet. The method also includes storing the at least one received data packet in a non-volatile cache memory prior to transferring the at least one received data packet to the at least one physical destination location.

Abstract: Apparatus and method for managing a media cache of a data storage device. In some embodiments, a media cache master table is maintained in a memory as a data structure having a plurality of entries that describe data sets stored in a non-volatile media cache memory. A first timecode stamp value is written to respective first and second locations in the table at the commencement of a data transfer operation to transfer data associated with the plurality of entries in the table. The first location is updated with a new, second timecode stamp value responsive to detection of an error condition that interrupts the data transfer operation. An error recovery operation is subsequently performed responsive to a detected mismatch between the timecode stamp values in the first and second locations.

Abstract: An implementation of a system disclosed herein provides a method for managing data streams of sequential nature, wherein the method writes the sequential chunks (fragments) directly to an open band in the order these are received from the host and includes determining an end of the incoming data write request related to streaming data and in response to the determination of the end of the incoming data write request related to streaming data, copying remaining data from a current physical band mapped to logical block addresses LBAs related to the data write requests to the allocated (open) band.

Abstract: An implementation of a system disclosed herein provides a method for managing data streams of sequential nature, wherein the method writes the sequential chunks (fragments) directly to an open band in the order these are received from the host and includes determining an end of the incoming data write request related to streaming data and in response to the determination of the end of the incoming data write request related to streaming data, copying remaining data from a current physical band mapped to logical block addresses LBAs related to the data write requests to the allocated (open) band.

Abstract: An implementation of a system disclosed herein provides a method for managing data streams of sequential nature, wherein the method writes the sequential chunks (fragments) directly to an open band in the order these are received from the host and includes determining an end of the incoming data write request related to streaming data and in response to the determination of the end of the incoming data write request related to streaming data, copying remaining data from a current physical band mapped to logical block addresses LBAs related to the data write requests to the allocated (open) band.

Abstract: A data storage device includes one or more storage media that include multiple physical storage locations. The device also includes at least one cache memory having a logical space that includes a plurality of separately managed logical block address (LBA) ranges. Additionally, a controller is included in the device. The controller is configured to receive data extents addressed by a first LBA and a logical block count. The controller is also configured to identify at least one separately managed LBA range of the plurality of separately managed LBA ranges in the at least one cache memory based on LBAs associated with at least some of the received data extents. The controller stores the at least some of the received data extents in substantially monotonically increasing LBA order in at least one physical storage location, of the at least one cache memory, assigned to the identified at least one LBA range.

Abstract: A device includes one or more data storage media having a main storage area, and includes a non-volatile cache memory and a controller. The controller stores a plurality of data packets into a plurality of physical locations in the main storage area. Each of the data packets is associated with a different logical block address (LBA), and each of the physical locations is associated with a different physical location address (PLA). The controller generates mapping information that links the different LBAs to the different PLAs. Upon detecting a soft error when reading a data packet stored in a physical location, the controller relocates the data packet associated with the soft error to a physical location of the non-volatile cache memory. The controller also marks the physical location as a suspect location. The controller updates the mapping information to reflect the relocation of the data packet associated with the soft error.

Abstract: A data storage device includes one or more storage media that include multiple physical storage locations. The device also includes at least one cache memory having a logical space that includes a plurality of separately managed logical block address (LBA) ranges. Additionally, a controller is included in the device. The controller is configured to receive data extents addressed by a first LBA and a logical block count. The controller is also configured to identify at least one separately managed LBA range of the plurality of separately managed LBA ranges in the at least one cache memory based on LBAs associated with at least some of the received data extents. The controller stores the at least some of the received data extents in substantially monotonically increasing LBA order in at least one physical storage location, of the at least one cache memory, assigned to the identified at least one LBA range.

Abstract: Certain exemplary aspects of the present disclosure are directed towards methods and apparatuses in which logic circuitry generates an error detection code based on user data received from a host, and further generates a first set of check bits, to be written to the non-volatile memory circuit in conjunction with the user data, by combining the error detection code with a hashed data address of the user data. In some embodiments, the check bits associated with the user data providing verification that the user data was written in the appropriate physical block address of the non-volatile memory circuit.

Abstract: Systems and methods are disclosed for performing rewrite operations on recording bands of a data storage medium. In some embodiments, a storage device may receive a write request to be recorded to a band including a plurality of contiguous data storage areas (e.g. tracks) spanning from a first storage area to a last storage area. The device may determine a target area of the band to which to record the data, and perform a partial rewrite operation on less than all data storage areas of the band when the target area is not within a threshold number of data storage areas from the first storage area. In some embodiments, the rewrite operation may include reading data recorded in a first arrangement from the target band, modifying the data, and recording the modified data to the band in a second arrangement including a physical recording order different than the first arrangement.

Abstract: A device includes one or more data storage media having a main storage area. The device also includes a non-volatile cache memory and a controller. The controller stores a plurality of data packets into a plurality of physical locations in the main storage area of the one or more data storage media. Each of the plurality of data packets is associated with a different logical block address (LBA), and each of the plurality of physical locations is associated with a different physical location address. The controller generates mapping information that links the different LBAs associated with the different data packets to the different physical location addresses associated with the different physical locations.

Abstract: The disclosure is related to systems and methods of managing data storage in a memory device. In a particular embodiment, a method is disclosed that includes receiving, in a data storage device, at least one data packet that has a size that is different from an allocated storage capacity of at least one physical destination location on a data storage medium in the data storage device for the at least one data packet. The method also includes storing the at least one received data packet in a non-volatile cache memory prior to transferring the at least one received data packet to the at least one physical destination location.

Abstract: The disclosure is related to systems and methods of managing data storage in a memory device. In a particular embodiment, a method is disclosed that includes receiving, in a data storage device, at least one data packet that has a size that is different from an allocated storage capacity of at least one physical destination location on a data storage medium in the data storage device for the at least one data packet. The method also includes storing the at least one received data packet in a non-volatile cache memory prior to transferring the at least one received data packet to the at least one physical destination location.

Abstract: Certain exemplary aspects of the present disclosure are directed towards methods and apparatuses in which logic circuitry generates an error detection code based on user data received from a host, and further generates a first set of check bits, to be written to the non-volatile memory circuit in conjunction with the user data, by combining the error detection code with a hashed data address of the user data. In some embodiments, the check bits associated with the user data providing verification that the user data was written in the appropriate physical block address of the non-volatile memory circuit.

Abstract: Implementations disclosed herein provide for increasing storage drive performance by reserving a region of user-writeable storage space on a storage medium for overprovisioning uses, including performance-enhancing functions. Until a capacity condition of the storage drive is satisfied, write operations targeting the reserved region are written to another equal-sized region that does not contain user data.