Patents by Inventor Brian T. Vaccaro

Brian T. Vaccaro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120280023
    Abstract: A lead-free solder joint is formed between a tin-silver-copper solder alloy (SAC), SACX, or other commonly used Pb-free solder alloys, and a metallization layer of a substrate. Interaction of the SAC with the metallization layer forms an intermetallic compound (IMC) that binds the solder mass to the metallization layer. The IMC region is substantially free of any phosphorous-containing layers or regions.
    Type: Application
    Filed: July 18, 2012
    Publication date: November 8, 2012
    Applicant: LSI Corporation
    Inventors: Ahmed Amin, Frank Baiocchi, John Delucca, John Osenbach, Brian T. Vaccaro
  • Patent number: 8242378
    Abstract: A lead-free solder joint is formed between a tin-silver-copper solder alloy (SAC), SACX, or other commonly used Pb-free solder alloys, and a metallization layer of a substrate. Interaction of the SAC with the metallization layer forms an intermetallic compound (IMC) that binds the solder mass to the metallization layer. The IMC region is substantially free of any phosphorous-containing layers or regions.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: August 14, 2012
    Assignee: Agere Systems Inc.
    Inventors: Ahmed Amin, Frank Baiocchi, John Delucca, John Osenbach, Brian T. Vaccaro
  • Patent number: 8013428
    Abstract: A method of fabricating an interconnection between a region of copper material and a conducting region is disclosed. The method includes a step of forming a region of tin material and a step of forming a region of nickel material. The method also includes a step of melting the tin material to induce formation of a nickel/tin/copper intermetallic composition at an interface between the region of copper material and the conducting region. The region of tin material and the region of nickel material define the interface between the region of copper material and the conducting region.
    Type: Grant
    Filed: July 28, 2009
    Date of Patent: September 6, 2011
    Assignee: LSI Corporation
    Inventors: Kultaransingh N. Hooghan, John W. Osenbach, Brian Dale Potteiger, Poopa Ruengsinsub, Richard L. Shook, Prakash Suratkar, Brian T. Vaccaro
  • Patent number: 7982307
    Abstract: An assembly comprises a stiffener, a circuit substrate and an IC chip. The stiffener has a surface with a first region and a second region. The circuit substrate covers at least a portion of the first region of the stiffener, while the IC chip overlies at least a portion of each of the first and second regions of the stiffener. The assembly further comprises a signal solder bump and a thermally conductive feature. The signal solder bump contacts the IC chip and the circuit substrate. The thermally conductive feature is disposed between, and is metallurgically bonded to, the integrated circuit chip and the second region of the stiffener. The thermally conductive feature provides an efficient thermal conductivity pathway between the IC chip and the stiffener.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: July 19, 2011
    Assignee: Agere Systems Inc.
    Inventors: Ahmed Amin, David L. Crouthamel, John W. Osenbach, Thomas H. Shilling, Brian T. Vaccaro
  • Publication number: 20100243300
    Abstract: A lead-free solder joint is formed between a tin-silver-copper solder alloy (SAC), SACX, or other commonly used Pb-free solder alloys, and a metallization layer of a substrate. Interaction of the SAC with the metallization layer forms an intermetallic compound (IMC) that binds the solder mass to the metallization layer. The IMC region is substantially free of any phosphorous-containing layers or regions.
    Type: Application
    Filed: September 21, 2007
    Publication date: September 30, 2010
    Inventors: Ahmed Amin, Frank Baiocchi, John Delucca, John Osenbach, Brian T. Vaccaro
  • Publication number: 20090291321
    Abstract: A method of fabricating an interconnection between a region of copper material and a conducting region is disclosed. The method includes a step of forming a region of tin material and a step of forming a region of nickel material. The method also includes a step of melting the tin material to induce formation of a nickel/tin/copper intermetallic composition at an interface between the region of copper material and the conducting region. The region of tin material and the region of nickel material define the interface between the region of copper material and the conducting region.
    Type: Application
    Filed: July 28, 2009
    Publication date: November 26, 2009
    Applicant: LSI Corporation
    Inventors: Kultaransingh N. Hooghan, John W. Osenbach, Brian Dale Potteiger, Poopa Ruengsinsub, Richard L. Shook, Prakash Suratkar, Brian T. Vaccaro
  • Publication number: 20080116567
    Abstract: An assembly comprises a stiffener, a circuit substrate and an IC chip. The stiffener has a surface with a first region and a second region. The circuit substrate covers at least a portion of the first region of the stiffener, while the IC chip overlies at least a portion of each of the first and second regions of the stiffener. The assembly further comprises a signal solder bump and a thermally conductive feature. The signal solder bump contacts the IC chip and the circuit substrate. The thermally conductive feature is disposed between, and is metallurgically bonded to, the integrated circuit chip and the second region of the stiffener. The thermally conductive feature provides an efficient thermal conductivity pathway between the IC chip and the stiffener.
    Type: Application
    Filed: November 22, 2006
    Publication date: May 22, 2008
    Inventors: Ahmed Amin, David L. Crouthamel, John W. Osenbach, Thomas H. Shilling, Brian T. Vaccaro