Patents by Inventor Brooklin J. Gore

Brooklin J. Gore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7499983
    Abstract: A system and method for accessing an application server includes sending a service command from a requestor to a dispatch server, processing the service command on the dispatch server, translating the service command on the dispatch server into an application request to the application server, wherein the translating is based on a service definition stored on the dispatch server, and processing the application request. In one embodiment, the dispatch server includes a dispatch processor that is further programmed to manage a user interface, wherein the user interface includes a service registration interface, a service modification interface, and a service deletion interface.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: March 3, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Don Acree, Rian Chipman, Brooklin J. Gore, Craig Kickel
  • Patent number: 7355423
    Abstract: A method is presented of designing semiconductor probe cards to have the optimum number and placement of die probe sites for function testing integrated circuit (IC) die at semiconductor wafer test, while minimizing the number of times the probe card must be moved (number of “touchdowns”) to test all the IC die on a semiconductor wafer, as well as minimizing the number of individual IC die on the wafer that are probed more than once during the wafer test. Each specific arrangement of probe sites is tested against other patterns for efficiency in testing in what is known as a genetic algorithm. The most efficient patterns are moved into the next generation with modified features obtained by crossovers between two efficient individuals, and with random mutations, until a selected efficiency is obtained, or until a maximum number of generations have occurred.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: April 8, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Brooklin J. Gore, Michael R. Allen
  • Publication number: 20070296438
    Abstract: A method is presented of designing semiconductor probe cards to have the optimum number and placement of die probe sites for function testing integrated circuit (IC) die at semiconductor wafer test, while minimizing the number of times the probe card must be moved (number of “touchdowns”) to test all the IC die on a semiconductor wafer, as well as minimizing the number of individual IC die on the wafer that are probed more than once during the wafer test. Each specific arrangement of probe sites is tested against other patterns for efficiency in testing in what is known as a genetic algorithm. The most efficient patterns are moved into the next generation with modified features obtained by crossovers between two efficient individuals, and with random mutations, until a selected efficiency is obtained, or until a maximum number of generations have occurred.
    Type: Application
    Filed: May 24, 2006
    Publication date: December 27, 2007
    Inventors: Brooklin J. Gore, Michael R. Allen
  • Patent number: 7210110
    Abstract: The present invention relates to a method for determining a matched routing netlist for a semiconductor device. In a particular embodiment, a topological plan for the microelectronic device is compiled and used to calculate a population of netlists. The netlists are then dynamically modified using a genetic algorithm to generate a matched netlist for the device.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: April 24, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Brooklin J. Gore, Michael D. Lee, Matthew L. Priest
  • Patent number: 6789233
    Abstract: The present invention relates to a method for determining a matched routing netlist for a semiconductor device. In a particular embodiment, a topological plan for the microelectronic device is compiled and used to calculate a population of netlists. The netlists are then dynamically modified using a genetic algorithm to generate a matched netlist for the device.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: September 7, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Brooklin J. Gore, Michael D. Lee, Matthew L. Priest
  • Publication number: 20040044977
    Abstract: The present invention relates to a method for determining a matched routing netlist for a semiconductor device. In a particular embodiment, a topological plan for the microelectronic device is compiled and used to calculate a population of netlists. The netlists are then dynamically modified using a genetic algorithm to generate a matched netlist for the device.
    Type: Application
    Filed: August 28, 2002
    Publication date: March 4, 2004
    Inventors: Brooklin J. Gore, Michael D. Lee, Matthew L. Priest
  • Publication number: 20030208563
    Abstract: A system and method for accessing an application server includes sending a service command from a requester to a dispatch server, processing the service command on the dispatch server, translating the service command on the dispatch server into an application request to the application server, wherein the translating is based on a service definition stored on the dispatch server, and processing the application request. In one embodiment, the dispatch server includes a dispatch processor that is further programmed to manage a user interface, wherein the user interface includes a service registration interface, a service modification interface, and a service deletion interface.
    Type: Application
    Filed: May 6, 2002
    Publication date: November 6, 2003
    Applicant: Micron Technology, Inc.
    Inventors: Don Acree, Rian Chipman, Brooklin J. Gore, Craig Kickel
  • Patent number: 5278770
    Abstract: A method for generating input data for a SPICE simulator in which a preprocessor computer program automatically assigns one of the models in the SPICE deck for modeling a particular device in a circuit simulated by the SPICE deck. Data which specifies valid device size ranges for a particular model is added to the SPICE deck prior to preprocessing. The model is assigned by the preprocessor computer program based upon device size, whether it is connected to power supply or ground and device type (P or N). The preprocessor output data is in a format usable by a commercially available SPICE program.
    Type: Grant
    Filed: June 25, 1990
    Date of Patent: January 11, 1994
    Assignees: Brooklin J. Gore, Layne Bunker
    Inventors: Brooklin J. Gore, Layne Bunker
  • Patent number: 5128878
    Abstract: A remote plotting system and method is implemented in a network of computer workstations whereby a designated computer functions as a plot server. Client workstations are programmed to create plot requests from data created in a computer aided integrated circuit design and layout application. The plot server computer is programmed to A) receive plot requests in a common spooling area sent from other workstations in the network, B) perform necessary rasterization of the requested data, and C) schedule resulting plot files for the first available plotter based on a round robin scheduling mechanism. Plot requests are design file plot templates which are sets of instructions describing the specific characteristics of the desired output, and a reference to the actual design data to be rasterized by the plot server. The system incorporates a single stage queue and supports an unlimited number of plotters and client workstations.
    Type: Grant
    Filed: November 28, 1990
    Date of Patent: July 7, 1992
    Assignee: Micron Technology, Inc.
    Inventors: Brooklin J. Gore, John D. Mosby