Abstract: A method of canceling gain and phase imbalance including estimating a cancellation parameter based on the signal divided by its complex conjugate, calculating a correction value for the signal using the cancellation parameter, and correcting the signal by subtracting the correction value from the signal. Estimate the cancellation parameter may include performing a stochastic gradient algorithm or a least squares estimate. A cancellation system including a conjugate conversion unit, an estimator, a combiner, a converter, and a subtractor. The estimator estimates a cancellation parameter and the combiner combines the cancellation parameter and the complex conjugate signal to provide a cancellation signal. The converter converts the cancellation signal to a correction signal, and the subtractor subtracts the correction signal from the imbalanced signal to provide a corrected signal. The combiner may be an adaptable tap of a digital signal processing circuit.

Abstract: Disclosed herein are various embodiments of methods, systems, and apparatuses for sending and receiving signals in a digital communication system. In one embodiment performs steps of transmitting a signal from a device with a first antenna array and calibrating the signal with a phase shift of the signal. In one exemplary method embodiment, a signal is transmitted from a beam-forming transmitter to an assisting receiver in an IEEE 802.11 wireless transmission. A return calibration signal from the assisting receiver with information regarding the phase error of signal is received by the beam-forming transceiver. The beam-forming transmitter introduces a calibration phase error to cancel the phase error as reported by the assisting receiver.

Abstract: An ophthalmic surgical system 10 includes an aspiration device 12 for aspirating fluids and tissue from a surgical site 14, and a surgical handpiece 16 for performing a surgical function. A control unit 46 is connected to each of the aspiration device and the surgical handpiece for controlling the operation of each device and handpiece. A user interface 48 forming a portion of the control unit 46, guides a user by prompting the user to answer a series of questions and the control unit, controls the devices and handpieces based on the user's answers.

Abstract: An on-signal calibration system I and Q signals of a transmitter to remove distortions in the RF output signal. The transmitter generates I and Q values and converts, modulates and combines the I and Q values into the RF output signal for transmission. The calibration system includes a detector, a sampler, a selector, an imbalance estimator, and an IQ corrector. The detector senses the RF output signal and provides a detection signal indicative thereof. The sampler samples the detection signal and provides digital samples. The selector selects from among the digital samples that correspond to predetermined ranges of the I and Q values, or otherwise predetermined selection boxes at predetermined phases. The imbalance estimator determines at least one imbalance estimate based on selected digital samples. The IQ corrector corrects the I and Q values using at least one imbalance estimate.

Abstract: An on-signal calibration system I and Q signals of a transmitter to remove distortions in the RF output signal. The transmitter generates I and Q values and converts, modulates and combines the I and Q values into the RF output signal for transmission. The calibration system includes a detector, a sampler, a selector, an imbalance estimator, and an IQ corrector. The detector senses the RF output signal and provides a detection signal indicative thereof. The sampler samples the detection signal and provides digital samples. The selector selects from among the digital samples that correspond to predetermined ranges of the I and Q values, or otherwise predetermined selection boxes at predetermined phases. The imbalance estimator determines at least one imbalance estimate based on selected digital samples. The IQ corrector corrects the I and Q values using at least one imbalance estimate.

Abstract: A TDM data distribution system (10) includes a hub unit (12) with a multipoint transmitter (24) and any number of subscriber units (14), each of which has a multipoint receiver (28). A forward communication link (16) transmitted by the hub unit (12) exhibits a substantially constant baud and carrier frequency over a number of diverse modulation format (MF) time slots (42). However, the different MF slots (42) convey data using different modulation formats. Modulation order and coding rate may vary for different modulation formats. The multipoint transmitter (24) includes a number of encoding FEC processors (48), wherein each encoding FEC processor (48) is active only for selected ones of the different MF slots (42). When inactive, the internal states of the encoding FEC processors (48) are frozen. Each multipoint receiver (28) includes a decoding FEC processor (108) which is active only for MF slots (42) assigned to the same modulation format for which the decoding FEC processors (108) are programmed.

Abstract: A method of canceling gain and phase imbalance including estimating a cancellation parameter based on the signal divided by its complex conjugate, calculating a correction value for the signal using the cancellation parameter, and correcting the signal by subtracting the correction value from the signal. Estimate the cancellation parameter may include performing a stochastic gradient algorithm or a least squares estimate. A cancellation system including a conjugate conversion unit, an estimator, a combiner, a converter, and a subtractor. The estimator estimates a cancellation parameter and the combiner combines the cancellation parameter and the complex conjugate signal to provide a cancellation signal. The converter converts the cancellation signal to a correction signal, and the subtractor subtracts the correction signal from the imbalanced signal to provide a corrected signal. The combiner may be an adaptable tap of a digital signal processing circuit.

Abstract: A digital communication transmitter (30) implements a phase constellation (40) which defines a digital communication signal stream that is subsequently compressed (50), thereby introducing distortion into a communication signal (56) transmitted to a complementary receiver (30). The receiver (30) includes a magnitude adjuster (80) which increases the magnitude component of selected phase estimates to at least partially compensate for the compression distortion. The receiver also includes a branch metrics generator (90) having a segment (138) in which branch metric transfer function peaks and valleys are not positioned in receiver phase space to coincide with ideal phase points. The branch metric transfer functions are generated in accordance with a process (102) which bases branch metric calculations upon empirically determined probabilities that characterize system-induced distortions.

Abstract: A time division multiple access digital communications system (12) is provided. The system (12) has a base station (14) configured to generate a receive baud clock (86) and has a receiver (18) and a transmitter (20). The system also has a subscriber unit (16) configured to generate a transmit baud clock (50), and has a transmitter (28) and a receiver (26). The subscriber unit transmitter (28) is configured to transmit a reverse channel signal (54) that incorporates the transmit baud clock (50) as a component thereof. The base station receiver (18) is configured to receive the reverse channel signal (54) from the subscriber unit (16) and produce a phase-error signal (&mgr;′) in response to a phase difference between the transmit baud clock (50) and the receive baud clock (86). The base station transmitter (20) is configured to transmit the phase-error signal (&mgr;′) to the subscriber unit receiver (26).

Abstract: A communication system (10) includes a transmitter (12) which induces in a communication signal (16), a first component of in-phase to quadrature phase (I-Q) imbalance and a receiver (14) which adds a second component of I-Q imbalance. A digital, intermediate frequency (IF) I-Q balancer (38) compensates for the receiver-induced I-Q imbalance so that total distortion is sufficiently diminished and a data directed carrier tracking loop (60) may then perform carrier synchronization to generate a baseband signal (70). An adaptive equalizer (64) within the carrier tracking loop (60) may then effectively operate to compensate for additional distortions, such as the transmitter-induced I-Q imbalance.

Abstract: A digital communications system (10) employs a rotationally invariant phase point constellation (80, 80′, 80″) in a modulator (12) thereof and a corresponding carrier phase acquisition phase locked loop (56, 66, 74, 76, 78) in a demodulator (14) thereof. The phase point constellation (80) is rotationally invariant and the demodulator (14) is able to achieve carrier phase synchronization due at least in part to the inclusion of phase point voids (94) positioned in the phase point constellation (80, 80′, 80″). Pragmatic encoding is employed with differential encoding (28, 64) only on non-convolutionally encoded bits. The phase point constellation (80, 80′, 80″) provides identical codes for convolutionally encoded bits (30) of phase points (84) having equal magnitude that are rotated 90°, 180° and 270° degrees from one another. Specific constellations of 256, 64 and 16 points are disclosed.

Abstract: A constrained-envelope digital-communications transmitter circuit (22) includes a binary data source (32) that provides an input signal stream (34) to a modulator (77,77′). The modulator (77,77′) includes a pulse-spreading filter (76) that filters a phase-point signal stream (50) or a composite signal stream (168) into a modulated signal (74). A constrained-envelope generator (106) generates a constrained-bandwidth error signal stream (108) from the modulated signal (74), and a delay element (138) delays the modulated signal (74) into a delayed modulated signal (140) synchronized with the constrained-bandwidth error signal stream (108). A complex summing circuit (110) sums the delayed modulated signal (140) and the constrained-bandwidth error signal stream (108) into an altered modulated signal (112), and a substantially linear amplifier (146) amplifies the altered modulated signal (112) and transmits it as a radio-frequency broadcast signal (26).

Abstract: An IC modulation processor (28) may be configured to operate in a single chip mode to accommodate baud rates up to a maximum clock rate for the processor (28) and in a dual chip mode to accommodate baud rates in excess of the maximum clock rate. The IC modulation processor (28) performs digital processing on a communication signal which conveys an input data stream (22). A pulse shaping filter (54-57) is provided following a phase mapper (50). The pulse shaping filter (54-57) is implemented as a pair of half-filters. Pulse shaping is distributed between two IC modulation processors (28) in the dual chip mode. An interpolator (86) and linearizer (106) follow the pulse shaping filters (54-57).

Abstract: A phase-noise compensated digital communication receiver (40, 40′, 40″) includes a carrier tracking loop (56) which imposes a transport delay on a carrier tracking loop signal (60) before that signal (60) is fed back upon itself. The carrier tracking loop (56) includes a phase rotator (58) that rotates a down-converted digital communication signal (50) by a phase determined by a phase-conveying signal (72). A carrier tracking loop signal is obtained from the carrier tracking loop and delayed in a delay element (82) by a duration that compensates for the transport delay. A phase rotator (84) then rotates the delayed carrier tracking loop signal through a phase value determined by the phase-conveying signal (72) to obtain an open-loop phase signal (86) from which data are extracted. Different embodiments of the receiver (40, 40′, 40″) are provided to accommodate adaptive equalizer (54) issues.

Abstract: An IC modulation processor (28) may be configured to operate in a single chip mode to accommodate baud rates up to a maximum clock rate for the processor (28) and in a dual chip mode to accommodate baud rates in excess of the maximum clock rate. The IC modulation processor (28) performs digital processing on a communication signal which conveys an input data stream (22). A pulse shaping filter (54-57) is provided following a phase mapper (50). The pulse shaping filter (54-57) is implemented as a pair of half-filters. Pulse shaping is distributed between two IC modulation processors (28) in the dual chip mode. An interpolator (86) and linearizer (106) follow the pulse shaping filters (54-57).

Abstract: A communication system (10) includes a transmitter (20) having programmable signals (46, 58, 60, 80) which can be used to adjust transmitter-caused quadrature-phase signal imbalances. A receiver (18) of the system (10) is remotely located from the transmitter (20) and generates a signal quality statistic (102, 112) that is monitored in a slow-tracking feedback loop to formulate commands which indicate how to program the programmable signals (46, 58, 60, 80). This receiver (18) performs its signal quality statistic monitoring while a data stream (36) is being extracted from a received communication signal.

Abstract: A digital communication receiver (10) includes a magnitude-based symbol synchronizer (38) which separates complex phase attributes from magnitude attributes. The phase attributes are processed by a phase processor (78) which identifies clock adjustment opportunities. The magnitude attributes are processed by a magnitude processor (76) that generates a phase error estimate signal (82), which in turn drives a clock generator (24) in a phase locked loop (54) to achieve symbol synchronization in a non-data-directed manner. An additional adjustment feedback loop (114, 128) includes a phase error offset generator (52) and operates in conjunction with the phase locked loop (54) to allow the phase locked loop (54) to achieve lock and a robust operating point in spite of distortion in a received input analog signal (12).

Abstract: A phase-noise compensated digital communication receiver (40, 40', 40") includes a carrier tracking loop (56) which imposes a transport delay on a carrier tracking loop signal (60) before that signal (60) is fed back upon itself. The carrier tracking loop (56) includes a phase rotator (58) that rotates a down-converted digital communication signal (50) by a phase determined by a phase-conveying signal (72). A carrier tracking loop signal is obtained from the carrier tracking loop and delayed in a delay element (82) by a duration that compensates for the transport delay. A phase rotator (84) then rotates the delayed carrier tracking loop signal through a phase value determined by the phase-conveying signal (72) to obtain an open-loop phase signal (86) from which data are extracted. Different embodiments of the receiver (40, 40', 40") are provided to accommodate adaptive equalizer (54) issues.

Abstract: A constrained-envelope digital-communications transmitter circuit (22) in which a binary data source (32) provides an input signal stream (34), a phase mapper (44) maps the input signal stream (34) into a quadrature phase-point signal stream (50) having a predetermined number of symbols per unit baud interval (64) and defining a phase point (54) in a phase-point constellation (46), a pulse-spreading filter (76) filters the phase-point signal stream (50) into a filtered signal stream (74), a constrained-envelope generator (106) generates a constrained-bandwidth error signal stream (108) from the filtered signal stream (74), a delay element (138) delays the filtered signal stream (74) into a delayed signal stream (140) synchronized with the constrained-bandwidth error signal stream (108), a complex summing circuit (110) sums the delayed signal stream (140) and the constrained-bandwidth error signal stream (108) into a constrained-envelope signal stream (112), and a substantially linear amplifier (146) amplifies

Abstract: A constrained-envelope digital-communications transmitter circuit (22) in which a binary data source (32) provides an input signal stream (34), a phase mapper (44) maps the input signal stream (34) into a quadrature phase-point signal stream (50) having a predetermined number of symbols per unit baud interval (64) and defining a phase point (54) in a phase-point constellation (46), a pulse-spreading filter (76) filters the phase-point signal stream (50) into a filtered signal stream (74), a constrained-envelope generator (106) generates a constrained-bandwidth error signal stream (108) from the filtered signal stream (74), a delay element (138) delays the filtered signal stream (74) into a delayed signal stream (140) synchronized with the constrained-bandwidth error signal stream (108), a complex summing circuit (110) sums the delayed signal stream (140) and the constrained-bandwidth error signal stream (108) into a constrained-envelope signal stream (112), and a substantially linear amplifier (146) amplifies