Patents by Inventor Bryant Sorensen

Bryant Sorensen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220276983
    Abstract: A system and method for automated data propagation and automated data processing within an integrated circuit includes an intelligence processing integrated circuit comprising at least one intelligence processing pipeline, wherein the at least one intelligence processing pipeline includes: a main data buffer that stores input data; a plurality of distinct intelligence processing tiles, wherein each distinct intelligence processing tile includes a computing circuit and a local data buffer; a token-based governance module, the token-based governance module implementing: a first token-based control data structure; a second token-based control data structure, wherein the first token-based control data structure and the second-token based control data operate in cooperation to control an automated flow of the input data and/or an automated processing of the input data through the at least one intelligence processing pipeline.
    Type: Application
    Filed: May 16, 2022
    Publication date: September 1, 2022
    Inventors: David Fick, Malav Parikh, Paul Toth, Adam Caughron, Vimal Reddy, Erik Schlanger, Sergio Schuler, Zainab Nasreen Zaidi, Alex Dang-Tran, Raul Garibay, Bryant Sorensen
  • Patent number: 11360932
    Abstract: A system and method for automated data propagation and automated data processing within an integrated circuit includes an intelligence processing integrated circuit comprising at least one intelligence processing pipeline, wherein the at least one intelligence processing pipeline includes: a main data buffer that stores input data; a plurality of distinct intelligence processing tiles, wherein each distinct intelligence processing tile includes a computing circuit and a local data buffer; a token-based governance module, the token-based governance module implementing: a first token-based control data structure; a second token-based control data structure, wherein the first token-based control data structure and the second-token based control data operate in cooperation to control an automated flow of the input data and/or an automated processing of the input data through the at least one intelligence processing pipeline.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: June 14, 2022
    Assignee: Mythic, Inc.
    Inventors: David Fick, Malav Parikh, Paul Toth, Adam Caughron, Vimal Reddy, Erik Schlanger, Sergio Schuler, Zainab Nasreen Zaidi, Alex Dang-Tran, Raul Garibay, Bryant Sorensen
  • Publication number: 20210232435
    Abstract: A system and method for a computing tile of a multi-tiled integrated circuit includes a plurality of distinct tile computing circuits, wherein each of the plurality of distinct tile computing circuits is configured to receive fixed-length instructions; a token-informed task scheduler that: tracks one or more of a plurality of distinct tokens emitted by one or more of the plurality of distinct tile computing circuits; and selects a distinct computation task of a plurality of distinct computation tasks based on the tracking; and a work queue buffer that: contains a plurality of distinct fixed-length instructions, wherein each one of the fixed-length instructions is associated with one of the plurality of distinct computation tasks; and transmits one of the plurality of distinct fixed-length instructions to one or more of the plurality of distinct tile computing circuits based on the selection of the distinct computation task by the token-informed task scheduler.
    Type: Application
    Filed: April 15, 2021
    Publication date: July 29, 2021
    Inventors: Malav Parikh, Sergio Schuler, Vimal Reddy, Zainab Zaidi, Paul Toth, Adam Caughron, Bryant Sorensen, Alex Dang-Tran, Scott Johnson, Raul Garibay, Andrew Morten, David Fick
  • Publication number: 20210157648
    Abstract: A system and method for a computing tile of a multi-tiled integrated circuit includes a plurality of distinct tile computing circuits, wherein each of the plurality of distinct tile computing circuits is configured to receive fixed-length instructions; a token-informed task scheduler that: tracks one or more of a plurality of distinct tokens emitted by one or more of the plurality of distinct tile computing circuits; and selects a distinct computation task of a plurality of distinct computation tasks based on the tracking; and a work queue buffer that: contains a plurality of distinct fixed-length instructions, wherein each one of the fixed-length instructions is associated with one of the plurality of distinct computation tasks; and transmits one of the plurality of distinct fixed-length instructions to one or more of the plurality of distinct tile computing circuits based on the selection of the distinct computation task by the token-informed task scheduler.
    Type: Application
    Filed: November 24, 2020
    Publication date: May 27, 2021
    Inventors: Malav Parikh, Sergio Schuler, Vimal Reddy, Zainab Zaidi, Paul Toth, Adam Caughron, Bryant Sorensen, Alexander Dang-Tran, Scott Johnson, Raul Garibay, Andrew Morten, David Fick
  • Patent number: 11016810
    Abstract: A system and method for a computing tile of a multi-tiled integrated circuit includes a plurality of distinct tile computing circuits, wherein each of the plurality of distinct tile computing circuits is configured to receive fixed-length instructions; a token-informed task scheduler that: tracks one or more of a plurality of distinct tokens emitted by one or more of the plurality of distinct tile computing circuits; and selects a distinct computation task of a plurality of distinct computation tasks based on the tracking; and a work queue buffer that: contains a plurality of distinct fixed-length instructions, wherein each one of the fixed-length instructions is associated with one of the plurality of distinct computation tasks; and transmits one of the plurality of distinct fixed-length instructions to one or more of the plurality of distinct tile computing circuits based on the selection of the distinct computation task by the token-informed task scheduler.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: May 25, 2021
    Assignee: Mythic, Inc.
    Inventors: Malav Parikh, Sergio Schuler, Vimal Reddy, Zainab Zaidi, Paul Toth, Adam Caughron, Bryant Sorensen, Alex Dang-Tran, Scott Johnson, Raul Garibay, Andrew Morten, David Fick
  • Publication number: 20200192858
    Abstract: A system and method for automated data propagation and automated data processing within an integrated circuit includes an intelligence processing integrated circuit comprising at least one intelligence processing pipeline, wherein the at least one intelligence processing pipeline includes: a main data buffer that stores input data; a plurality of distinct intelligence processing tiles, wherein each distinct intelligence processing tile includes a computing circuit and a local data buffer; a token-based governance module, the token-based governance module implementing: a first token-based control data structure; a second token-based control data structure, wherein the first token-based control data structure and the second-token based control data operate in cooperation to control an automated flow of the input data and/or an automated processing of the input data through the at least one intelligence processing pipeline.
    Type: Application
    Filed: February 13, 2020
    Publication date: June 18, 2020
    Inventors: David Fick, Malav Parikh, Paul Toth, Adam Caughron, Vimal Reddy, Erik Schlanger, Sergio Schuler, Zainab Nasreen Zaidi, Alex Dang-Tran, Raul Garibay, Bryant Sorensen
  • Patent number: 10606797
    Abstract: A system and method for automated data propagation and automated data processing within an integrated circuit includes an intelligence processing integrated circuit comprising at least one intelligence processing pipeline, wherein the at least one intelligence processing pipeline includes: a main data buffer that stores input data; a plurality of distinct intelligence processing tiles, wherein each distinct intelligence processing tile includes a computing circuit and a local data buffer; a token-based governance module, the token-based governance module implementing: a first token-based control data structure; a second token-based control data structure, wherein the first token-based control data structure and the second-token based control data operate in cooperation to control an automated flow of the input data and/or an automated processing of the input data through the at least one intelligence processing pipeline.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: March 31, 2020
    Assignee: Mythic, Inc.
    Inventors: David Fick, Malav Parikh, Paul Toth, Adam Caughron, Vimal Reddy, Erik Schlanger, Sergio Schuler, Zainab Nasreen Zaidi, Alex Dang-Tran, Raul Garibay, Bryant Sorensen
  • Publication number: 20200012617
    Abstract: Systems and methods include an integrated circuit that includes a plurality of computing tiles, wherein each of the plurality of computing tiles includes: a matrix multiply accelerator, a computing processing circuit; and a flow scoreboard module; a local data buffer, wherein the plurality of computing tiles together define an intelligence processing array; a network-on-chip system comprising: a plurality of network-on-chip routers establishing a communication network among the plurality of computing tiles, wherein each network-on-chip router is in operable communication connection with at least one of the plurality of computing tiles and a distinct network-on-chip router of the plurality of network-on-chip routers; and an off-tile buffer that is arranged in remote communication with the plurality of computing tiles, wherein the off-tile buffer stores raw input data and/or data received from an upstream process or an upstream device.
    Type: Application
    Filed: July 1, 2019
    Publication date: January 9, 2020
    Inventors: David Fick, Malav Parikh, Paul Toth, Adam Caughron, Vimal Reddy, Erik Schlanger, Sergio Schuler, Zainab Nasreen Zaidi, Alex Dang-Tran, Raul Garibay, Bryant Sorensen
  • Publication number: 20200012616
    Abstract: A system and method for automated data propagation and automated data processing within an integrated circuit includes an intelligence processing integrated circuit comprising at least one intelligence processing pipeline, wherein the at least one intelligence processing pipeline includes: a main data buffer that stores input data; a plurality of distinct intelligence processing tiles, wherein each distinct intelligence processing tile includes a computing circuit and a local data buffer; a token-based governance module, the token-based governance module implementing: a first token-based control data structure; a second token-based control data structure, wherein the first token-based control data structure and the second-token based control data operate in cooperation to control an automated flow of the input data and/or an automated processing of the input data through the at least one intelligence processing pipeline.
    Type: Application
    Filed: July 1, 2019
    Publication date: January 9, 2020
    Inventors: David Fick, Malav Parikh, Paul Toth, Adam Caughron, Vimal Reddy, Erik Schlanger, Sergio Schuler, Zainab Nasreen Zaidi, Alex Dang-Tran, Raul Garibay, Bryant Sorensen
  • Patent number: 10521395
    Abstract: Systems and methods include an integrated circuit that includes a plurality of computing tiles, wherein each of the plurality of computing tiles includes: a matrix multiply accelerator, a computing processing circuit; and a flow scoreboard module; a local data buffer, wherein the plurality of computing tiles together define an intelligence processing array; a network-on-chip system comprising: a plurality of network-on-chip routers establishing a communication network among the plurality of computing tiles, wherein each network-on-chip router is in operable communication connection with at least one of the plurality of computing tiles and a distinct network-on-chip router of the plurality of network-on-chip routers; and an off-tile buffer that is arranged in remote communication with the plurality of computing tiles, wherein the off-tile buffer stores raw input data and/or data received from an upstream process or an upstream device.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: December 31, 2019
    Assignee: Mythic, Inc.
    Inventors: David Fick, Malav Parikh, Paul Toth, Adam Caughron, Vimal Reddy, Erik Schlanger, Sergio Schuler, Zainab Nasreen Zaidi, Alex Dang-Tran, Raul Garibay, Bryant Sorensen
  • Patent number: 9559653
    Abstract: Systems, devices, and methods are provided to inhibit apparent amplitude modulation in non-linear processing that causes distortion in a processed signal. One aspect of the invention includes a hearing aid. The hearing aid includes a microphone to receive an input signal, a speaker to reproduce the input signal, and a processor. The processor processes the input signal using a gain. The processor includes an inhibitor, which inhibits distortions, and an adjuster, which adjusts the gain. The inhibitor acts to smooth an envelope of the input signal to inhibit undesired modulation. The adjuster adjusts the gain if the envelope is either above or below a threshold.
    Type: Grant
    Filed: March 25, 2013
    Date of Patent: January 31, 2017
    Assignee: K/S HIMPP
    Inventors: Jon S. Kindred, Bryant Sorensen, Jerry Wahl
  • Publication number: 20130285747
    Abstract: Systems, devices, and methods are provided to inhibit apparent amplitude modulation in non-linear processing that causes distortion in a processed signal. One aspect of the invention includes a hearing aid. The hearing aid includes a microphone to receive an input signal, a speaker to reproduce the input signal, and a processor. The processor processes the input signal using a gain. The processor includes an inhibitor, which inhibits distortions, and an adjuster, which adjusts the gain. The inhibitor acts to smooth an envelope of the input signal to inhibit undesired modulation. The adjuster adjusts the gain if the envelope is either above or below a threshold.
    Type: Application
    Filed: March 25, 2013
    Publication date: October 31, 2013
    Inventors: Jon S. Kindred, Bryant Sorensen, Jerry Wahl
  • Publication number: 20090208033
    Abstract: Systems, devices, and methods are provided to inhibit apparent amplitude modulation in non-linear processing that causes distortion in a processed signal. One aspect of the invention includes a hearing aid. The hearing aid includes a microphone to receive an input signal, a speaker to reproduce the input signal, and a processor. The processor processes the input signal using a gain. The processor includes an inhibitor, which inhibits distortions, and an adjuster, which adjusts the gain. The inhibitor acts to smooth an envelope of the input signal to inhibit undesired modulation. The adjuster adjusts the gain if the envelope is either above or below a threshold.
    Type: Application
    Filed: January 20, 2009
    Publication date: August 20, 2009
    Inventors: Jon Schmidt Kindred, Bryant Sorensen, Jerry Wahl
  • Patent number: 7489790
    Abstract: Systems, devices, and methods are provided to inhibit apparent amplitude modulation in non-linear processing that causes distortion in a processed signal. One aspect of the invention includes a hearing aid. The hearing aid includes a microphone to receive an input signal, a speaker to reproduce the input signal, and a processor. The processor processes the input signal using a gain. The processor includes an inhibitor, which inhibits distortions, and an adjuster, which adjusts the gain. The inhibitor acts to smooth an envelope of the input signal to inhibit undesired modulation. The adjuster adjusts the gain if the envelope is either above or below a threshold.
    Type: Grant
    Filed: December 5, 2000
    Date of Patent: February 10, 2009
    Assignee: AMI Semiconductor, Inc.
    Inventors: Jon Schmidt Kindred, Bryant Sorensen, Jerry Wahl
  • Publication number: 20020067838
    Abstract: Systems, devices, and methods are provided to inhibit apparent amplitude modulation in non-linear processing that causes distortion in a processed signal. One aspect of the invention includes a hearing aid. The hearing aid includes a microphone to receive an input signal, a speaker to reproduce the input signal, and a processor. The processor processes the input signal using a gain. The processor includes an inhibitor, which inhibits distortions, and an adjuster, which adjusts the gain. The inhibitor acts to smooth an envelope of the input signal to inhibit undesired modulation. The adjuster adjusts the gain if the envelope is either above or below a threshold.
    Type: Application
    Filed: December 5, 2000
    Publication date: June 6, 2002
    Applicant: Starkey Laboratories, Inc.
    Inventors: Jon Schmidt Kindred, Bryant Sorensen, Jerry Wahl