Patents by Inventor Buddhika Abesingha

Buddhika Abesingha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10770480
    Abstract: Systems, methods and apparatus for coexistence of high voltage and low voltage devices and circuits on a same integrated circuit fabricated in silicon-on-insulator (SOI) technology are described. In particular, techniques for mitigating back gate effects are described, including using of resistive and/or capacitive couplings to control surface potentials at regions of a substrate used for the SOI fabrication proximate the high voltage and low voltage devices and circuits. In one case, an N-type implant is used to provide a high potential differential with respect to a substrate potential.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: September 8, 2020
    Assignee: pSemi Corporation
    Inventors: Buddhika Abesingha, Simon Edward Willard, Alain Duvallet, Merlin Green, Sivakumar Kumarasamy
  • Patent number: 10734893
    Abstract: A power converter includes a charge pump in which transistors transition between conducting and non-conducting states thereby causing said pump capacitors to be interconnected in different arrangements at different times. Among the transistors is one that transitions into a conducting state when a source and gate of that transistor are at equal potentials.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: August 4, 2020
    Assignee: pSemi Corporation
    Inventors: Buddhika Abesingha, Arezu Bagheri
  • Patent number: 10734982
    Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. Timing of control signals can be adjusted via internal and/or external components so as to minimize shoot trough currents in the high voltage devices. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: August 4, 2020
    Assignee: pSemi Corporation
    Inventors: Buddhika Abesingha, Merlin Green
  • Publication number: 20200153427
    Abstract: Methods and devices to drive D-mode and E-mode power FETs are described. The disclosure teaches how to apply negative voltages across gate-source of D-mode FETs to turn such FETs off whenever needed. The presented method and devices can also be used in applications where overdriving D-mode FETs to achieve improved on resistance is desired.
    Type: Application
    Filed: November 9, 2018
    Publication date: May 14, 2020
    Inventors: Arezu Bagheri, Buddhika Abesingha
  • Publication number: 20200028501
    Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. Timing of control signals can be adjusted via internal and/or external components so as to minimize shoot trough currents in the high voltage devices. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.
    Type: Application
    Filed: July 31, 2019
    Publication date: January 23, 2020
    Inventors: Buddhika Abesingha, Merlin Green
  • Publication number: 20190280011
    Abstract: Systems, methods and apparatus for coexistence of high voltage and low voltage devices and circuits on a same integrated circuit fabricated in silicon-on-insulator (SOI) technology are described. In particular, techniques for mitigating back gate effects are described, including using of resistive and/or capacitive couplings to control surface potentials at regions of a substrate used for the SOI fabrication proximate the high voltage and low voltage devices and circuits. In one case, an N-type implant is used to provide a high potential differential with respect to a substrate potential.
    Type: Application
    Filed: May 24, 2019
    Publication date: September 12, 2019
    Inventors: Buddhika Abesingha, Simon Edward Willard, Alain Duvallet, Merlin Green, Sivakumar Kumarasamy
  • Patent number: 10404245
    Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. Timing of control signals can be adjusted via internal and/or external components so as to minimize shoot trough currents in the high voltage devices. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: September 3, 2019
    Assignee: pSemi Corporation
    Inventors: Buddhika Abesingha, Merlin Green
  • Patent number: 10348293
    Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion (e.g. DC/DC) and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. According to an aspect, timing control of edges of a control signal to the high voltage semiconductor devices is provided by a basic edge delay circuit that includes a transistor, a current source and a capacitor. An inverter can be selectively coupled, via a switch, to an input and/or an output of the basic edge delay circuit to allow for timing control of a rising edge or a falling edge of the control signal.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: July 9, 2019
    Assignee: pSemi Corporation
    Inventors: Buddhika Abesingha, Merlin Green, Gary Chunshien Wu
  • Publication number: 20190140635
    Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion (e.g. DC/DC) and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. According to an aspect, timing control of edges of a control signal to the high voltage semiconductor devices is provided by a basic edge delay circuit that includes a transistor, a current source and a capacitor. An inverter can be selectively coupled, via a switch, to an input and/or an output of the basic edge delay circuit to allow for timing control of a rising edge or a falling edge of the control signal.
    Type: Application
    Filed: June 18, 2018
    Publication date: May 9, 2019
    Inventors: Buddhika Abesingha, Merlin Green, Gary Chunshien Wu
  • Patent number: 10147740
    Abstract: Methods and structures for mitigating back gate effects in high voltage and low voltage semiconductor devices of a same integrated circuit fabricated in a silicon-on-insulator technology are described. According to one aspect, one or more resistive couplings are used to control surface potentials at regions of a substrate used for the SOI fabrication proximate the high voltage and low voltage semiconductor devices. According to another aspect, an N-type implant that is biased through a resistive coupling is used to provide a high potential differential with respect to a substrate potential.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: December 4, 2018
    Assignee: pSemi Corporation
    Inventors: Buddhika Abesingha, Simon Edward Willard, Alain Duvallet, Merlin Green, Sivakumar Kumarasamy
  • Publication number: 20180302072
    Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. Timing of control signals can be adjusted via internal and/or external components so as to minimize shoot trough currents in the high voltage devices. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.
    Type: Application
    Filed: June 18, 2018
    Publication date: October 18, 2018
    Inventors: Buddhika Abesingha, Merlin Green
  • Patent number: 10044347
    Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. Timing of control signals can be adjusted via internal and/or external components so as to minimize shoot trough currents in the high voltage devices. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: August 7, 2018
    Assignee: pSemi Corporation
    Inventors: Buddhika Abesingha, Merlin Green
  • Publication number: 20180211972
    Abstract: Systems, methods and apparatus for coexistence of high voltage and low voltage devices and circuits on a same integrated circuit fabricated in silicon-on-insulator (SOI) technology are described. In particular, techniques for mitigating back gate effects are described, including using of resistive and/or capacitive couplings to control surface potentials at regions of a substrate used for the SOI fabrication proximate the high voltage and low voltage devices and circuits. In one case, an N-type implant is used to provide a high potential differential with respect to a substrate potential.
    Type: Application
    Filed: October 31, 2017
    Publication date: July 26, 2018
    Inventors: Buddhika Abesingha, Simon Edward Willard, Alain Duvallet, Merlin Green, Sivakumar Kumarasamy
  • Publication number: 20180175841
    Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. Timing of control signals can be adjusted via internal and/or external components so as to minimize shoot trough currents in the high voltage devices. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.
    Type: Application
    Filed: December 14, 2017
    Publication date: June 21, 2018
    Inventors: Buddhika Abesingha, Merlin Green
  • Patent number: 9912327
    Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. Timing of control signals can be adjusted via internal and/or external components so as to minimize shoot trough currents in the high voltage devices. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: March 6, 2018
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Buddhika Abesingha, Merlin Green
  • Patent number: 9882554
    Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. Timing of control signals can be adjusted via internal and/or external components so as to minimize shoot trough currents in the high voltage devices. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: January 30, 2018
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Buddhika Abesingha, Merlin Green
  • Patent number: 9847348
    Abstract: Systems, methods and apparatus for coexistence of high voltage and low voltage devices and circuits on a same integrated circuit fabricated in silicon-on-insulator (SOI) technology are described. In particular, techniques for mitigating back gate effects are described, including using of resistive and/or capacitive couplings to control surface potentials at regions of a substrate used for the SOI fabrication proximate the high voltage and low voltage devices and circuits. In one case, an N-type implant is used to provide a high potential differential with respect to a substrate potential.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: December 19, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Buddhika Abesingha, Simon Edward Willard, Alain Duvallet, Merlin Green, Sivakumar Kumarasamy
  • Patent number: 9843311
    Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: December 12, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Merlin Green, Mark L. Burgener, James W. Swonger, Buddhika Abesingha, Ronald Eugene Reedy
  • Publication number: 20170117883
    Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.
    Type: Application
    Filed: October 5, 2016
    Publication date: April 27, 2017
    Inventors: Merlin Green, Mark L. Burgener, James W. Swonger, Buddhika Abesingha, Ronald Eugene Reedy
  • Patent number: 9484897
    Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: November 1, 2016
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Merlin Green, Mark L. Burgener, James W. Swonger, Buddhika Abesingha, Ronald Eugene Reedy