Patents by Inventor Bum-seok Seo

Bum-seok Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9934986
    Abstract: Provided is a method of forming fine patterns, which is capable of easily forming a plurality of patterns repeatedly with a fine pitch when forming patterns necessary for manufacturing a highly integrated semiconductor device exceeding a resolution limit of a photolithography process.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: April 3, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-seop Shim, Seok-han Park, Bum-seok Seo
  • Publication number: 20160314987
    Abstract: Provided is a method of forming fine patterns, which is capable of easily forming a plurality of patterns repeatedly with a fine pitch when forming patterns necessary for manufacturing a highly integrated semiconductor device exceeding a resolution limit of a photolithography process.
    Type: Application
    Filed: February 22, 2016
    Publication date: October 27, 2016
    Inventors: Jeong-seop SHIM, Seok-han PARK, Bum-seok SEO
  • Patent number: 9356071
    Abstract: An insulation layer is formed on a substrate. A first mask is formed on the insulation layer. The first mask includes a plurality of line patterns arranged in a second direction. The plurality of line patterns extend in a first direction substantially perpendicular to the second direction. A second mask is formed on the insulation layer and the first mask. The second mask includes an opening partially exposing the plurality of line patterns. The opening has an uneven boundary at one of a first end portion in the first direction and a second end portion in a third direction substantially opposite to the first direction. The insulation layer is partially removed using the first mask and the second mask as an etching mask, thereby forming a plurality of first trenches and second trenches. The plurality of first trenches and the second trenches are arranged in a staggered pattern.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: May 31, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Bum-Seok Seo, Ki-Joon Kim, Kil-Ho Lee
  • Publication number: 20150325625
    Abstract: An insulation layer is formed on a substrate. A first mask is formed on the insulation layer. The first mask includes a plurality of line patterns arranged in a second direction. The plurality of line patterns extend in a first direction substantially perpendicular to the second direction. A second mask is formed on the insulation layer and the first mask. The second mask includes an opening partially exposing the plurality of line patterns. The opening has an uneven boundary at one of a first end portion in the first direction and a second end portion in a third direction substantially opposite to the first direction. The insulation layer is partially removed using the first mask and the second mask as an etching mask, thereby forming a plurality of first trenches and second trenches. The plurality of first trenches and the second trenches are arranged in a staggered pattern.
    Type: Application
    Filed: July 20, 2015
    Publication date: November 12, 2015
    Inventors: Bum-Seok SEO, Ki-Joon KIM, Kil-Ho LEE
  • Patent number: 9118002
    Abstract: An insulation layer is formed on a substrate. A first mask is formed on the insulation layer. The first mask includes a plurality of line patterns arranged in a second direction. The plurality of line patterns extend in a first direction substantially perpendicular to the second direction. A second mask is formed on the insulation layer and the first mask. The second mask includes an opening partially exposing the plurality of line patterns. The opening has an uneven boundary at one of a first end portion in the first direction and a second end portion in a third direction substantially opposite to the first direction. The insulation layer is partially removed using the first mask and the second mask as an etching mask, thereby forming a plurality of first trenches and second trenches. The plurality of first trenches and the second trenches are arranged in a staggered pattern.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: August 25, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Bum-Seok Seo, Ki-Joon Kim, Kil-Ho Lee
  • Publication number: 20140264516
    Abstract: An insulation layer is formed on a substrate. A first mask is formed on the insulation layer. The first mask includes a plurality of line patterns arranged in a second direction. The plurality of line patterns extend in a first direction substantially perpendicular to the second direction. A second mask is formed on the insulation layer and the first mask. The second mask includes an opening partially exposing the plurality of line patterns. The opening has an uneven boundary at one of a first end portion in the first direction and a second end portion in a third direction substantially opposite to the first direction. The insulation layer is partially removed using the first mask and the second mask as an etching mask, thereby forming a plurality of first trenches and second trenches. The plurality of first trenches and the second trenches are arranged in a staggered pattern.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 18, 2014
    Inventors: Bum-Seok SEO, Ki-Joon KIM, Kil-Ho LEE
  • Patent number: 8319291
    Abstract: Provided is a non-volatile memory device including at least one horizontal electrode, at least one vertical electrode, at least one data storage layer and at least one reaction prevention layer. The least one vertical electrode crosses the at least one horizontal electrode. The at least one data storage layer is located in regions in which the at least one vertical electrode crosses the at least one horizontal electrode, and stores data by varying its electrical resistance. The at least one reaction prevention layer is located in the regions in which the at least one vertical electrode crosses the at least one horizontal electrode.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: November 27, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Deok-kee Kim, June-mo Koo, Ju-chul Park, Kyoung-won Na, Dong-seok Suh, Bum-seok Seo, Yoon-dong Park
  • Patent number: 7834206
    Abstract: Provided are an organic-metal precursor material that can be readily decomposed without reacting with an oxidant, a method of manufacturing a metal thin film using the organic-metal precursor material, and a metal thin film prepared using the organic-metal precursor material. The organic-metal precursor material is an organic molecule having lone-pair electrons selected from the group consisting of ether, amine, tetrahydrofuran (THF), a phosphine group, and a phosphite group, and has a structure of covalent coordination bond.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: November 16, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-hyun Lee, Bum-seok Seo
  • Publication number: 20100117054
    Abstract: Provided is a non-volatile memory device including at least one horizontal electrode, at least one vertical electrode, at least one data storage layer and at least one reaction prevention layer. The least one vertical electrode crosses the at least one horizontal electrode. The at least one data storage layer is located in regions in which the at least one vertical electrode crosses the at least one horizontal electrode, and stores data by varying its electrical resistance. The at least one reaction prevention layer is located in the regions in which the at least one vertical electrode crosses the at least one horizontal electrode.
    Type: Application
    Filed: September 11, 2009
    Publication date: May 13, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Deok-kee Kim, June-mo Koo, Ju-chul Park, Kyoung-won Na, Dong-seok Suh, Bum-seok Seo, Yoon-dong Park
  • Patent number: 7691441
    Abstract: A method of forming carbon fibers at a low temperature below 450° C. using an organic-metal evaporation method is provided. The method includes: heating a substrate and maintaining the substrate at a temperature of 200 to 450° C. after loading the substrate into a reaction chamber; preparing an organic-metal compound containing Ni; forming an organic-metal compound vapor by vaporizing the organic-metal compound; and forming carbon fibers on the substrate by facilitating a chemical reaction between the organic-metal compound vapor and a reaction gas containing ozone in the reaction chamber.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: April 6, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-ho Park, Myoung-jae Lee, June-mo Koo, Bum-seok Seo
  • Patent number: 7663136
    Abstract: Example embodiments relate to a method of manufacturing amorphous NiO thin films and nonvolatile memory devices including amorphous thin films that use a resistance material. Other example embodiments relate to a method of manufacturing amorphous NiO thin films having improved switching and resistance characteristics by reducing a leakage current and non-volatile memory devices using an amorphous NiO thin film. Provided is a method of manufacturing an amorphous NiO thin film having improved switching behavior by reducing leakage current and improving resistance characteristics. The method may include preparing a substrate in a vacuum chamber, preparing a nickel precursor material, preparing a source gas by vaporizing the nickel precursor material, preparing a reaction gas, preparing a purge gas and forming a monolayer NiO thin film on the substrate by performing one cycle of sequentially supplying the source gas, the purge gas, the reaction gas and the purge gas into the vacuum chamber.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: February 16, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Ho Park, Bum-Seok Seo, Myoung-Jae Lee, June-Mo Koo, Sun-Ae Seo, Young-Kwan Cha
  • Publication number: 20090326254
    Abstract: Provided are an organic-metal precursor material that can be readily decomposed without reacting with an oxidant, a method of manufacturing a metal thin film using the organic-metal precursor material, and a metal thin film prepared using the organic-metal precursor material. The organic-metal precursor material is an organic molecule having lone-pair electrons selected from the group consisting of ether, amine, tetrahydrofuran (THF), a phosphine group, and a phosphite group, and has a structure of covalent coordination bond.
    Type: Application
    Filed: September 8, 2009
    Publication date: December 31, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-hyun LEE, Bum-seok SEO
  • Patent number: 7601392
    Abstract: Provided are an organic-metal precursor material that can be readily decomposed without reacting with an oxidant, a method of manufacturing a metal thin film using the organic-metal precursor material, and a metal thin film prepared using the organic-metal precursor material. The organic-metal precursor material is an organic molecule having lone-pair electrons selected from the group consisting of ether, amine, tetrahydrofuran (THF), a phosphine group, and a phosphite group, and has a structure of covalent coordination bond.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: October 13, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-hyun Lee, Bum-seok Seo
  • Publication number: 20090126173
    Abstract: In a capacitor of a semiconductor device, a method of manufacturing the same and a memory device including the capacitor, the capacitor includes a lower electrode, a dielectric film on the lower electrode, an upper electrode on the dielectric film, and a first reaction barrier film for preventing a reaction between the lower electrode and the dielectric film, the first reaction barrier film being interposed between the lower electrode and the dielectric film.
    Type: Application
    Filed: December 10, 2008
    Publication date: May 21, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-hyun Lee, Bum-seok Seo
  • Patent number: 7518007
    Abstract: Provided are a Ge precursor for low temperature deposition containing Ge, N, and Si, a GST thin layer doped with N and Si formed using the same, a memory device including the GST thin layer doped with N and Si, and a method of manufacturing the GST thin layer. The Ge precursor for low temperature deposition contains N and Si such that the temperature at which the Ge precursor is deposited to form a thin layer, particularly, the GST thin layer doped with N and Si, can be low. In addition, during the low temperature deposition, H2 plasma can be used. The GST phase-change layer doped with N and Si formed from the Ge precursor for low temperature deposition has a low reset current. Therefore, a memory device including the GST phase-change layer doped with N and Si can be highly integrated, have a high capacity, and can be operated at a high speed.
    Type: Grant
    Filed: October 20, 2005
    Date of Patent: April 14, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bum-seok Seo, Jung-hyun Lee
  • Patent number: 7518213
    Abstract: A nonvolatile variable resistance memory device may include a lower electrode; a stacked structure including a first Cu compound layer disposed on the lower electrode, and a second Cu compound layer disposed on the first Cu compound layer; and an upper electrode disposed on the second Cu compound layer.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: April 14, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-jin Bae, Jung-hyun Lee, Sang-jun Choi, Bum-seok Seo
  • Patent number: 7507958
    Abstract: A conductive carbon nanotube tip and a manufacturing method thereof are provided. The conductive carbon nanotube tip includes a carbon nanotube tip substantially vertically placed on a substrate, and a ruthenium coating layer covering a surface of the carbon nanotube tip and extending to at least a part of the substrate. The manufacturing method includes substantially vertically placing a carbon nanotube tip on a substrate, and forming a ruthenium coating layer on the carbon nanotube tip and at least a part of the substrate.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: March 24, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-jun Choi, Jung-hyun Lee, Sang-bong Bang, Bum-seok Seo, Chang-soo Lee
  • Publication number: 20080210998
    Abstract: Provided is a method for manufacturing a material layer capable of increasing the deposition rate of a noble metal layer on a ferroelectric layer, a method for manufacturing a ferroelectric capacitor using the same, a ferroelectric capacitor manufactured by the same method, and a semiconductor memory device having the ferroelectric capacitor and a manufacturing method thereof. According to a method for manufacturing the material layer, a ferroelectric layer is formed. The ferroelectric layer may be exposed to seed plasma, and a material layer including a source material of the seed plasma may be formed on a region of the ferroelectric layer exposed to the seed plasma.
    Type: Application
    Filed: February 4, 2008
    Publication date: September 4, 2008
    Inventors: June-mo Koo, Bum-seok Seo, Young-soo Park, Jung-hyun Lee, Sang-min Shin, Suk-pil Kim
  • Publication number: 20080182037
    Abstract: Provided is a method of forming a metal layer. The method may include supplying a first source gas into a reaction chamber containing a substrate, purging the first source gas by supplying a first purging gas into the reaction chamber, supplying a first reactive gas containing nitrogen into the reaction chamber, and purging reaction byproducts generated by the first reactive gas by supplying a second purging gas into the reaction chamber. A plasma of the first reactive gas is formed on the substrate by applying a first RF power to the substrate when the first reactive gas is supplied to form a first metal layer.
    Type: Application
    Filed: September 26, 2007
    Publication date: July 31, 2008
    Inventors: Bum-seok Seo, Jung-hyun Lee
  • Patent number: 7352022
    Abstract: A capacitor having a dielectric layer including a composite oxide, the composite oxide including a transition metal and including a lanthanide group element, a memory device including the same and a method of manufacturing the capacitor are provided. The transition metal may be titanium and the composite oxide may be nitrided. The method may include providing a precursor of a transition metal, providing a precursor of a lanthanide group element, and forming a composite oxide on the lower electrode by oxidizing both the precursor of the transition metal and the precursor of the lanthanide group element, the composite oxide containing the transition metal and the lanthanide group element.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: April 1, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-hyun Lee, Sung-ho Park, Bum-seok Seo