Abstract: A panel board has a first voltage layer sandwiched between two ground layers at a close spacing to produce a large distributed capacitance; the two ground layers are connected by plated-through conductive holes spaced regularly across the board; a second (exposed) voltage layer is connected by regularly spaced plated-through holes to the first voltage layer, increasing the current carrying capacity of, and reducing the resistance across, the board; the plated-through holes are arranged in rows and columns in a pattern permitting the mounting of decoupling capacitors, at any point on the board, in a position parallel to the rows or parallel to the columns; and a socket terminal can be electrically connected directly to the exposed voltage layer or to the exposed ground layer using a ring connector.