Patents by Inventor Byung-guk SEO

Byung-guk SEO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210022249
    Abstract: A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.
    Type: Application
    Filed: October 1, 2020
    Publication date: January 21, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Byung-guk SEO, Sun-ki YUN, Su-jin KIM, Hwi-jong YOO, Young-rok OH
  • Patent number: 10820419
    Abstract: A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: October 27, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-guk Seo, Sun-ki Yun, Su-jin Kim, Hwi-jong Yoo, Young-rok Oh
  • Publication number: 20190373730
    Abstract: A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.
    Type: Application
    Filed: December 3, 2018
    Publication date: December 5, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Byung-guk SEO, Sun-ki YUN, Su-jin KIM, Hwi-jong YOO, Young-rok OH