Patents by Inventor Carla L. Christensen

Carla L. Christensen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210124491
    Abstract: Some embodiments include apparatuses and methods using a first memory area and a second memory area included a memory device, and using control circuitry included in the memory device to communicate with a memory controller. The memory controller includes an error correction engine. The control circuitry of the memory device is configured to retrieve the first information from the first memory area and store in the first information after the error correction engine performs an error detection operation on the first information. The control circuitry is configured to retrieve second information from the first memory area and store the second information in the second memory area without an additional error detection operation performed on the second information if a result from the error detection operation performed by the error correction engine on the first information meets a threshold condition.
    Type: Application
    Filed: December 31, 2020
    Publication date: April 29, 2021
    Inventor: Carla L. Christensen
  • Publication number: 20210109667
    Abstract: Electronic systems might include a plurality of groups of memory cells and a controller for access of the plurality of groups of memory cells that is configured to cause the electronic system to determine whether a reliability of a particular group of memory cells having a particular reliability rank allocated for storing data of a particular data level at a particular memory density is less than a target reliability, and, if so, determine whether the reliability of the particular group of memory cells at a reduced memory density is less than the target reliability, and, in response to determining that the reliability of the particular group of memory cells at the reduced density is less than the target reliability, allocate the particular group of memory cells for storing data of a lower data level and allocate a different group of memory cells for storing data of the particular data level.
    Type: Application
    Filed: December 23, 2020
    Publication date: April 15, 2021
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Carla L. Christensen, Avani F. Trivedi, Tracy D. Evans
  • Publication number: 20210103404
    Abstract: Systems, apparatuses, and methods related to media type selection are described. Memory systems can include multiple types of memory media (e.g., volatile and/or non-volatile) and can write data to the memory media types. Data inputs can be written (e.g., stored) in a particular type of memory media based on characteristics (e.g., source, attributes, and/or information etc. included in the data). For instance, selection of memory media can be based on characteristics of the memory media type and the attributes of the data input. In an example, a method can include receiving, by a memory system that comprises a plurality of memory media types, data from at least one of a plurality of sensors, identifying one or more attributes of the data; and selecting, based at least in part on the one or more attributes of the data, one or more of the memory media types to write the data to.
    Type: Application
    Filed: October 8, 2019
    Publication date: April 8, 2021
    Inventors: Zahra Hosseinimakarem, Carla L. Christensen, Radhika Viswanathan, Bhumika Chhabra
  • Patent number: 10950313
    Abstract: Methods of operating a memory having a first pool of memory cells having a first storage density and a second pool of memory cells having a second storage density greater than the first storage density, as well as apparatus configured to perform similar methods, might include determining whether a value of an indication of available power is less than a threshold, and, in response to determining that the value of the indication of available power is less than the threshold, increasing a size of the first pool of memory cells, limiting write operations of the memory to the first pool of memory cells, and postponing movement of data from the first pool of memory cells to the second pool of memory cells.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: March 16, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Avani F. Trivedi, Tracy D. Evans, Carla L. Christensen, Tomoko Ogura Iwasaki, Aparna U. Limaye
  • Patent number: 10942661
    Abstract: Some embodiments include apparatuses and methods using a first memory area and a second memory area included a memory device, and using control circuitry included in the memory device to communicate with a memory controller. The memory controller includes an error correction engine. The control circuitry of the memory device is configured to retrieve the first information from the first memory area and store in the first information after the error correction engine performs an error detection operation on the first information. The control circuitry is configured to retrieve second information from the first memory area and store the second information in the second memory area without an additional error detection operation performed on the second information if a result from the error detection operation performed by the error correction engine on the first information meets a threshold condition.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: March 9, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Carla L. Christensen
  • Publication number: 20210065820
    Abstract: Methods of operating a memory having a first pool of memory cells having a first storage density and a second pool of memory cells having a second storage density greater than the first storage density, as well as apparatus configured to perform similar methods, might include determining whether a value of an indication of available power is less than a threshold, and, in response to determining that the value of the indication of available power is less than the threshold, increasing a size of the first pool of memory cells, limiting write operations of the memory to the first pool of memory cells, and postponing movement of data from the first pool of memory cells to the second pool of memory cells.
    Type: Application
    Filed: August 28, 2019
    Publication date: March 4, 2021
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Avani F. Trivedi, Tracy D. Evans, Carla L. Christensen, Tomoko Ogura Iwasaki, Aparna U. Limaye
  • Patent number: 10891063
    Abstract: Methods of operating an electronic system include allocating a group of memory cells of a plurality of groups of memory cells having a particular rank of a plurality of ranks for storing data of a particular data level of a plurality of data levels, determining a need for an additional group of memory cells for storing data of the particular data level, moving or discarding data from a different group of memory cells storing data of a different data level of the plurality of data levels in response to determining the need for the additional group of memory cells for storing data of the particular data level, and allocating the different group of memory cells for storing data of the particular data level.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: January 12, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Carla L. Christensen, Avani F. Trivedi, Tracy D. Evans
  • Publication number: 20200167087
    Abstract: Methods of operating an electronic system include allocating a group of memory cells of a plurality of groups of memory cells having a particular rank of a plurality of ranks for storing data of a particular data level of a plurality of data levels, determining a need for an additional group of memory cells for storing data of the particular data level, moving or discarding data from a different group of memory cells storing data of a different data level of the plurality of data levels in response to determining the need for the additional group of memory cells for storing data of the particular data level, and allocating the different group of memory cells for storing data of the particular data level.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 28, 2020
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Carla L. Christensen, Avani F. Trivedi, Tracy D. Evans
  • Publication number: 20200133874
    Abstract: Disclosed in some examples are memory devices which feature customizable Single Level Cell (SLC) and Multiple Level Cell (MLC) configurations. The configuration (e.g., the size and position) of the SLC cache may have an impact on power consumption, speed, and other performance of the memory device. An operating system of an electronic device to which the memory device is installed may wish to achieve different performance of the device based upon certain conditions detectable by the operating system. In this way, the performance of the memory device can be customized by the operating system through adjustments of the performance characteristics of the SLC cache.
    Type: Application
    Filed: December 31, 2019
    Publication date: April 30, 2020
    Inventors: Carla L. Christensen, Jianmin Huang, Sebastien Andre Jean, Kulachet Tanpairoj
  • Patent number: 10572388
    Abstract: Disclosed in some examples are memory devices which feature customizable Single Level Cell (SLC) and Multiple Level Cell (MLC) configurations. The configuration (e.g., the size and position) of the SLC cache may have an impact on power consumption, speed, and other performance of the memory device. An operating system of an electronic device to which the memory device is installed may wish to achieve different performance of the device based upon certain conditions detectable by the operating system. In this way, the performance of the memory device can be customized by the operating system through adjustments of the performance characteristics of the SLC cache.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: February 25, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Carla L. Christensen, Jianmin Huang, Sebastien Andre Jean, Kulachet Tanpairoj
  • Publication number: 20190087267
    Abstract: Some embodiments include apparatuses and methods using a first memory area and a second memory area included a memory device, and using control circuitry included in the memory device to communicate with a memory controller. The memory controller includes an error correction engine. The control circuitry of the memory device is configured to retrieve the first information from the first memory area and store in the first information after the error correction engine performs an error detection operation on the first information. The control circuitry is configured to retrieve second information from the first memory area and store the second information in the second memory area without an additional error detection operation performed on the second information if a result from the error detection operation performed by the error correction engine on the first information meets a threshold condition.
    Type: Application
    Filed: November 20, 2018
    Publication date: March 21, 2019
    Inventor: Carla L. Christensen
  • Publication number: 20190065388
    Abstract: Disclosed in some examples are memory devices which feature customizable Single Level Cell (SLC) and Multiple Level Cell (MLC) configurations. The configuration (e.g., the size and position) of the SLC cache may have an impact on power consumption, speed, and other performance of the memory device. An operating system of an electronic device to which the memory device is installed may wish to achieve different performance of the device based upon certain conditions detectable by the operating system. In this way, the performance of the memory device can be customized by the operating system through adjustments of the performance characteristics of the SLC cache.
    Type: Application
    Filed: August 30, 2017
    Publication date: February 28, 2019
    Inventors: Carla L. Christensen, Jianmin Huang, Sebastien Andre Jean, Kulachet Tanpairoj
  • Patent number: 10169144
    Abstract: Some embodiments include apparatuses and methods using a first memory area and a second memory area included a memory device, and using control circuitry included in the memory device to communicate with a memory controller. The memory controller includes an error correction engine. The control circuitry of the memory device is configured to retrieve the first information from the first memory area and store in the first information after the error correction engine performs an error detection operation on the first information. The control circuitry is configured to retrieve second information from the first memory area and store the second information in the second memory area without an additional error detection operation performed on the second information if a result from the error detection operation performed by the error correction engine on the first information meets a threshold condition.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: January 1, 2019
    Assignee: Micron Technology, Inc.
    Inventor: Carla L. Christensen
  • Publication number: 20170206131
    Abstract: Some embodiments include apparatuses and methods using a first memory area and a second memory area included a memory device, and using control circuitry included in the memory device to communicate with a memory controller. The memory controller includes an error correction engine. The control circuitry of the memory device is configured to retrieve the first information from the first memory area and store in the first information after the error correction engine performs an error detection operation on the first information. The control circuitry is configured to retrieve second information from the first memory area and store the second information in the second memory area without an additional error detection operation performed on the second information if a result from the error detection operation performed by the error correction engine on the first information meets a threshold condition.
    Type: Application
    Filed: January 15, 2016
    Publication date: July 20, 2017
    Inventor: Carla L. Christensen