Abstract: A high voltage protection circuit for a non-tolerant integrated circuit is described herein. A non-tolerant integrated circuit may be a powered down integrated circuit or a low voltage tolerant integrated circuit, that may be exposed to a high voltage source such as an external circuit, device or power supply. The high voltage protection circuit includes a limiting transistor circuit, a control transistor circuit, and an isolation transistor circuit. The limiting transistor circuit limits or holds the voltage at the signal bump to be less than a voltage that can damage the circuit. The isolation transistor circuit disconnects input/output signal circuitry from normal protection circuitry. Both the limiting transistor circuit and the isolation transistor circuit are controlled by the control transistor circuit and are responsive to the power supply voltage being off.

Abstract: A high voltage protection circuit for a non-tolerant integrated circuit is described herein. A non-tolerant integrated circuit may be a powered down integrated circuit or a low voltage tolerant integrated circuit, that may be exposed to a high voltage source such as an external circuit, device or power supply. The high voltage protection circuit includes a limiting transistor circuit, a control transistor circuit, and an isolation transistor circuit. The limiting transistor circuit limits or holds the voltage at the signal bump to be less than a voltage that can damage the circuit. The isolation transistor circuit disconnects input/output signal circuitry from normal protection circuitry. Both the limiting transistor circuit and the isolation transistor circuit are controlled by the control transistor circuit and are responsive to the power supply voltage being off.

Abstract: A method and apparatus is provided for impedance matching for a system capable of supporting voice and data bands. The method includes receiving an input signal having a voice and data band, filtering at least a portion of the data band of the input signal to provide a filtered signal, and adjusting the impedance of the system for the voice band in response to the filtered signal to provide an output signal.

Abstract: A method and apparatus for providing data for sample rate conversion includes processing that begins by generating a data request interrupt based on a system clock and a sample rate conversion value. The processing continues by receiving a data ready control signal from a data processor. The processing proceeds to responding to the data request interrupt by providing a read signal to a temporary memory device. Based on the read signal, a 1st word of data is read from the temporary memory device and provided to a sample rate conversion module. The processing resumes by responding to the data ready control signal by providing a light signal to the temporary memory device. In accordance with the write signal, a 2nd word of data is written to the temporary memory device by the data processor.

Abstract: A method and apparatus for adjusting timing in a digital system or telecommunication system includes processing that begins by dividing a data clock by a 1st value to produce a divided data clock. The processing continues by dividing an analog front-end clock by a 2nd value to produce a divided analog front-end clock. The 1st and 2nd values are selected such that the divided data clock and the divided analog front-end clock have similar clock rates. The processing continues by comparing the phase of the divided data clock with the phase of the divided analog front-end clock to produce a phase difference. The processing continues by adjusting the analog front-end clock based on the phase difference to produce an adjusted analog front-end clock.

Abstract: A method and apparatus for waking up a circuit includes processing that begins by determining whether a signal is present on a data path by a 1st detection module. The 1st detection module is designed with passive components such that it consumes a minimal amount of power. In addition, the 1st detection module detects the presence of any signal on the received path using the energy of the signal. When a signal is detected, a 2nd detection module is enabled to determine whether a characteristic of the signal is one of a known set of characteristics. The known set of characteristics includes a phase relationship, magnitude, power level, frequency, and/or any other characteristic a telecommunication system may have. When the characteristic of the signal is one of the known set of characteristics, the digital circuitry of a modem is enabled.

Abstract: A current steering semi-digital reconstruction filter for a digital-to-analog conversion circuit, which includes a shift register having a 1-bit digital input stream and a plurality of output taps, where each output tap provides a 1-bit signal which has a value of a logic 1 or a logic 0, and a plurality of resistive paths, where each resistive path includes a resistive element which is connected to a common current source and to a first terminal of an active high switch and a first terminal of an active low switch. A single output tap is used to control the active high switch and the active low switch for a single resistive path. A second terminal of each active high switch of each of the plurality of resistive paths is connected to a non-inverted current path, and a second terminal of each active low switch for each of the plurality of resistive paths is connected to an inverted current path.

Abstract: A stereo audio CODEC, including means for performing D/A and A/D conversions, means for reducing digitally induced noise during attenuation/gain changes, data format conversion means, analog and digital filtering means, analog mixing means, on-chip 16-sample, 32-bit wide record and playback FIFOs, serial interface with external serial DSP, large local memory for supplementing on-chip record and playback FIFOs, control registers, register data bus and synthesizer DAC.

Abstract: This invention is for a digital-to-analog conversion circuit (DAC) which includes an interpolation filter circuit, a noise shaper circuit and a semi-digital FIR filter circuit. The entire DAC circuit provides noise shaping, analog filtering and oversampling functions.

Abstract: This invention includes a linear, low noise, low voltage operational amplifier which drives variable resistive and capacitive output loads and includes a slave emitter follower buffer stage.

Abstract: A method of cascading sigma-delta modulators includes the step of feeding the input to the quantizer of each modulator stage to the subsequent stage. Therefore, the signal which is fed to each of the subsequent stages is the difference between the output and the quantization noise of the previous stage. The method also includes the step of removing the quantization noise of the first two stages, as well as the output of the first two stages, so that the final output of the cascaded modulators is a delayed version of the input, plus a scaled version of the last stage which has been shaped with a fourth-order high pass function.

Abstract: A low noise apparatus for receiving an input current and producing an output current which mirrors the input current significantly increases accuracy and signal-to-noise ratio by greatly reducing the effects resulting from threshold voltage mismatches and 1/.function. noise. The apparatus comprises two cascode current mirrors. Further, the apparatus comprises a switching network which, in turn, comprises a plurality of switches formed within either a first or second electrical path. A first clock controls the switches formed within the first electrical path, while a second clock controls the switches formed within the second electrical path. When the first clock is in its first state and the second clock is in its second state, the switches formed within the first electrical path close to form the first cascode current mirror. However, the switches formed within the second electrical path remain open.

Abstract: A low distortion, low power output stage comprises a differential amplifier which replaces the source follower and constant current sources found in conventional output stages. Because there is no voltage drop between the inverting and noninverting differential inputs of the amplifier, no voltage drop exists between the input and output of the output stage. Thus, the gain stage or stages which precede the output stage are not required to swing above the output swing of the output stage. Additionally, because the amplifier has a common mode range which allows it to swing nearly rail-to-rail, the output of the output stage also swings nearly rail-to-rail.

Abstract: A method of cascading two second-order sigma-delta modulators includes the steps of feeding the input to the quantizer of the first stage to the second stage. This input is, effectively, the difference between the output of the first second-order loop and the quantization noise of the first modulator. The method also includes the step of removing both the quantization noise from the first loop as well as the output from the first loop from a final output, y.sub.out.

Abstract: A system and method for cascading three sigma-delta modulators involves applying an error signal representing the quantization error of a preceding modulator to a subsequent modulator. The error signal is scaled by a factor before being applied to a subsequent modulator. The quantized error signal of the subsequent modulator is then scaled by the reciprocal of the original scaling factor before being combined with the quantized outputs of the previous modulators. Combining the quantized outputs of the three modulators is performed so as to cancel the quantization error of the previous stages while shaping the noise at the last stage so that most of the noise is placed at high frequencies.

Abstract: An op-amp comprising a single gain stage amplifier cascaded with a buffer and an output stage. The buffer comprises an amplifier which isolates the gain stage from the output stage to prevent loading of the gain stage and create a more linear op-amp. For frequency compensation, the op-amp utilizes MOSFETs connected in a reversed biased configuration as load compensation capacitors. This technique reduces the non-linear effects of MOSFET gate capacitors utilized in conventional Miller compensation schemes and allows for digital fabrication technology of low distortion, low power supply operational amplifier design.

Abstract: A method for operating an apparatus for facilitating communications between an analog device and a digital device, which apparatus includes a plurality of signal processing circuits and a control circuit for controlling the signal processing circuits. Each of the signal processing circuits includes signal attenuators and signal burst discrimination circuitry. The apparatus is operable in a plurality of stable states, preferably in an idle stable state, a transmit stable state, and a receive stable state. The apparatus also is operable in a plurality of transitional states, including up-transition states and down-transition states.