Patents by Inventor Carlo Reita

Carlo Reita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9991892
    Abstract: Electronic device comprising at least: a plurality of MOSFET FD-SOI type transistors among which the first transistors are such that each first transistor comprises a channel in which a concentration of the same type of dopants as those present in the source and drain of said first transistor is greater than the concentration in the channel of each of the other transistors in said plurality of transistors; and an identification circuit capable of determining a unique identifier of the electronic device starting from at least one intrinsic electrical characteristic of each of the first transistors, the value of which depends at least partly on the conductance of said first transistor; and in which the length of a gate of each of the first transistors is less than or equal to about 20 nm.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: June 5, 2018
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Romain Wacquez, Jacques Fournier, Carlo Reita
  • Publication number: 20170338819
    Abstract: Electronic device comprising at least: a plurality of MOSFET FD-SOI type transistors among which the first transistors are such that each first transistor comprises a channel in which a concentration of the same type of dopants as those present in the source and drain of said first transistor is greater than the concentration in the channel of each of the other transistors in said plurality of transistors; and an identification circuit capable of determining a unique identifier of the electronic device starting from at least one intrinsic electrical characteristic of each of the first transistors, the value of which depends at least partly on the conductance of said first transistor; and in which the length of a gate of each of the first transistors is less than or equal to about 20 nm.
    Type: Application
    Filed: May 19, 2017
    Publication date: November 23, 2017
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Romain WACQUEZ, Jacques FOURNIER, Carlo REITA
  • Patent number: 6627489
    Abstract: A method for making CMOQ transistors and associated devices. The method is used to make transistors of a first type and a second type in CMOS technology in an active layer. The method etches regions of the active layer or making them inactive so as to define active islands designed to form sources, channels of determined width, and drains of the transistors of the first type and second type respectively, covers at least two active islands with an insulating layer and covers the insulating layer with a conductive layer, and sequentially etches all the gates of the transistors of the first type and then all the gates of the transistors of the second type. The associated devices includes CMOS transistor devices obtained by the method. Such a method may particularly find application to devices for the addressing and control of active matrix liquid crystal displays.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: September 30, 2003
    Assignee: Thomson-CSF
    Inventors: François Plais, Carlo Reita, Odile Huet