Patents by Inventor Carsten Schaeffer

Carsten Schaeffer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8884342
    Abstract: A semiconductor device includes a semiconductor body with a first surface, a contact electrode arranged on the first surface, and a passivation layer on the first surface adjacent the contact electrode. The passivation layer includes a layer stack with an amorphous semi-insulating layer on the first surface, a first nitride layer on the amorphous semi-insulating layer, and a second nitride layer on the first nitride layer.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: November 11, 2014
    Assignee: Infineon Technologies AG
    Inventors: Gerhard Schmidt, Josef-Georg Bauer, Carsten Schaeffer, Oliver Humbel, Angelika Koprowski, Sirinpa Monayakul
  • Patent number: 8815686
    Abstract: A method for production of doped semiconductor regions in a semiconductor body of a lateral trench transistor includes forming a trench in the semiconductor body and introducing dopants into at least one area of the semiconductor body that is adjacent to the trench, by carrying out a process in which dopants enter the at least one area through inner walls of the trench.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 26, 2014
    Assignee: Infineon Technologies AG
    Inventors: Franz Hirler, Uwe Wahl, Thorsten Meyer, Michael Rüb, Armin Willmeroth, Markus Schmitt, Carolin Tolksdorf, Carsten Schaeffer
  • Publication number: 20140061733
    Abstract: A semiconductor device includes a semiconductor body with a first surface, a contact electrode arranged on the first surface, and a passivation layer on the first surface adjacent the contact electrode. The passivation layer includes a layer stack with an amorphous semi-insulating layer on the first surface, a first nitride layer on the amorphous semi-insulating layer, and a second nitride layer on the first nitride layer.
    Type: Application
    Filed: August 29, 2012
    Publication date: March 6, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Gerhard Schmidt, Josef-Georg Bauer, Carsten Schaeffer, Oliver Humbel, Angelika Koprowski, Sirinpa Monayakul
  • Publication number: 20140015007
    Abstract: A semiconductor device includes a cell region having at least one device cell, wherein the at least one device cell includes a first device region of a first conductivity type. The semiconductor device further includes a drift region of a second conductivity type adjoining the first device region of the at least one device cell, a doped region of the first conductivity type adjoining the drift region, and charge carrier lifetime reduction means configured to reduce a charge carrier lifetime in the doped region of the first conductivity type.
    Type: Application
    Filed: June 21, 2013
    Publication date: January 16, 2014
    Inventors: Dorothea Werber, Frank Pfirsch, Hans-Joachim Schulze, Carsten Schaeffer, Volodymyr Komarnitskyy, Anton Mauder, Holger Schulze, Gerhard Miller
  • Publication number: 20130341673
    Abstract: A semiconductor device includes a first emitter region of a first conductivity type, a second emitter region of a second conductivity type complementary to the first conductivity type, and a drift region of the second conductivity type arranged in a semiconductor body. The first and second emitter regions are arranged between the drift region and a first electrode and are each connected to the first electrode. A device cell of a cell region includes a body region of the first conductivity type adjoining the drift region, a source region of the second conductivity type adjoining the body region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. A second electrode is electrically connected to the source region and the body region. A floating parasitic region of the first conductivity type is disposed outside the cell region.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Frank Pfirsch, Dorothea Werber, Anton Mauder, Carsten Schaeffer
  • Publication number: 20130341674
    Abstract: A semiconductor device includes a first emitter region of a first conductivity type, a second emitter region of a second conductivity type complementary to the first type, a drift region of the second conductivity type, and a first electrode. The first and second emitter regions are arranged between the drift region and first electrode and each connected to the first electrode. A device cell of a cell region includes a body region of the first conductivity type adjoining the drift region, a source region of the second conductivity type adjoining the body region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. A second electrode is electrically connected to the source and body regions. A parasitic region of the first conductivity type is disposed outside the cell region and includes at least one section with charge carrier lifetime reduction means.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Dorothea Werber, Frank Pfirsch, Hans-Joachim Schulze, Carsten Schaeffer, Volodymyr Komarnitskyy, Anton Mauder
  • Patent number: 8431988
    Abstract: A lateral trench transistor has a semiconductor body having a source region, a source contact, a body region, a drain region, and a gate trench, in which a gate electrode which is isolated from the semiconductor body is embedded. A heavily doped semiconductor region is provided within the body region or adjacent to it, and is electrically connected to the source contact, and whose dopant type corresponds to that of the body region.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: April 30, 2013
    Assignee: Infineon Technologies AG
    Inventors: Franz Hirler, Uwe Wahl, Thorsten Meyer, Michael Rüb, Armin Willmeroth, Markus Schmitt, Carolin Tolksdorf, Carsten Schäffer
  • Patent number: 8367532
    Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: February 5, 2013
    Assignee: Infineon Technologies AG
    Inventors: Anton Mauder, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schäffer, Franz-Josef Niedernostheide
  • Publication number: 20120315747
    Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.
    Type: Application
    Filed: July 26, 2012
    Publication date: December 13, 2012
    Inventors: Anton MAUDER, Hans-Joachim SCHULZE, Frank HILLE, Holger SCHULZE, Manfred PFAFFENLEHNER, Carsten SCHÄFFER, Franz-Josef NIEDERNOSTHEIDE
  • Patent number: 8304305
    Abstract: A method for producing a semiconductor component is proposed. The method includes providing a semiconductor body having a first surface; forming a mask on the first surface, wherein the mask has openings for defining respective positions of trenches; producing the trenches in the semiconductor body using the mask, wherein mesa structures remain between adjacent trenches; introducing a first dopant of a first conduction type using the mask into the bottoms of the trenches; carrying out a first thermal step; introducing a second dopant of a second conduction type, which is complementary to the first conduction type, at least into the bottoms of the trenches; and carrying out a second thermal step.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: November 6, 2012
    Assignee: Infineon Technologies Austria AG
    Inventors: Davide Chiola, Carsten Schaeffer
  • Patent number: 8252671
    Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: August 28, 2012
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schaeffer, Franz-Josef Niedernostheide
  • Publication number: 20110275202
    Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.
    Type: Application
    Filed: July 20, 2011
    Publication date: November 10, 2011
    Inventors: Anton MAUDER, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schäffer, Franz-Josef Niedernostheide
  • Publication number: 20110233728
    Abstract: A method for producing a semiconductor component is proposed. The method includes providing a semiconductor body having a first surface; forming a mask on the first surface, wherein the mask has openings for defining respective positions of trenches; producing the trenches in the semiconductor body using the mask, wherein mesa structures remain between adjacent trenches; introducing a first dopant of a first conduction type using the mask into the bottoms of the trenches; carrying out a first thermal step; introducing a second dopant of a second conduction type, which is complementary to the first conduction type, at least into the bottoms of the trenches; and carrying out a second thermal step.
    Type: Application
    Filed: June 8, 2011
    Publication date: September 29, 2011
    Applicant: Infineon Technologies Austria AG
    Inventors: Davide CHIOLA, Carsten SCHAEFFER
  • Patent number: 8003502
    Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: August 23, 2011
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schaeffer, Franz-Josef Niedernostheide
  • Patent number: 8003456
    Abstract: A method for producing a semiconductor component is proposed. The method includes providing a semiconductor body having a first surface; forming a mask on the first surface, wherein the mask has openings for defining respective positions of trenches; producing the trenches in the semiconductor body using the mask, wherein mesa structures remain between adjacent trenches; introducing a first dopant of a first conduction type using the mask into the bottoms of the trenches; carrying out a first thermal step; introducing a second dopant of a second conduction type, which is complementary to the first conduction type, at least into the bottoms of the trenches; and carrying out a second thermal step.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: August 23, 2011
    Assignee: Infineon Technologies Austria AG
    Inventors: Davide Chiola, Carsten Schaeffer
  • Patent number: 7880200
    Abstract: A semiconductor device and production method is disclosed. In one embodiment, the semiconductor device includes a first electrode and a second electrode, located on surfaces of a semiconductor body, and an insulated gate electrode. The semiconductor body has a contact groove for the first electrode in an intermediate oxide layer. Highly doped zones of a first conduction type are located in edge regions of the source connection zone. Below the highly doped zones of the first conduction type, there are highly doped zones of a body zone with a complementary conduction type. In a central region of the source connection zone, the body zone has a net charge carrier concentration with a complementary conduction type which is lower than the charge carrier concentration in the edge regions of the source connection zone.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: February 1, 2011
    Assignee: Infineon Technologies Austria AG
    Inventors: Frank Hille, Carsten Schaeffer, Frank Pfirsch, Holger Ruething
  • Patent number: 7538412
    Abstract: A semiconductor device includes a semiconductor material, the semiconductor material including a base region and a field stop zone including a first side adjacent the base region and a second side opposite the first side. The field stop zone includes a first dopant implant and a second dopant implant. The first dopant implant has a first dopant concentration maximum and the second dopant implant has a second dopant concentration maximum with the first dopant concentration maximum being less than the second dopant concentration maximum, and being located closer to the second side than the second dopant concentration maximum.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: May 26, 2009
    Assignee: Infineon Technologies Austria AG
    Inventors: Hans-Joachim Schulze, Franz-Josef Niedernostheide, Helmut Strack, Carsten Schaeffer, Frank Pfirsch
  • Patent number: 7514750
    Abstract: A semiconductor device according to the invention has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: April 7, 2009
    Assignee: Infineon Technologies AG
    Inventors: Anton Mauder, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schäffer, Franz-Josef Niedernostheide
  • Publication number: 20090085103
    Abstract: A semiconductor device and production method is disclosed. In one embodiment, the semiconductor device includes a first electrode and a second electrode, located on surfaces of a semiconductor body, and an insulated gate electrode. The semiconductor body has a contact groove for the first electrode in an intermediate oxide layer. Highly doped zones of a first conduction type are located in edge regions of the source connection zone. Below the highly doped zones of the first conduction type, there are highly doped zones of a body zone with a complementary conduction type. In a central region of the source connection zone, the body zone has a net charge carrier concentration with a complementary conduction type which is lower than the charge carrier concentration in the edge regions of the source connection zone.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Applicant: Infineon Technologies Austria AG
    Inventors: Frank Hille, Carsten Schaeffer, Frank Pfirsch, Holger Ruething
  • Publication number: 20080315363
    Abstract: A method for producing a semiconductor component is proposed. The method includes providing a semiconductor body having a first surface; forming a mask on the first surface, wherein the mask has openings for defining respective positions of trenches; producing the trenches in the semiconductor body using the mask, wherein mesa structures remain between adjacent trenches; introducing a first dopant of a first conduction type using the mask into the bottoms of the trenches; carrying out a first thermal step; introducing a second dopant of a second conduction type, which is complementary to the first conduction type, at least into the bottoms of the trenches; and carrying out a second thermal step.
    Type: Application
    Filed: June 25, 2008
    Publication date: December 25, 2008
    Applicant: Infineon Technologies Austria AG
    Inventors: DAVIDE CHIOLA, Carsten Schaeffer