Patents by Inventor Cerina Zhang

Cerina Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9926192
    Abstract: A method of the invention includes reducing stiction of a MEMS device by providing a conductive path for electric charge collected on a bump stop formed on a substrate. The bump stop is formed by depositing and patterning a dielectric material on the substrate, and the conductive path is provided by a conductive layer deposited on the bump stop. The conductive layer can also be roughened to reduce stiction.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: March 27, 2018
    Assignee: INVENSENSE, INC.
    Inventors: Cerina Zhang, Nim Tea
  • Patent number: 9738511
    Abstract: A MEMS (microelectromechanical systems) structure comprises a MEMS wafer. A MEMS wafer includes a cap with cavities bonded to a structural layer through a dielectric layer disposed between the cap and the structural layer. Unique configurations of MEMS devices and methods of providing such are set forth which provide for, in part, creating rounded, scalloped or chamfered MEMS profiles by shaping the etch mask photoresist reflow, by using a multi-step deep reactive ion etch (DRIE) with different etch characteristics, or by etching after DRIE.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: August 22, 2017
    Assignee: INVENSENSE, INC.
    Inventors: Jongwoo Shin, Kirt Reed Williams, Cerina Zhang, Kuolung (Dino) Lei
  • Patent number: 9731963
    Abstract: Semiconductor manufacturing processes include providing a first substrate having a first passivation layer disposed above a patterned top-level metal layer, and further having a second passivation layer disposed over the first passivation layer; the second passivation layer has a top surface. The processes further include forming an opening in a first portion of the second passivation layer, and the opening exposes a portion of a surface of the first passivation layer. The processes further include patterning the second and first passivation layers to expose portions of the patterned top-level metal layer and bonding a second substrate and the first substrate to each other. The bonding occurs within a temperature range in which at least the exposed portion of the first passivation layer undergoes outgassing.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: August 15, 2017
    Assignee: Invensense, Inc.
    Inventors: Cerina Zhang, Martin Lim, Jongwoo Shin, Joseph Seeger
  • Patent number: 9650241
    Abstract: A method for forming a MEMS device includes coupling a MEMS substrate and a base substrate. The MEMS substrate and the base substrate contain at least two enclosures. One enclosures has a first vertical gap between the bonding surface of the MEMS substrate and the bonding surface of the base substrate that is less than a second vertical gap between the bonding surface of the MEMS substrate and the bonding surface of the base substrate than another of the enclosures to provide a height difference between the first vertical gap and the second vertical gap. The method includes bonding the bonding surfaces of the one of the two enclosures at a first pressure to provide a first sealed enclosure. The method includes bonding the bonding surfaces of other of the two enclosures at a second pressure to provide a second sealed enclosure.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: May 16, 2017
    Assignee: INVENSENSE, INC.
    Inventors: Cerina Zhang, Martin Lim
  • Publication number: 20170081181
    Abstract: A method for forming a MEMS device includes coupling a MEMS substrate and a base substrate. The MEMS substrate and the base substrate contain at least two enclosures. One enclosures has a first vertical gap between the bonding surface of the MEMS substrate and the bonding surface of the base substrate that is less than a second vertical gap between the bonding surface of the MEMS substrate and the bonding surface of the base substrate than another of the enclosures to provide a height difference between the first vertical gap and the second vertical gap. The method includes bonding the bonding surfaces of the one of the two enclosures at a first pressure to provide a first sealed enclosure. The method includes bonding the bonding surfaces of other of the two enclosures at a second pressure to provide a second sealed enclosure.
    Type: Application
    Filed: September 17, 2015
    Publication date: March 23, 2017
    Inventors: Cerina ZHANG, Martin LIM
  • Publication number: 20170001861
    Abstract: Semiconductor manufacturing processes include providing a first substrate having a first passivation layer disposed above a patterned top-level metal layer, and further having a second passivation layer disposed over the first passivation layer; the second passivation layer has a top surface. The processes further include forming an opening in a first portion of the second passivation layer, and the opening exposes a portion of a surface of the first passivation layer. The processes further include patterning the second and first passivation layers to expose portions of the patterned top-level metal layer and bonding a second substrate and the first substrate to each other. The bonding occurs within a temperature range in which at least the exposed portion of the first passivation layer undergoes outgassing.
    Type: Application
    Filed: September 14, 2016
    Publication date: January 5, 2017
    Inventors: Cerina ZHANG, Martin LIM, Jongwoo SHIN, Joseph SEEGER
  • Patent number: 9452925
    Abstract: Semiconductor manufacturing processes include providing a first substrate having a first passivation layer disposed above a patterned top-level metal layer, and further having a second passivation layer disposed over the first passivation layer; the second passivation layer has a top surface. The processes further include forming an opening in a first portion of the second passivation layer, and the opening exposes a portion of a surface of the first passivation layer. The processes further include patterning the second and first passivation layers to expose portions of the patterned top-level metal layer and bonding a second substrate and the first substrate to each other. The bonding occurs within a temperature range in which at least the exposed portion of the first passivation layer undergoes outgassing.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: September 27, 2016
    Assignee: InvenSense, Inc.
    Inventors: Cerina Zhang, Martin Lim, Jongwoo Shin, Joseph Seeger
  • Publication number: 20160075554
    Abstract: A MEMS device having a channel configured to avoid particle contamination is disclosed. The MEMS device includes a MEMS substrate and a base substrate. The MEMS substrate includes a MEMS device area, a seal ring and a channel. The seal ring provides for dividing the MEMS device area into a plurality of cavities, wherein at least one of the plurality of cavities includes one or more vent holes. The channel is configured between the one or more vent holes and the MEMS device area. Preferably, the channel is configured to minimize particles entering the MEMS device area directly. The base substrate is coupled to the MEMS device substrate.
    Type: Application
    Filed: September 10, 2015
    Publication date: March 17, 2016
    Inventors: Anatole HUANG, Jongwoo SHIN, Peter SMEYS, Cerina ZHANG, Jong Il SHIN
  • Publication number: 20160039668
    Abstract: A MEMS device and fabrication of MEMS device is disclosed. The method includes providing a device layer, disposing a sacrificial layer over a first surface of the device layer, forming at least one MEMS feature in the device layer, wherein the formed MEMS feature is attached to the sacrificial layer. Selective portions of the sacrificial layer are removed so as to permit movement of the formed MEMS feature.
    Type: Application
    Filed: August 8, 2014
    Publication date: February 11, 2016
    Inventor: CERINA ZHANG
  • Publication number: 20150360939
    Abstract: Semiconductor manufacturing processes include providing a first substrate having a first passivation layer disposed above a patterned top-level metal layer, and further having a second passivation layer disposed over the first passivation layer; the second passivation layer has a top surface. The processes further include forming an opening in a first portion of the second passivation layer, and the opening exposes a portion of a surface of the first passivation layer. The processes further include patterning the second and first passivation layers to expose portions of the patterned top-level metal layer and bonding a second substrate and the first substrate to each other. The bonding occurs within a temperature range in which at least the exposed portion of the first passivation layer undergoes outgassing.
    Type: Application
    Filed: August 21, 2015
    Publication date: December 17, 2015
    Inventors: Cerina Zhang, Martin Lim, Jongwoo Shin, Joseph Seeger
  • Publication number: 20150353353
    Abstract: A method of the invention includes reducing stiction of a MEMS device by providing a conductive path for electric charge collected on a bump stop formed on a substrate. The bump stop is formed by depositing and patterning a dielectric material on the substrate, and the conductive path is provided by a conductive layer deposited on the bump stop. The conductive layer can also be roughened to reduce stiction.
    Type: Application
    Filed: August 14, 2015
    Publication date: December 10, 2015
    Inventors: Cerina Zhang, Nim Tea
  • Patent number: 9136165
    Abstract: A method of the invention includes reducing stiction of a MEMS device by providing a conductive path for electric charge collected on a bump stop formed on a substrate. The bump stop is formed by depositing and patterning a dielectric material on the substrate, and the conductive path is provided by a conductive layer deposited on the bump stop. The conductive layer can also be roughened to reduce stiction.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: September 15, 2015
    Assignee: INVENSENSE, INC.
    Inventors: Cerina Zhang, Nim Tea
  • Publication number: 20150076631
    Abstract: A MEMS (microelectromechanical systems) structure comprises a MEMS wafer. A MEMS wafer includes a cap with cavities bonded to a structural layer through a dielectric layer disposed between the cap and the structural layer. Unique configurations of MEMS devices and methods of providing such are set forth which provide for, in part, creating rounded, scalloped or chamfered MEMS profiles by shaping the etch mask photoresist reflow, by using a multi-step deep reactive ion etch (DRIE) with different etch characteristics, or by etching after DRIE.
    Type: Application
    Filed: March 25, 2014
    Publication date: March 19, 2015
    Applicant: InvenSense, Inc.
    Inventors: Jongwoo SHIN, Kirt Reed WILLIAMS, Cerina ZHANG, Kuolung (Dino) LEI
  • Publication number: 20140353774
    Abstract: A method of the invention includes reducing stiction of a MEMS device by providing a conductive path for electric charge collected on a bump stop formed on a substrate. The bump stop is formed by depositing and patterning a dielectric material on the substrate, and the conductive path is provided by a conductive layer deposited on the bump stop. The conductive layer can also be roughened to reduce stiction.
    Type: Application
    Filed: June 4, 2013
    Publication date: December 4, 2014
    Inventors: Cerina Zhang, Nim Tea