Abstract: A radio-frequency switch may include: a common port; a first signal transfer unit; and a second signal transfer unit, wherein the first signal transfer unit includes a first switch unit that has a plurality of switch circuit units, each of the plurality of switch circuit units having switches connected to each other with one forward-biased and another reverse-biased and being connected to a control terminal of respective switches in the first signal transfer part, and the second signal transfer unit includes a second switch unit that has a plurality of switch circuit units, each of the plurality of switch circuit units having switches connected to each other with one forward-biased and another reverse-biased and being connected to a control terminal of respective switches in the second signal transfer part.

Abstract: There is provided a high frequency switch including: a first signal transferring unit including a plurality of first switching devices; a second signal transferring unit including a plurality of second switching devices; a first shunting unit including a plurality of third switching devices; and a second shunting unit including a plurality of fourth switching devices.

Abstract: There is provided a high frequency switch including: a first signal transferring unit including a plurality of first switching devices and at least one first diode device individually connected to control terminals of the plurality of first switching devices to enable or block signal flow between a common port transmitting and receiving a first high frequency signal and a first port inputting and outputting the first high frequency signal; and a second signal transferring unit including a plurality of second switching devices and at least one second diode device individually connected to control terminals of the plurality of second switching devices to enable or block signal flow between the common port transmitting and receiving a second high frequency signal and a second port inputting and outputting the second high frequency signal.

Abstract: Disclosed herein are a tunable capacitance control circuit and a tunable capacitance control method. The tunable capacitance control method is a tunable capacitance control method by a tunable capacitance control circuit including an MIM capacitor, a plurality of FET switches, and a control unit, wherein the control unit outputs control signals allowing only one of the plurality of (n) FET switches to be switched on and the remaining (n?1) FET switches to be switched off to the plurality of FET switches, thereby obtaining a desired tunable capacitance value.

Abstract: There is provided a variable capacitance circuit, including a capacitance circuit unit connected between a first terminal and a second terminal and providing a preset capacitance, a variable capacitance circuit unit including a first transistor connected to the capacitance circuit unit in series between the first terminal and the second terminal, the first transistor being operated according to a gate voltage, and a switching unit connected between a body of the first transistor and an input terminal of a preset body voltage, wherein the switching unit is turned off when the first transistor is turned on and turned on when the first transistor is turned off.

Abstract: There is provided a high frequency switch including: a first signal transferring unit including a plurality of first switching devices and at least one first diode device individually connected to control terminals of the plurality of first switching devices to enable or block signal flow between a common port transmitting and receiving a first high frequency signal and a first port inputting and outputting the first high frequency signal; and a second signal transferring unit including a plurality of second switching devices and at least one second diode device individually connected to control terminals of the plurality of second switching devices to enable or block signal flow between the common port transmitting and receiving a second high frequency signal and a second port inputting and outputting the second high frequency signal.

Abstract: The present invention relates to a switching circuit, which can adjust characteristics such as insertion loss, isolation, and reflection loss according to the need by including a plurality of input/output terminals; at least one antenna; a plurality of main switches for connecting or disconnecting between each of the plurality of input/output terminals and the antenna; and a plurality of shunt switches having one ends respectively connected to the plurality of input/output terminals, wherein a voltage of less than 0 is applied to the other end of at least one of the plurality of shunt switches.

Abstract: Disclosed herein are a tunable capacitance control circuit and a tunable capacitance control method. The tunable capacitance control method is a tunable capacitance control method by a tunable capacitance control circuit including an MIM capacitor, a plurality of FET switches, and a control unit, wherein the control unit outputs control signals allowing only one of the plurality of (n) FET switches to be switched on and the remaining (n-1) FET switches to be switched off to the plurality of FET switches, thereby obtaining a desired tunable capacitance value.

Abstract: Disclosed herein are a hybrid variable capacitor, an RF apparatus, a method for manufacturing a hybrid variable capacitor, and a method for tuning a variable capacitor. The hybrid variable capacitor used in a tunable matching network includes: a metal-insulator-metal (MIM) cap array including one or more MIM capacitors and having varied capacitance equivalent to values of a lower-bit region among digital values corresponding to capacitance to be tuned; and a MOS varactor connected in parallel to the MIM cap array and having varied capacitance equivalent to values of an upper-bit region among the digital values.

Abstract: There are provided a digital signal converter and a method of converting a digital signal. The digital signal converter includes: a signal reception unit analyzing a digital input signal received according to a first form; a signal output unit transmitting a digital output signal according to a second form, different from the first form; and a controller converting the digital input signal received according to the first form into a digital output signal to be transmitted according to the second form, wherein the controller controls a power level of the digital output signal according to power supply methods of the first and second forms. Signal transmission and reception methods according to various interfaces may be provided in a limited form factor by adjusting the standard and coding of a digital signal transmitted and received through different interfaces and as to whether to supply power.

Abstract: There is provided an RF module performing radio communications and allowing for a significantly reduced distance between an antenna and a semiconductor chip. To this end, the RF module includes a semiconductor chip; and a substrate including an anntenna unit formed by a circuit pattern thereon, and having a surface on which the semiconductor chip is mounted to be electrically connected to the antenna unit.

Abstract: There are provided a mobile device including a Zigbee module and an method of operation thereof. The mobile device includes: a power supply unit; a Zigbee module operated by receiving power supplied from the power supply unit and connected to external electronic devices so that the Zigbee module communicates with the external electronic devices, to thereby provide a remote control function; and a switching unit controlling a connection between the power supply unit and the Zigbee module, wherein the power supply unit includes a main power supply unit and an auxiliary power supply unit supplying power to the Zigbee module when residual power in the main power supply unit falls to a predetermined reference value or less, whereby the remote control function and the position tracking function using the mobile device can be provided even when there is no sufficient residual power therein.

Abstract: There are provided a digital signal converter and a method of converting a digital signal. The digital signal converter includes: a signal reception unit analyzing a digital input signal received according to a first form; a signal output unit transmitting a digital output signal according to a second form, different from the first form; and a controller converting the digital input signal received according to the first form into a digital output signal to be transmitted according to the second form, wherein the controller controls a power level of the digital output signal according to power supply methods of the first and second forms. Signal transmission and reception methods according to various interfaces may be provided in a limited form factor by adjusting the standard and coding of a digital signal transmitted and received through different interfaces and as to whether to supply power.

Abstract: There are provided a terminal capable of selecting a suitable wireless module among a plurality of wireless modules depending on a situation and providing an optimal image even in a state in which a display unit is separated from a main body by performing wireless communication, and a wireless communication method thereof. To enable this, the terminal includes a main body generating and transmitting image data in response to an external input; a display unit mountable on or demountable from the main body, receiving the image data from the main body and displaying an image corresponding to the image data; and a wireless communication unit provided in each of the main body and the display unit, switching a wireless communication frequency band on the basis of a transmission rate of the image data and transmitting the image data to the display unit.

Abstract: A successive approximation analog/digital converter includes a sample & hold part sampling and holding an intensity of an analog input signal using a single clock cycle of a clock signal; a first comparator comparing the intensity of the analog input signal with comparison voltages determined according to estimated digital values per clock cycle following an operating clock cycle of the sample & hold part; a second comparator comparing the intensity of the analog input signal with a value equal to ½ of a preset reference voltage in the latter half of the operating clock cycle of the sample & hold part; a successive approximation register determining a value of an MSB of a digital value to be converted according to the comparison result of the second comparator and values of bits successive to the MSB according to the comparison result of the first comparator, and generating the estimated digital values by applying estimated values to undetermined bits; and a digital/analog converter generating the

Abstract: There is provided a high-rate wireless receiving apparatus which can effectively receive a wireless signal even in a Non-Line of Sight state by using a millimeter-wave band (e.g., 60 GHz) or a THz frequency band (100 GHz or above). The high-rate wireless receiving apparatus includes an antenna receiving a high-rate wireless signal, a radio frequency processing unit processing the high-rate wireless signal received from the antenna to thereby generate a base-band signal, a base-band processing unit processing the base-band signal to thereby generate information data included in the high-rate wireless signal, and a reception information data storing unit storing the information data.

Abstract: A successive approximation analog/digital converter includes a sample & hold part sampling and holding an intensity of an analog input signal using a single clock cycle of a clock signal; a first comparator comparing the intensity of the analog input signal with comparison voltages determined according to estimated digital values per clock cycle following an operating clock cycle of the sample & hold part; a second comparator comparing the intensity of the analog input signal with a value equal to ½ of a preset reference voltage in the latter half of the operating clock cycle of the sample & hold part; a successive approximation register determining a value of an MSB of a digital value to be converted according to the comparison result of the second comparator and values of bits successive to the MSB according to the comparison result of the first comparator, and generating the estimated digital values by applying estimated values to undetermined bits; and a digital/analog converter generating the

Abstract: Provided is a switched capacitor resonator including at least one integrator circuit having a differential operational amplifier and a sub feedback circuit configured with a switched capacitor circuit. A main feedback circuit connecting main input and output terminals of the switched capacitor resonator to each other may be configured with the switched capacitor circuit. The main feedback circuit may be connected to the sub feedback circuit included in one of the integrator circuits. A capacitor of the main feedback circuit can serve as an integration capacitor connected between the input and output terminals of the differential operational amplifier. Consequently, it is possible to improve an operating speed by reducing a settling time constant of the integrator circuit.

Abstract: Provided is a switched capacitor resonator including at least one integrator circuit having a differential operational amplifier and a sub feedback circuit configured with a switched capacitor circuit. A main feedback circuit connecting main input and output terminals of the switched capacitor resonator to each other may be configured with the switched capacitor circuit. The main feedback circuit may be connected to the sub feedback circuit included in one of the integrator circuits. A capacitor of the main feedback circuit can serve as an integration capacitor connected between the input and output terminals of the differential operational amplifier. Consequently, it is possible to improve an operating speed by reducing a settling time constant of the integrator circuit.

Abstract: The present invention relates to a multiple output crystal oscillator having a plurality of output terminals for implementing multiple output and Integrated Circuit (IC) chips. More particularly, the crystal oscillator comprises a crystal resonator, a first IC chip having an oscillating circuit block and a frequency-adjusting circuit block, a second IC chip having an output-adjusting block, and a substrate structure for mounting said first and second IC chips, wherein said output terminals include a basic output terminal for outputting the oscillating signal from said first IC chip and at least one additional output terminal for outputting at least one wave form-adjusted oscillation signal from said second IC chip. In the present invention, said basic output terminal is placed on one of four underside corners of said substrate, and said additional output terminal is placed on the portion of the underside except the corners.