Patents by Inventor Chang-Wook Jeong

Chang-Wook Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7569401
    Abstract: Magnetic RAM cells have split sub-digit lines surrounded by cladding layers and methods of fabricating the same are provided. The magnetic RAM cells include first and second sub-digit lines formed over a semiconductor substrate. Only a bottom surface and an outer sidewall of the first sub-digit line are covered with a first cladding layer pattern. In addition, only a bottom surface and an outer sidewall of the second sub-digit line are covered with a second cladding layer pattern. The outer sidewall of the first sub-digit line is located distal from the second sub-digit line and the outer sidewall of the second sub-digit line is located distal the first sub-digit line. Methods of fabricating the magnetic RAM cells are also provided.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: August 4, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Hyun Park, Hyeong-Jun Kim, Won-Cheol Jeong, Chang-Wook Jeong, Hong-sik Jeong, Gi-Tae Jeong
  • Publication number: 20090101881
    Abstract: In one embodiment, a phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern.
    Type: Application
    Filed: December 18, 2008
    Publication date: April 23, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Jong Song, Young-Nam Hwang, Sang-Don Nam, Sung-Lae Cho, Gwan-Hyeob Koh, Choong-Man Lee, Bong-Jin Kuh, Yong-Ho Ha, Su-Youn Lee, Chang-Wook Jeong, Ji-Hye Yi, Kyung-Chang Ryoo, Se-Ho Lee, Su-Jin Ahn, Soon-Oh Park, Jang-Eun Lee
  • Patent number: 7521281
    Abstract: Phase-changeable memory devices include non-volatile memory cells. Each of these non-volatile memory cells may include a phase-changeable diode on a semiconductor substrate and a phase-changeable memory element having a first terminal electrically coupled to a terminal of the phase-changeable diode. This phase-changeable diode may include a lower electrode pattern on the semiconductor substrate, a first phase-changeable pattern on the lower electrode pattern and a gate switching layer pattern on the first phase-changeable pattern. The phase-changeable memory element includes a second phase-changeable pattern electrically coupled to the terminal of the phase-changeable diode and a memory switching layer pattern on the second phase-changeable pattern. The memory switching layer pattern may include a composite of a titanium layer pattern contacting the phase-changeable memory element and a titanium nitride layer pattern contacting the titanium layer pattern.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: April 21, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-Youn Lee, Su-Jin Ahn, Chang-Wook Jeong
  • Patent number: 7521706
    Abstract: Phase change memory devices and methods of making phase changeable memory devices including a heating electrode disposed on a substrate are provided. The heating electrode includes an electrode hole in the heating electrode. A phase change material pattern is provided in the electrode hole and contacts a sidewall of the electrode hole. In some embodiments, the electrode hole extends through the heating electrode. In some embodiments, the phase changeable material pattern only contacts the electrode at a sidewall of the electrode hole.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: April 21, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Cheol Jeong, Hyeong-Jun Kim, Jae-Hyun Park, Chang-Wook Jeong
  • Patent number: 7488981
    Abstract: Phase change Random Access Memory (PRAM) devices include a substrate and a phase change layer pattern on the substrate. The phase change layer pattern includes a sharp tip and at least one wall that extends from the sharp tip in a direction away from the substrate. At least one contact hole node is provided that contacts the phase change material pattern adjacent the sharp tip.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: February 10, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Cheol Jeong, Hyeong-Jun Kim, Jae-Hyun Park, Chang-Wook Jeong
  • Patent number: 7482616
    Abstract: In one embodiment, a phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: January 27, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Jong Song, Young-Nam Hwang, Sang-Don Nam, Sung-Lae Cho, Gwan-Hyeob Koh, Choong-Man Lee, Bong-Jin Kuh, Yong-Ho Ha, Su-Youn Lee, Chang-Wook Jeong, Ji-Hye Yi, Kyung-Chang Ryoo, Se-Ho Lee, Su-Jin Ahn, Soon-Oh Park, Jang-Eun Lee
  • Publication number: 20090016099
    Abstract: In a memory device and in a method of programming the same, a memory device comprises: a plurality of memory cells, each memory cell comprising a resistance-changeable material that has an initial resistance that is determined in response to an applied programming current in a programming operation; and a modification circuit that modifies the resistance of the memory cell following a programming operation of the memory cell to vary the resistance of the memory cell from the initial resistance to a second resistance by applying a saturation current in a saturation operation. Each memory cell is connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation, that is used to apply the saturation current to the corresponding memory cell in the saturation operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a subsequent read operation.
    Type: Application
    Filed: March 28, 2008
    Publication date: January 15, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chang-Wook Jeong, Dae-Hwan Kang, Hyeong-Jun Kim, Jae-Min Shin, Seung-Pil Ko
  • Publication number: 20080316804
    Abstract: In a method of controlling resistance drift in a memory cell of a resistance-changeable material memory device, the resistance changeable material in the memory cell is treated so that a drift parameter for the memory cell is less than about 0.18, wherein a change in resistance of a memory cell over the time period is determined according to the relationship: Rdrift=RinitialĂ—t?; where Rdrift represents a final resistance of the memory cell following the time period, Rinitial represents the initial resistance of the memory cell following the programming operation, t represents the time period; and ? represents the drift parameter.
    Type: Application
    Filed: March 28, 2008
    Publication date: December 25, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chang-Wook Jeong, Dae-Hwan Kang, Hyeong-Jun Kim, Seung-Pil Ko, Dong-Won Lim
  • Publication number: 20080283813
    Abstract: A semiconductor memory device includes first conductive lines on a substrate, an interlayer insulating layer with a plurality of via holes on the substrate, second conductive lines on the interlayer insulating layer, and a resistive memory material in the via holes and electrically connected to the first and second conductive lines, the resistive memory material having a vertically non-uniform specific resistance profile with respect to the substrate.
    Type: Application
    Filed: January 29, 2008
    Publication date: November 20, 2008
    Inventor: Chang-wook Jeong
  • Publication number: 20080266942
    Abstract: A memory device comprises a plurality of memory cells, each memory cell comprising a memory cell material that has an initial resistance that is determined in response to an applied programming current in a programming operation, the resistance of the memory cell varying from the initial resistance over a time period following the programming operation, and each memory cell being connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a read operation. A modification circuit modifies the resistance of a memory cell of the plurality of memory cells selected for a read operation to return its resistance to near the initial resistance prior to a read operation of the memory cell.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 30, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chang-Wook Jeong, Gi-Tae Jeong, Hyeong-Jun Kim, Seung-Pil Ko
  • Patent number: 7440308
    Abstract: A phase-change random access memory device may include a phase-change pattern, a first electrode structure connected to the phase-change pattern, and a second electrode structure spaced apart from the first electrode structure and connected to the phase-change pattern, wherein at least one of the first electrode structure and the second electrode structure includes a plurality of resistor patterns connected to the phase-change pattern in parallel.
    Type: Grant
    Filed: September 5, 2006
    Date of Patent: October 21, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang Wook Jeong, Su-Youn Lee, Won-Cheol Jeong, Jae-Hyun Park, Su-Jin Ahn, Fai Yeung
  • Publication number: 20080191188
    Abstract: A phase-change random access memory (PRAM) device includes a first electrode and a second electrode on a substrate. A phase change pattern is interposed between the first and second electrodes. An interlayer insulating layer having a contact hole is provided on the substrate. The phase change pattern may be disposed in the contact hole. The phase change pattern includes a plurality of doping patterns having different doping concentrations. Methods of forming a multi-bit PRAM device are also disclosed.
    Type: Application
    Filed: February 5, 2008
    Publication date: August 14, 2008
    Inventor: Chang-Wook Jeong
  • Patent number: 7411208
    Abstract: A phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: August 12, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Nam Hwang, Gwan-Hyeob Koh, Su-Jin Ahn, Sung-Lae Cho, Se-Ho Lee, Kyung-Chang Ryoo, Chang-Wook Jeong, Su-Youn Lee, Bong-Jin Kuh
  • Publication number: 20080160643
    Abstract: Magnetic RAM cells have split sub-digit lines surrounded by cladding layers and methods of fabricating the same are provided. The magnetic RAM cells include first and second sub-digit lines formed over a semiconductor substrate. Only a bottom surface and an outer sidewall of the first sub-digit line are covered with a first cladding layer pattern. In addition, only a bottom surface and an outer sidewall of the second sub-digit line are covered with a second cladding layer pattern. The outer sidewall of the first sub-digit line is located distal from the second sub-digit line and the outer sidewall of the second sub-digit line is located distal the first sub-digit line. Methods of fabricating the magnetic RAM cells are also provided.
    Type: Application
    Filed: March 13, 2008
    Publication date: July 3, 2008
    Inventors: Jae-Hyun Park, Hyeong-Jun Kim, Won-Cheol Jeong, Chang-Wook Jeong, Hong-sik Jeong, Gi-Tae Jeong
  • Publication number: 20080111120
    Abstract: An integrated circuit memory cell includes a substrate having a first semiconductor region of first conductivity type (e.g., N-type) therein, which may define a portion of a word line within the substrate. An electrically insulating layer is provided on the substrate. The electrically insulating layer has an opening therein that extends opposite a recess in the first semiconductor region. A first insulating spacer is provided on a sidewall of the recess in the first semiconductor region. A diode is provided in the opening. The diode has a first terminal electrically coupled to a bottom of the recess in the first semiconductor region. A variable resistivity material region (e.g., phase-changeable material region) is also provided. The variable resistivity material region is electrically coupled to a second terminal of the diode.
    Type: Application
    Filed: July 25, 2007
    Publication date: May 15, 2008
    Inventors: Kwang woo Lee, Jae-hee Oh, Chang-wook Jeong
  • Publication number: 20080007986
    Abstract: A method of programming a one-time programmable device is provided. A switching device disposed in a substrate is turned on and a program current is applied to a fuse electrically connected to the switching device, thereby cutting the fuse. The fuse includes a first electrode electrically connected to the switching device, a second electrode spaced apart from the first electrode, and a chalcogenide pattern disposed between the first and second electrodes. Related one-time programmable devices, phase change memory devices and electronic systems are also disclosed.
    Type: Application
    Filed: November 29, 2006
    Publication date: January 10, 2008
    Inventors: Chang-Wook Jeong, Jun-Hyok Kong, Hyung-Rok Oh
  • Publication number: 20070155093
    Abstract: A phase-change random-access memory (PRAM) device includes a chalcogenide element, the chalcogenide element comprising a material which can assume a crystalline state or an amorphous state upon application of a heating current. A first contact is connected to a first region of the chalcogenide element and has a first cross-sectional area. A second contact is connected to a second region of the chalcogenide element and having a second cross-sectional area. A first programmable volume of the chalcogenide material is defined in the first region of the chalcogenide element, a state of the first programmable volume being programmable according to a resistance associated with the first contact. A second programmable volume of the chalcogenide material is defined in the second region of the chalcogenide element, a state of the second programmable volume being programmable according to a second resistance associated with the second contact.
    Type: Application
    Filed: October 26, 2006
    Publication date: July 5, 2007
    Inventors: Won-Cheol Jeong, Hyeong-Jun Kim, Se-Ho Lee, Jae-Hyun Park, Chang-Wook Jeong
  • Publication number: 20070076486
    Abstract: A PRAM and method of forming the same are disclosed. In various embodiments, the PRAM includes a lower insulation layer formed on a semiconductor substrate, a phase change material pattern formed on the lower insulation layer and a heating electrode contacting the phase change material pattern. The heating electrode can be formed of a material having a positive temperature coefficient such that specific resistance of the material increases as a function of temperature.
    Type: Application
    Filed: August 22, 2006
    Publication date: April 5, 2007
    Inventors: Won-Cheol Jeong, Se-Ho Lee, Jae-Hyun Park, Chang-Wook Jeong
  • Publication number: 20060270180
    Abstract: Phase-changeable memory devices include non-volatile memory cells. Each of these non-volatile memory cells may include a phase-changeable diode on a semiconductor substrate and a phase-changeable memory element having a first terminal electrically coupled to a terminal of the phase-changeable diode. This phase-changeable diode may include a lower electrode pattern on the semiconductor substrate, a first phase-changeable pattern on the lower electrode pattern and a gate switching layer pattern on the first phase-changeable pattern. The phase-changeable memory element includes a second phase-changeable pattern electrically coupled to the terminal of the phase-changeable diode and a memory switching layer pattern on the second phase-changeable pattern. The memory switching layer pattern may include a composite of a titanium layer pattern contacting the phase-changeable memory element and a titanium nitride layer pattern contacting the titanium layer pattern.
    Type: Application
    Filed: August 4, 2006
    Publication date: November 30, 2006
    Inventors: Su-Youn Lee, Su-Jin Ahn, Chang-Wook Jeong
  • Publication number: 20060215435
    Abstract: According to one embodiment, at least a portion of the phase change material including a first crystalline phase is converted to one of a second crystalline phase and an amorphous phase. The second crystalline phase transitions to the amorphous phase more easily than the first crystalline phase. For example the first crystalline phase may be a hexagonal closed packed structure and the first crystalline phase may be a face centered cubic structure.
    Type: Application
    Filed: May 30, 2006
    Publication date: September 28, 2006
    Inventors: Chang-Wook JEONG, Jun-Hyok Kong, Ji-Hye Yi, Beak-Hyung Cho