Patents by Inventor Chang Yang
Chang Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11940388Abstract: Example methods are provided to improve placement of an adaptor (210,220) to a mobile computing device (100) to measure a test strip (221) coupled to the adaptor (220) with a camera (104) and a screen (108) on a face of the mobile computing device (100). The method may include displaying a light area on a first portion of the screen (108). The first portion may be adjacent to the camera (104). The light area and the camera (104) may be aligned with a key area of the test strip (221) so that the camera (104) is configured to capture an image of the key area. The method may further include providing first guiding information for a user to place the adaptor (210,220) to the mobile computing device (100) according to a position of the light area on the screen (108).Type: GrantFiled: March 16, 2018Date of Patent: March 26, 2024Assignee: IXENSOR CO., LTD.Inventors: Yenyu Chen, An Cheng Chang, Tai I Chen, Su Tung Yang, Chih Jung Hsu, Chun Cheng Lin, Min Han Wang, Shih Hao Chiu
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Patent number: 11943930Abstract: A semiconductor memory device and methods of manufacturing and operating the same are set forth. The semiconductor memory device includes a stack structure including a plurality of interlayer insulating layers and a plurality of gate electrodes, which may be alternately stacked on a substrate, and a plurality of channel structures penetrating the stack structure in a vertical direction. Each of the plurality of channel structures includes a channel layer, a tunnel insulating layer, an emission preventing layer, and a charge storage layer, each of which vertically extends toward the substrate.Type: GrantFiled: June 14, 2023Date of Patent: March 26, 2024Assignee: SK hynix Inc.Inventors: Dong Uk Lee, Hae Chang Yang
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Patent number: 11941157Abstract: A computer implemented method for managing the scope of permissions granted by users to application that includes collecting a set of permissions for an application from an application provider publication; and collecting a process flow for functional steps of the application from a review of the application that is published on a product review type publication. The computer implemented method further includes dividing the functional steps of the application into a plurality of journeys, each of said plurality of journeys having a function associated with a stage of a functional step from a perspective of a user; and matching permissions from the set of permissions for each journey of said plurality of journeys to provide matched permissible permissions to journeys stored in a customer journey store.Type: GrantFiled: December 16, 2020Date of Patent: March 26, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hao Chun Hung, Po-Cheng Chiu, Tsai-Hsuan Hsieh, Cheng-Lun Yang, Chiwen Chang, Shin Yu Wey
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Publication number: 20240094769Abstract: A display device includes a display panel including a first active area and a second active area slidable in a first direction, a plurality of segments spaced apart from one another in the first direction, extending in a second direction intersecting the first direction, and supporting a lower surface of the second active area, a panel housing having a guide rail engaged with a portion of each of the segments to guide a sliding motion of the display panel, and a first roller extending in the second direction, disposed in the panel housing, and surrounded by the lower surface of the second active area. The first roller includes a central portion having a first diameter, and a stepped portion protruding from the central portion in the second direction, forming a level difference with the central portion, and overlapping at least one of the segments to form a space.Type: ApplicationFiled: May 17, 2023Publication date: March 21, 2024Applicant: Samsung Display Co., LTD.Inventors: Tae Chang KIM, Hae Jin KIM, Tae Hoon YANG
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Publication number: 20240097067Abstract: A manufacturing method of an electronic element module is provided. The method includes: disposing a plurality of first micro-light-emitting diodes on a first temporary substrate; and replacing at least one defective micro-light-emitting diode of the first micro-light-emitting diodes with at least one second micro-light-emitting diode. The first micro-light-emitting diodes and at least one second micro-light-emitting diode are distributed on the first temporary substrate. The first micro-light-emitting diodes and at least one second micro-light-emitting diode have same properties, and at least one of the appearance difference, the height difference and the orientation difference exists between the first micro-light-emitting diodes and at least one second micro-light-emitting diode. A semiconductor structure and a display panel are also provided.Type: ApplicationFiled: December 4, 2023Publication date: March 21, 2024Applicant: PlayNitride Display Co., Ltd.Inventors: Bo-Wei Wu, Yu-Yun Lo, Chien-Chen Kuo, Chang-Feng Tsai, Tzu-Yang Lin
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Publication number: 20240096803Abstract: An integrated circuit includes a device, a first interconnect structure disposed above the device and a second interconnect structure positioned below the device. The first interconnect structure includes multiple frontside metal layers. The second interconnect structure includes multiple backside metal layers, where each backside metal layer includes metal conductors routed according to diagonal routing. In some embodiments, a backside interconnect structure can include another backside metal layer that includes metal conductors routed according to mixed-Manhattan-diagonal routing. A variety of techniques can be used to route signals between metal conductors in the backside interconnect structure and cells on one or more frontside metal layers.Type: ApplicationFiled: November 22, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Hsiung Chen, Jerry Chang Jui Kao, Kuo-Nan Yang, Jack Liu
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Publication number: 20240099035Abstract: A semiconductor structure is presented including a first memory array and a second memory array directly connected to the first memory array by nanosheet stacks and backside contacts. The first and second memory arrays collectively define a double-sided memory array on a complementary metal oxide semiconductor (CMOS) wafer. The nanosheet stacks separate the first memory array from the second memory array so that two different types of memory devices are integrated together into a single CMOS chip.Type: ApplicationFiled: September 16, 2022Publication date: March 21, 2024Inventors: Wu-Chang Tsai, Ailian Zhao, Ashim Dutta, Chih-Chao Yang
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Publication number: 20240096677Abstract: A method of correcting a misalignment of a wafer on a wafer holder and an apparatus for performing the same are disclosed. In an embodiment, a semiconductor alignment apparatus includes a wafer stage; a wafer holder over the wafer stage; a first position detector configured to detect an alignment of a wafer over the wafer holder in a first direction; a second position detector configured to detect an alignment of the wafer over the wafer holder in a second direction; and a rotational detector configured to detect a rotational alignment of the wafer over the wafer holder.Type: ApplicationFiled: November 28, 2023Publication date: March 21, 2024Inventors: Chia-Cheng Chen, Chih-Kai Yang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo
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Patent number: 11934027Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: GrantFiled: June 21, 2022Date of Patent: March 19, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
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Patent number: 11933207Abstract: Exhaust systems are described. In examples, an exhaust flow path couples exhaust ports with one or more turbochargers of an engine. The exhaust flow path may have a portion flowing through a cylinder head (e.g., couplable to the exhaust ports) and a portion flowing through an exhaust manifold (couplable to the cylinder head and the turbocharger(s)). The flow paths may be shaped to reduce the sharpness of turns between the exhaust ports and the turbocharger(s). For example, curves along the flow path may be less than 90 degrees or have a minimum curve radius, which may vary along the flow path. Additionally, at least two, independent flow paths may exist between the exhaust ports and the turbocharger(s). The cross-sectional shape of any part of the flow path may be elliptical, including at inlets and outlets.Type: GrantFiled: June 23, 2022Date of Patent: March 19, 2024Assignee: PACCAR IncInventors: Greg Bonsen, Paul Hancock, Huateng Yang, Chang-Wook Lee, Olivier Lebastard
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Publication number: 20240088291Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.Type: ApplicationFiled: November 15, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Chang Sun, Sheng-Chih Lai, Yu-Wei Jiang, Kuo-Chang Chiang, TsuChing Yang, Feng-Cheng Yang, Chung-Te Lin
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Publication number: 20240077885Abstract: A self-moving device, including: a moving module, a task execution module, a control module. The control module is electrically connected to the moving module and the task execution module, controls the moving module to actuate the self-moving device to move, controls the task execution module to execute a working task. The self-moving device further includes a satellite navigation apparatus, electrically connected to the control module and configured to receive a satellite signal and output current location information of the self-moving device. The control module determines whether quality of location information output by the satellite navigation apparatus at a current location satisfies a preset condition, controls, if the quality does not satisfy the preset condition, the moving module to actuate the self-moving device to change a moving manner, to enable quality of location information output by the satellite navigation apparatus at a location after the movement to satisfy the preset condition.Type: ApplicationFiled: November 10, 2023Publication date: March 7, 2024Inventors: Yong Shao, Mingming He, Chang Zhou, Zhou Yang, Gen Sun, Yue Rao
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Publication number: 20240078362Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network.Type: ApplicationFiled: November 13, 2023Publication date: March 7, 2024Inventors: Norman CHANG, Hsiming PAN, Jimin WEN, Deqi ZHU, Wenbo XIA, Akhilesh KUMAR, Wen-Tze CHUANG, En-Cih YANG, Karthik SRINIVASAN, Ying-Shiun LI
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Patent number: 11923251Abstract: A method includes forming a gate stack, which includes a gate dielectric and a metal gate electrode over the gate dielectric. An inter-layer dielectric is formed on opposite sides of the gate stack. The gate stack and the inter-layer dielectric are planarized. The method further includes forming an inhibitor film on the gate stack, with at least a portion of the inter-layer dielectric exposed, selectively depositing a dielectric hard mask on the inter-layer dielectric, with the inhibitor film preventing the dielectric hard mask from being formed thereon, and etching to remove a portion of the gate stack, with the dielectric hard mask acting as a portion of a corresponding etching mask.Type: GrantFiled: May 7, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsu-Hsiu Perng, Kai-Chieh Yang, Zhi-Chang Lin, Teng-Chun Tsai, Wei-Hao Wu
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Patent number: 11922838Abstract: A display panel, comprising a first insulating structural layer, a first crack detection line, a second insulating structural layer and a second crack detection line which are sequentially arranged on a substrate, wherein the first crack detection line and the second crack detection line are both located in a peripheral area and are arranged around a display area, one end of the first crack detection line is configured to receive a detection signal, and the other end of the first crack detection line is configured to output a first output signal, and one end of the second crack detection line is configured to receive a detection signal and the other end of the second crack detection line is configured to output a second output signal.Type: GrantFiled: April 13, 2021Date of Patent: March 5, 2024Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Yu Wang, Yi Zhang, Tingliang Liu, Chang Luo, Hao Zhang, Huijuan Yang, Tinghua Shang, Yang Zhou, Pengfei Yu, Shun Zhang, Xiaofeng Jiang, Huijun Li, Linhong Han
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Patent number: 11923357Abstract: An interfacial structure, along with methods of forming such, are described. The structure includes a first interfacial layer having a first dielectric layer, a first conductive feature disposed in the first dielectric layer, and a first thermal conductive layer disposed on the first dielectric layer. The structure further includes a second interfacial layer disposed on the first interfacial layer. The second interfacial layer is a mirror image of the first interfacial layer with respect to an interface between the first interfacial layer and the second interfacial layer. The second interfacial layer includes a second thermal conductive layer disposed on the first thermal conductive layer, a second dielectric layer disposed on the second thermal conductive layer, and a second conductive feature disposed in the second dielectric layer.Type: GrantFiled: January 18, 2021Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kai-Fang Cheng, Kuang-Wei Yang, Cherng-Shiaw Tsai, Hsiaokang Chang
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Publication number: 20240070690Abstract: Disclosed are a method and a system for forecasting an agricultural product price based on signal decomposition and deep learning. The method includes: S1, obtaining price subsequences by performing a complementary ensemble empirical mode decomposition (CEEMD) on an original price sequence of agricultural products; S2, obtaining a reconstructed sequence based on the price subsequences; S3, obtaining data features of the reconstructed sequence based on the reconstructed sequence; and S4, constructing a Bi-directional Sequence to Sequence (BiSeq2seq) model, and inputting the data features of the reconstructed sequence into a CCS-Bi-directional Sequence to Sequence (CCS-BiSeq2seq) model to obtain a forecasting result.Type: ApplicationFiled: October 24, 2022Publication date: February 29, 2024Inventors: Xinsheng ZHANG, Runzhou WANG, Chang YANG, Yiwei HAN, Chunyang WU, Yanan LI
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Publication number: 20240074188Abstract: A semiconductor device may include a source line, a bit line, and a gate structure located between the source line and the bit line. The gate structure may include conductive layers and insulating layers that are alternately stacked. The semiconductor device may include a topological insulator that may extend from the bit line to the source line through the gate structure. The topological insulator may include a non-conductor region and semiconductor regions coupled to the non-conductor region and located at a sidewall of the topological insulator. The semiconductor device may also include a memory layer surrounding the topological insulator.Type: ApplicationFiled: February 10, 2023Publication date: February 29, 2024Applicant: SK hynix Inc.Inventors: Dong Uk LEE, Hae Chang YANG
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Publication number: 20240069305Abstract: An imaging lens assembly module includes an imaging lens element set, a lens carrier and a light blocking structure. The imaging lens element set has an optical axis. At least one lens element of the lens elements is disposed in the lens carrier. The light blocking structure includes a light blocking opening. The optical axis passes through the light blocking opening, and the light blocking opening includes at least two arc portions and a shrinking portion. Each of the arc portions has a first curvature radius for defining a maximum diameter of the light blocking opening. The shrinking portion is connected to the arc portions for forming the light blocking opening into a non-circular shape. The shrinking portion includes at least one protruding arc which extends and shrinks gradually from the shrinking portion to the optical axis, and the protruding arc has a second curvature radius.Type: ApplicationFiled: November 8, 2023Publication date: February 29, 2024Inventors: Lin-An CHANG, Ming-Ta CHOU, Shu-Yun YANG, Cheng-Feng LIN
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Patent number: D1019504Type: GrantFiled: June 23, 2022Date of Patent: March 26, 2024Assignee: PACCAR IncInventors: Greg Bonsen, Paul Hancock, Huateng Yang, Chang-Wook Lee, Olivier Lebastard