Abstract: The present disclosure provides a fruit tree pollination method for preventing and controlling an Erwinia amylovora-caused disease, belonging to the technical field of plant protection and fruit tree cultivation. The method includes: (1) mixing a pollen nutrient solution with a bactericide, and adding refined pollen to obtain a pollen suspension; alternatively, mixing a bactericide powder with the refined pollen and a filler to prepare a mixed powder; where the bactericide is any one or more selected from the group consisting of albendazole, an antibacterial polypeptide, and zhongshengmycin; and (2) conducting pollination on a fruit tree with the pollen suspension or the mixed powder in a flowering stage.

Abstract: A semiconductor device is provided. For example, the semiconductor device can include a plurality of transistors that are arranged in an array in an X-Y plane. Each of the transistors can include a channel extending in Z direction. The semiconductor device can further include a plurality of word lines. Each of the word lines can electrically connect neighboring some of the transistors that are arranged in a column in X direction at lateral walls of the channels thereof. The semiconductor device can further include one or more electromagnetic shielding elements. At least one of the electromagnetic shielding elements can be disposed between neighboring two of the transistors that are disposed in a row in Y direction.

Abstract: A semiconductor device is provided. For example, the semiconductor device can include a plurality of transistors that are arranged in an array in an X-Y plane. Each of the transistors can include a channel extending in Z direction. The semiconductor device can further include a plurality of word lines. Each of the word lines can electrically connect neighboring some of the transistors that are arranged in a column in X direction at lateral walls of the channels thereof. The semiconductor device can further include one or more electromagnetic shielding elements. At least one of the electromagnetic shielding elements can be disposed between neighboring two of the transistors that are disposed in a row in Y direction.

Abstract: An apparatus is disclosed having a parity buffer having a plurality of parity pages and one or more dies, each die having a plurality of layers in which data may be written. The apparatus also includes a storage controller configured to write a stripe of data across two or more layers of the one or more dies, the stripe having one or more data values and a parity value. When a first data value of the stripe is written, it is stored as a current value in a parity page of the parity buffer, the parity page corresponding to the stripe. For each subsequent data value that is written, an XOR operation is performed with the subsequent data value and the current value of the corresponding parity page and the result of the XOR operation is stored as the current value of the corresponding parity page.

Abstract: A method, an apparatus, a system, a device, and a storage medium for implementing terminal verification are provided. In this method, a transmission feature of a terminal is reconstructed to verify the terminal. For example, if a difference between the transmission feature obtained through reconstruction and the transmission feature of the terminal is relatively large, it indicates that the transmission feature of the terminal is abnormal, and the terminal is an abnormal terminal. In this case, it is determined that the verification of the terminal fails.

Abstract: In some implementations, the present disclosure relates to a method. The method includes obtaining a set of weights for a neural network comprising a plurality of nodes and a plurality of connections between the plurality of nodes. The method also includes identifying a first subset of weights and a second subset of weights based on the set of weights. The first subset of weights comprises weights that used by the neural network. The second subset of weights comprises weights that are prunable. The method further includes storing the first subset of weights in a first portion of a memory. A first error correction code is used for the first portion of the memory. The method further includes storing the second subset of weights in a second portion of the memory. A second error correction code is used for the second portion of the memory. The second error correction code is weaker than the first error correction code.

Abstract: A device for storing a sheet pile in a converting machine (10) comprises a transfer mechanism (28) for delivering sheets (22) into a piling area (26) of the device (22), and a sampling plate (44) which is adjustable between a sampling position and an access position, wherein the top of the piling area (26) is covered by the sampling plate (44) when the sampling plate (44) is in the sampling position and the top of the piling area (26) is free when the sampling plate (44) is in the access position.

Abstract: A bio-information detection substrate and a gene chip are provided. The substrate includes a first main surface, the first main surface includes a test region and a dummy region located around the test region, at least one accommodation region is disposed on the first main surface, and the accommodation region is located in the dummy region.

Abstract: A method of judging lack-of-freon in an air conditioner and an air conditioner control method. The control method includes: acquiring outflow air temperatures at the first air outlet and the second air outlet, and calculating a temperature difference; comparing the temperature difference with a preset temperature difference threshold; and adjusting an opening degree of the expansion valve accordingly. In the method, the opening degree of the expansion valve can be automatically adjusted according to a result of temperature comparison to compensate for the flow rate of freon, so as to improve the cooling or heating efficiency of the air conditioning system and realize the adaptive adjustment of the air conditioner, thereby ensuring the cooling or heating efficiency of the system even if the system lacks freon to a slight extent and effectively reducing energy consumption. The judging method has a higher accuracy of judging result, and is easier to implement.

Abstract: The present disclosure discloses a 690 MPa high-strength medium-manganese steel with low yield ratio and medium thickness and a manufacture method thereof, which relates to the technical field of steel smelting. The 690 MPa high-strength medium-manganese steel with low yield ratio and medium thickness is composed of the following chemical composition in mass percentage: C: 0.05%-0.10%, Mn: 4.1%-4.7%, Si: 0.15%-0.4%, P?0.010%, S?0.003%, Ti: 0.01%-0.05%, Ni+Cr+Mo?0.6%, and the balance of Fe and unavoidable impurities. The steel plate manufactured meets the safety performance and construction cost requirements of the construction machinery on the ultra-high-strength steel in complex environments.

Abstract: A data storage device includes a memory device that includes a plurality of zones of a zoned namespace and a controller coupled to the memory device. During operation, the controller maintains a window-based read and write monitor data structure to determine the read density and write density of each of the zones. The read density and write density are utilized to determine a cost for allocating wear leveling data for each zone. Based on the cost and the available storage capacity of the storage class memory, data, in a data management operation, is moved to either the storage class memory or the zone with the low cost. The host device is informed of the storage class memory usage for future data management operations.

Abstract: Certain aspects of the present disclosure provide techniques for performing compute in memory (CIM) computations. A device comprises a CIM module configured to apply analog weights to input data using multiply-accumulate operations to generate an output. The device further comprises a digital weight storage unit configured to store digital weight references, wherein a digital weight reference corresponds to an analog weight of the analog weights. The device also comprises a device controller configured to program the analog weights to the CIM module, cause the CIM module to process the input data, and reprogram one or more analog weights that are degraded. The digital weight references in the digital weight storage unit are populated with values from a host processing device. Degraded analog weights in the CIM module are reprogrammed based on the corresponding digital weight references from the digital weight storage unit without reference to the host processing device.

Abstract: Certain aspects of the present disclosure provide techniques for performing compute in memory (CIM) computations. A device comprises a CIM module configured to apply a plurality of analog weights to data using multiply-accumulate operations to generate an output. The device further comprises a digital weight storage unit configured to store digital weight references, wherein a digital weight reference corresponds to an analog weight of the plurality of analog weights. The device also comprises a device controller configured to program the plurality of analog weights to the CIM module based on the digital weight references and determine degradation of one or more analog weights. The digital weight references in the digital weight storage unit are populated with values from a host device. Degraded analog weights in the CIM module are replaced with corresponding digital weight references from the digital weight storage unit without reference to the host device.

Abstract: Disclosed is an ensemble coupled assimilation system for numerical prediction and the method thereof. The ensemble coupled assimilation system includes a module for integrating coupled models and managing collaborative ensemble operation, an assimilation algorithms integration module, a module for configuring ensemble coupled assimilation experiment, and an online interaction module for ensemble coupled assimilation.

Abstract: In certain aspects, a three-dimensional (3D) memory device includes a first semiconductor structure including an array of memory cells, a second semiconductor structure including a peripheral circuit, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The peripheral circuit includes a 3D transistor. The array of memory cells is coupled to the peripheral circuit across the bonding interface.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The memory device is arranged in a plurality of logical planes and the controller is configured to write log data and user data to separate planes within the memory device, such that the log data and user data are isolated from each other on separate planes. The controller is configured to read log data from one plane and user data on another plane simultaneously, where the log data and the user data are isolated from each other on separate planes.

Abstract: In certain aspects, a memory device includes an array of memory cells, a plurality of word lines coupled to the array of memory cells, and a plurality of peripheral circuits coupled to the array of memory cells and configured to control the array of memory cells. A first peripheral circuit of the plurality of peripheral circuits includes a first three-dimensional (3D) transistor coupled to the array of memory cells through at least one of the plurality of word lines. The first 3D transistor includes a 3D semiconductor body, and a gate structure in contact with a plurality of sides of the 3D semiconductor body. The gate structure includes a gate dielectric and a gate electrode.

Abstract: In certain aspects, a memory device includes an array of memory cells and a plurality of peripheral circuits coupled to the array of memory cells and configured to control the array of memory cells. A first peripheral circuit of the plurality of peripheral circuits includes a first three-dimensional (3D) transistor. The first 3D transistor includes a 3D semiconductor body, and a gate structure in contact with a plurality of sides of the 3D semiconductor body. The gate structure includes a gate dielectric and a gate electrode. The gate electrode includes a metal, and the gate dielectric has a thickness between 1.8 nm and 10 nm.

Abstract: In certain aspects, a memory device includes an array of memory cells, a plurality of word lines coupled to the array of memory cells, and a plurality of peripheral circuits coupled to the array of memory cells and configured to control the array of memory cells. A first peripheral circuit of the plurality of peripheral circuits includes a first three-dimensional (3D) transistor coupled to the array of memory cells through at least one of the plurality of bit lines. The first 3D transistor includes a 3D semiconductor body, and a gate structure in contact with a plurality of sides of the 3D semiconductor body. The gate structure includes a gate dielectric and a gate electrode.

Abstract: A measuring device for determining magnetic properties of a magnetizable test specimen comprises a measuring coil winding which passes around a magnetizable measuring coil core. The measuring coil core comprises magnetic flux passage faces arranged at a distance from one another. The test specimen is arranged adjacently to the magnetic flux passage faces. A high-current pulse through the measuring coil winding causes a magnetic flux through the measuring coil core and the test specimen. A temporal profile of electrical characteristic variables of the measuring coil winding is detected using a sensor device. The electrical characteristic variables of the measuring coil winding detected by the sensor device are set in a ratio to additionally ascertained electrical characteristic variables of the measuring coil winding without the test specimen. A magnetic property of the test specimen is determined from the ratio of the electrical characteristic variables to one another.