Patents by Inventor Charles A. Gealer

Charles A. Gealer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150163904
    Abstract: A microelectronic package of the present description may comprises a first microelectronic device having at least one row of connection structures electrically connected thereto and a second microelectronic device having at least one row of connection structures electrically connected thereto, wherein the connection structures within the at least one first microelectronic device row are aligned with corresponding connection structures within the at least one second microelectronic device row in an x-direction.
    Type: Application
    Filed: December 11, 2013
    Publication date: June 11, 2015
    Applicant: Intel Corporation
    Inventors: Omkar G. Karhade, John S. Guzek, Johanna M. Swan, Christopher J. Nelson, Nitin A. Deshpande, William J. Lambert, Charles A. Gealer, Feras Eid, Islam A. Salama, Kemal Aygun, Sasha N. Oster, Tyler N. Osborn
  • Publication number: 20150163921
    Abstract: This disclosure relates generally to devices, systems, and methods for making a flexible microelectronic assembly. In an example, a polymer is molded over a microelectronic component, the polymer mold assuming a substantially rigid state following the molding. A routing layer is formed with respect to the microelectronic component and the polymer mold, the routing layer including traces electrically coupled to the microelectronic component. An input is applied to the polymer mold, the polymer mold transitioning from the substantially rigid state to a substantially flexible state upon application of the input.
    Type: Application
    Filed: December 11, 2013
    Publication date: June 11, 2015
    Inventors: Sasha Oster, Robert L. Sankman, Charles Gealer, Omkar Karhade, John S. Guzek, Ravi V. Mahajan, James C. Matayabas, JR., Johanna Swan, Feras Eid, Shawna Liff, Timothy McIntosh, Telesphor Teles Kamgaing, Adel Elsherbini, Kemal Aygun
  • Publication number: 20150091182
    Abstract: A die assembly formed on a thin dielectric sheet is described. In one example, a first and a second die have interconnect areas. A dielectric sheet, such as glass, silicon, or oxidized metal is applied over the interconnect areas of dies. Conductive vias are formed in the dielectric sheet to connect with pads of the interconnect areas. A build-up layer includes routing to connect pads of the first die interconnect area to pads of the second die interconnect area through the conductive vias and a cover is applied over the dies, the dielectric sheet, and the build-up layer.
    Type: Application
    Filed: September 30, 2013
    Publication date: April 2, 2015
    Inventors: Chia-Pin Chiu, Qing Ma, Robert L. Sankman, Paul B. Fischer, Patrick Morrow, William J. Lambert, Charles A. Gealer, Tyler Osborn
  • Publication number: 20150084192
    Abstract: Generally discussed herein are systems and apparatuses that include an extended TSBA ball and techniques for making the same. According to an example, a technique can include forming a circuit substrate including forming a circuit on a substrate, the circuit exposed along an upper surface of the substrate, wherein the substrate is for coupling the circuit with a die along a lower surface of the circuit substrate. A molding can be formed onto an upper surface of the circuit substrate, over the circuit of the circuit substrate. An opening can be defined in the molding so that the opening can extend to a top surface of the molding to at least a portion of the circuit. Solder can be formed into the opening, including conforming the solder to the opening and the circuit substrate.
    Type: Application
    Filed: September 25, 2013
    Publication date: March 26, 2015
    Inventors: Chia-Pin Chiu, Xiaorong Xiong, Linda Zhang, Robert Nickerson, Charles Gealer
  • Publication number: 20130249109
    Abstract: Integration of sensor chips with integrated circuit (IC) chips. At least a first sensor chip including a first sensor is affixed to a first side of an interposer to hermitically seal the first sensor within a first cavity. An IC chip is affixed to a second side of the interposer opposite the first sensor, the IC chip is electrically coupled to the first sensor by a through via in the interposer. In embodiments, the first sensor includes a MEMS device and the IC chip comprises a circuit to amplify a signal from the MEMS device. The interposer may be made of glass, with the first sensor chip and the IC chip flip-chip bonded to the interposer by compression or solder. Lateral interconnect traces provide I/O between the devices on the interposer and/or a PCB upon which the interpose is affixed.
    Type: Application
    Filed: September 28, 2012
    Publication date: September 26, 2013
    Inventors: Qing MA, Johanna M. SWAN, Min TAO, Charles A. GEALER, Edward A. ZARBOCK
  • Publication number: 20130127054
    Abstract: A stacked-chip apparatus includes a package substrate and an interposer with a chip stack disposed with a standoff that matches the interposer. A package-on-package stacked-chip apparatus includes a top package disposed on the interposer.
    Type: Application
    Filed: January 14, 2013
    Publication date: May 23, 2013
    Inventors: Sriram MUTHUKUMAR, Charles A. GEALER
  • Publication number: 20100327419
    Abstract: A stacked-chip apparatus includes a package substrate and an interposer with a chip stack disposed with a standoff that matches the interposer. A package-on-package stacked-chip apparatus includes a top package disposed on the interposer.
    Type: Application
    Filed: June 26, 2009
    Publication date: December 30, 2010
    Inventors: Sriram Muthukumar, Charles A. Gealer
  • Publication number: 20100061056
    Abstract: Disclosed are embodiments of a system-level assembly including an integrated circuit (IC) die directly attached to a mainboard. An IC die directly attached to a mainboard or other circuit board may be referred to as a direct-chip attach (DCA) die. A package is disposed over at least a portion of the DCA die and coupled with the mainboard. The package includes one or more other IC die disposed on a substrate. Other embodiments are described and claimed.
    Type: Application
    Filed: September 8, 2008
    Publication date: March 11, 2010
    Inventors: Damion Searls, Weston C. Roth, Margaret D. Ramirez, James D. Jackson, Rainer E. Thomas, Charles A. Gealer
  • Publication number: 20090321925
    Abstract: In some embodiments, an injection molded metal IC package stiffener and package-to-package interconnect frame is presented. In this regard, an apparatus is introduced comprising a microelectronic device package substrate, a microelectronic device coupled with a top surface of the package substrate, and an injection-molded, metal stiffener coupled with the package substrate, wherein the stiffener includes a central opening and at least partially surrounds the microelectronic device, and wherein the stiffener includes a plurality of vias that each couple a contact on a bottom surface of the stiffener with a respective contact on a top surface of the stiffener. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: June 30, 2008
    Publication date: December 31, 2009
    Inventors: Charles A. Gealer, Sabina J. Houle
  • Patent number: 7166924
    Abstract: A stacked dice electronic package without spacers between the dice and where an overlying die is landed on wire bonds of the underlying die is disclosed.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: January 23, 2007
    Assignee: Intel Corporation
    Inventors: Jicun Lu, Charles A. Gealer
  • Publication number: 20060038273
    Abstract: A stacked dice electronic package without spacers between the dice and where an overlying die is landed on wire bonds of the underlying die is disclosed.
    Type: Application
    Filed: August 17, 2004
    Publication date: February 23, 2006
    Inventors: Jicun Lu, Charles Gealer
  • Publication number: 20050121757
    Abstract: A system may include an integrated circuit package substrate, a plurality of integrated circuit die attached to the integrated circuit package substrate, and a stiffener strip attached to the integrated circuit package substrate and surrounding two or more of the plurality of integrated circuit die.
    Type: Application
    Filed: December 4, 2003
    Publication date: June 9, 2005
    Inventor: Charles Gealer
  • Patent number: 6750551
    Abstract: A surface mount-type microelectronic component assembly which does not physically attach the microelectronic component to its carrier substrate. Electrical contact is achieved between the microelectronic component and the carrier with solder balls attached to either the microelectronic component or the carrier substrate. A force is exerted on the assembly to achieve sufficient electrical contact between the microelectronic component and the carrier substrate.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: June 15, 2004
    Assignee: Intel Corporation
    Inventors: Kristopher Frutschy, Charles A. Gealer, Carlos A. Gonzalez
  • Patent number: 6239973
    Abstract: An electronic cartridge which includes a cover that is electrically coupled to a substrate by a clip. An integrated circuit package is mounted to the substrate and at least partially enclosed by the cover. The clips and cover may be connected to a ground plane of the substrate. The cover and substrate may create a “shield” about the integrated circuit package so that any electromagnetic field that flows from the package is grounded to the substrate.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: May 29, 2001
    Assignee: Intel Corporation
    Inventors: Scot W. Taylor, Robert Starkston, Charles Gealer, Michael L. Rutigliano, Raymond A. Krick, John A. Rabenius, Edmond L. Hart, Ravi V. Mahajan, Farukh Fares
  • Patent number: 6043560
    Abstract: A method and apparatus for controlling the thickness of a thermal interface between a processor die and a thermal plate in a microprocessor assembly are provided. The apparatus includes a generally rectangular shaped thermal top cover having a recessed portion of predetermined depth and aperture therein. The thermal top cover fits over the processor die. A thermal interface layer fills the recessed portion of the thermal top cover covering the processor die. The depth of the recessed portion is greater than the thickness of the processor die so that the thickness of the thermal interface layer is controlled. A thermal plate is placed over the thermal top cover in contact with the thermal grease so as to form a thermal path from the processor die to the thermal plate.
    Type: Grant
    Filed: December 3, 1997
    Date of Patent: March 28, 2000
    Assignee: Intel Corporation
    Inventors: Kevin J. Haley, Niel C. Delaplane, Ravindranath V. Mahajan, Robert Starkston, Charles A. Gealer, Joseph C. Krauskopf
  • Patent number: 6043983
    Abstract: An electronic cartridge which includes a cover that is electrically coupled to a substrate by a clip. An integrated circuit package is mounted to the substrate and at least partially enclosed by the cover. The clips and cover may be connected to a ground plane of the substrate. The cover and substrate may create a "shield" about the integrated circuit package so that any electro-magnetic field that flows from the package is grounded to the substrate.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: March 28, 2000
    Assignee: Intel Corporation
    Inventors: Scot W. Taylor, Robert Starkston, Charles Gealer, Michael L. Rutigliano, Raymond A. Krick, John A. Rabenius, Edmond L. Hart, Ravi V. Mahajan, Farukh Fares