Patents by Inventor Charles Albert Webb, III

Charles Albert Webb, III has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8750335
    Abstract: In response to communications from a first device to a second device, respective phase differences are estimated between a first clock of the first device and a second clock of the second device. A first average phase difference is computed within a percentile of a first subset of the respective phase differences. The percentile is less than 100. A second average phase difference is computed within the percentile of a second subset of the respective phase differences. The second subset is a modification of the first subset. The second average phase difference is computed in response to the first average phase difference and the modification.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: June 10, 2014
    Assignee: Anue Systems, Inc.
    Inventor: Charles Albert Webb, III
  • Publication number: 20120221881
    Abstract: In response to communications from a first device to a second device, respective phase differences are estimated between a first clock of the first device and a second clock of the second device. A first average phase difference is computed within a percentile of a first subset of the respective phase differences. The percentile is less than 100. A second average phase difference is computed within the percentile of a second subset of the respective phase differences. The second subset is a modification of the first subset. The second average phase difference is computed in response to the first average phase difference and the modification.
    Type: Application
    Filed: November 18, 2010
    Publication date: August 30, 2012
    Inventor: Charles Albert Webb, III
  • Patent number: 7940808
    Abstract: A communications system includes a physical layer device (PLD) and a logical link device (LLD), each having respective send and receive interfaces being substantially identical to define symmetrical interfaces for the system. Accordingly, design and manufacturing is simplified compared to conventional systems. In addition, advantages are also provided in terms of loopback capability and packaging options. The PLD comprises a PLD send interface including PLD parallel information outputs, and a PLD receive interface including PLD parallel information inputs. Similarly, the LLD comprises an LLD receive interface including LLD parallel information inputs, and an LLD send interface including LLD parallel information outputs. Parallel communications channels connect the PLD information outputs to respective LLD information inputs, and connect the LLD information outputs to respective PLD information inputs.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: May 10, 2011
    Assignee: Agere Systems Inc.
    Inventors: Michael S. Shaffer, Himanshu Mahendra Thaker, Charles Albert Webb, III, Lesley Jen-Yuan Wu
  • Publication number: 20090196605
    Abstract: A communications system includes a physical layer device (PLD) and a logical link device (LLD), each having respective send and receive interfaces being substantially identical to define symmetrical interfaces for the system. Accordingly, design and manufacturing is simplified compared to conventional systems. In addition, advantages are also provided in terms of loopback capability and packaging options. The PLD comprises a PLD send interface including PLD parallel information outputs, and a PLD receive interface including PLD parallel information inputs. Similarly, the LLD comprises an LLD receive interface including LLD parallel information inputs, and an LLD send interface including LLD parallel information outputs. Parallel communications channels connect the PLD information outputs to respective LLD information inputs, and connect the LLD information outputs to respective PLD information inputs.
    Type: Application
    Filed: December 30, 2008
    Publication date: August 6, 2009
    Applicant: AGERE SYSTEMS INC.
    Inventors: Michael S. Shaffer, Himanshu Mahendra Thaker, Charles Albert Webb, III, Lesley Jen-Yuan Wu
  • Patent number: 7486703
    Abstract: A communications system includes a physical layer device (PLD) and a logical link device (LLD), each having respective send and receive interfaces being substantially identical to define symmetrical interfaces for the system. Accordingly, design and manufacturing is simplified compared to conventional systems. In addition, advantages are also provided in terms of loopback capability and packaging options. The PLD comprises a PLD send interface including PLD parallel information outputs, and a PLD receive interface including PLD parallel information inputs. Similarly, the LLD comprises an LLD receive interface including LLD parallel information inputs, and an LLD send interface including LLD parallel information outputs. Parallel communications channels connect the PLD information outputs to respective LLD information inputs, and connect the LLD information outputs to respective PLD information inputs.
    Type: Grant
    Filed: July 27, 2004
    Date of Patent: February 3, 2009
    Assignee: Agere Systems Inc.
    Inventors: Michael S. Shaffer, Himanshu Mahendra Thaker, Charles Albert Webb, III, Lesley Jen-Yuan Wu
  • Patent number: 6909727
    Abstract: A communications system comprises a physical layer device (PLD) including a PLD send interface which, in turn, includes PLD parallel information outputs and at least one PLD control output. The system also includes a logical link device (LLD) which comprises an LLD receive interface which, in turn, includes LLD parallel information inputs and at least one LLD control input. First parallel communications channels connect the PLD information outputs to respective LLD information inputs, and at least one second communications channel connects the at least one PLD control output to the at least one LLD control input so that control signals are sent from the PLD to the LLD out-of-band from information signals. Accordingly, control speed is enhanced, and information throughput efficiency is not compromised.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: June 21, 2005
    Assignee: Agere Systems Inc.
    Inventors: Michael S. Shaffer, Himanshu Mahendra Thaker, Charles Albert Webb, III, Lesley Jen-Yuan Wu
  • Patent number: 6819683
    Abstract: A communications system includes N parallel communications channels connecting first and second devices. The N channels may include N−1 channels for carrying information symbols, and an Nth channel for facilitating deskewing and word framing. The first device may include an alignment symbol generator for generating alignment symbols on the Nth channel, and a word framing code generator for generating word framing codes on the Nth channel. The second device may include a deskewer for aligning received information symbols based upon the alignment symbols, and a word framer for determining word framing based upon the word framing codes. The word frame code generator in the first device or transmitter, and the word framer in the second device or receiver provide the desired feature of knowledge of where each word starts or begins. The start of each word may be determined in terms of a time and a corresponding one of the N−1 channels where the word starts.
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: November 16, 2004
    Assignee: Lucent Technologies Inc.
    Inventors: Nevin R. Jones, Himanshu Mahendra Thaker, Charles Albert Webb, III, Lesley Jen-Yuan Wu
  • Patent number: 6775302
    Abstract: A communications system includes a physical layer device (PLD) and a logical link device (LLD), each having respective send and receive interfaces being substantially identical to define symmetrical interfaces for the system. Accordingly, design and manufacturing is simplified compared to conventional systems. In addition, advantages are also provided in terms of loopback capability and packaging options. The PLD comprises a PLD send interface including PLD parallel information outputs, and a PLD receive interface including PLD parallel information inputs. Similarly, the LLD comprises an LLD receive interface including LLD parallel information inputs, and an LLD send interface including LLD parallel information outputs. Parallel communications channels connect the PLD information outputs to respective LLD information inputs, and connect the LLD information outputs to respective PLD information inputs.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: August 10, 2004
    Assignee: Agere Systems Inc.
    Inventors: Michael S. Shaffer, Himanshu Mahendra Thaker, Charles Albert Webb, III, Lesley Jen-Yuan Wu
  • Patent number: 6678842
    Abstract: A communications system includes first and second devices connected by parallel communications channels. The first device preferably comprises a string-based framing coder for determining and appending a string-based framing code to each information symbol string of information symbol strings to be transmitted in parallel over respective parallel communications channels. Each string-based framing code is preferably based upon at least some of the information symbols in the respective information symbol string. In addition, the second device preferably includes a deskewer for aligning received parallel information symbol strings based upon the string-based framing codes. In other words, the string-based framing codes and their use to align received information symbol strings permit the information symbol to be transmitted at high rates and over relatively long distances and thereby be subject skew. The information symbols may be binary bits.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: January 13, 2004
    Assignee: Agere Systems Inc.
    Inventors: Michael S. Shaffer, Himanshu Mahendra Thaker, Charles Albert Webb, III, Lesley Jen-Yuan Wu
  • Patent number: 6675327
    Abstract: A communications system includes a first device comprising a plurality of electrical-to-transmission medium converters, and a second device comprising a plurality of transmission medium-to-electrical converters to be connected to respective ones of the electrical-to-transmission medium converters via at least one transmission medium and defining parallel communications channels between the first and second devices, and wherein deskewing is provided. More particularly, the first device may include a string-based framing coder for determining and appending a string-based framing code to each information symbol string of information symbol strings to be transmitted in parallel over respective parallel communications channels. Each string-based framing code is based upon at least some of the information symbols in the respective information symbol string. The second device preferably comprises a deskewer for aligning received information symbol strings based upon the string-based framing codes.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: January 6, 2004
    Assignee: Agere Systems Inc.
    Inventors: Mohammad S. Mobin, Michael S. Shaffer, Himanshu Mahendra Thaker, Charles Albert Webb, III, Lesley Jen-Yuan Wu
  • Patent number: 6192088
    Abstract: A digital carrier recovery system includes at least two modes of operation, namely, an acquisition mode and a tracking mode. The bandwidth of the carrier recovery loop filter is different for the acquisition mode and the tracking mode. In the acquisition mode, the digital phase-locked loop seeks and locks to the long term frequency offset of the received carrier signal. In the tracking mode, the digital phase-locked loop tracks the instantaneous variations in the carrier phase. Switching between the acquisition mode and the tracking mode is realized digitally, and includes programmable hysteresis, resulting in optimal performance in the presence of signals having high levels of phase noise (jitter). More specifically, the carrier recovery loop filter “locks” to the pilot signal of an incoming signal, e.g., a vestigial side band (VSB) video signal, by employing a so-called digital vector tracking phase-locked loop that demodulates the VSB signal.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: February 20, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: Ahmad K. Aman, Cecil William Farrow, Hong Jiang, Agesino Primatic, Jr., Charles Albert Webb, III
  • Patent number: 6134276
    Abstract: A digital timing recovery system advantageously employs both demodulated I-phase and Q-phase components to more accurately locate the synchronization signal of an incoming VSB signal. The Q-phase component is advantageously employed to detect the phase error. The use of the Q-phase component provides a more accurate measure of the phase error and results in a larger (wider) acquisition range for timing frequency offset. More specifically, the timing recovery system of this invention performs symbol clock recovery based on the VSB signal segment synchronization (sync) signal and generates a pulse density modulated (PDM) phase difference signal that controls a voltage controlled crystal oscillator (VCXO) in the phase-locked loop. This is realized, in one embodiment of the invention, by correlating received sync segment data with the known sync signal pattern and searching for "peaks" in the correlation values that are periodic at the known sync segment data rate.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: October 17, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Ahmad K. Aman, Cecil William Farrow, Hong Jiang, Agesino Primatic, Jr., Charles Albert Webb, III
  • Patent number: 5881056
    Abstract: A Multi-Code (MC) Code Division Multiple Access (CDMA) receiver receives N (where N>1) encoded signal channels over multiple air signal paths. The MC-CDMA receiver receives and demodulates the N encoded signal channels into N signal samples and includes a common circuit for time-sharing an accumulator, for accumulating the N signal samples, among a plurality of second correlators. Each of the plurality of second correlator means utilizes the time-shared accumulator to accumulate samples from each of the N signals which are then decoded into an associated one of the N signal channels.
    Type: Grant
    Filed: August 20, 1996
    Date of Patent: March 9, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Howard C. Huang, Chih-Lin I, Andrzej Partyka, Stephan ten Brink, Charles Albert Webb, III
  • Patent number: 5870378
    Abstract: A Multi-Code (MC) Code Division Multiple Access (CDMA) receiver receives N (where N.gtoreq.1) encoded signal channels over multiple air signal paths. The N signal channels are encoded using a properly chosen subset of Walsh codes based on a Walsh-Matrix, W.sup.M, where M is a power of two. In the disclosed MC-CDMA receiver, a timing correlator means recovers the timing and control signal for the N signal channels received over any particular signal path; a FWHT circuit together with a second correlator means decodes all of the N signal channels.
    Type: Grant
    Filed: August 20, 1996
    Date of Patent: February 9, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Howard C. Huang, Chih-Lin I, Stephan ten Brink, Charles Albert Webb, III
  • Patent number: 5737326
    Abstract: A Multi-Code (MC) Code Division Multiple Access (CDMA) receiver receives N (where N>1) encoded signal channels over multiple air signal paths. In the MC-CDMA receiver, once a timing correlator means has recovered the timing and control signals for the data signal received over any particular signal path, those timing and control signals are utilized by each of the N data (second type) correlator means for decoding and despreading an associated one of the N data signal channels received over that path.
    Type: Grant
    Filed: July 12, 1996
    Date of Patent: April 7, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: Chih-Lin I, Andrzej Partyka, Charles Albert Webb, III