Patents by Inventor Charles H. Joyner

Charles H. Joyner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7092589
    Abstract: A method of operating an array of integrated laser sources formed as an integrated array on a single substrate in a photonic integrated circuit (PIC) where the laser sources are designed for operation at different targeted emission wavelengths which, in toto, at least approximate a grid of spatial emission wavelengths. A first wavelength tuning element is associated with each laser source and is adjusted over time so that each laser source maintains its targeted emission wavelength. As an alternative, the drive current to each laser source may be initially set so that each laser source operates at its targeted emission wavelength. Thereafter, adjustments to retune the laser sources to their targeted emission wavelengths are accomplished by the first wavelength tuning elements. The outputs of the laser sources may be combined via an optical combiner to produce a single combined output from the PIC.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: August 15, 2006
    Assignee: Infinera Corporation
    Inventors: Fred A. Kish, Jr., Charles H. Joyner, David F. Welch, Robert B. Taylor, Alan C. Nilsson
  • Patent number: 7087449
    Abstract: An active semiconductor device, such as, buried heterostructure semiconductor lasers, LEDs, modulators, photodiodes, heterojunction bipolar transistors, field effect transistors or other active devices, comprise a plurality of semiconductor layers formed on a substrate with one of the layers being an active region. A current channel is formed through this active region defined by current blocking layers formed on adjacent sides of a designated active region channel where the blocking layers substantially confine the current through the channel. The blocking layers are characterized by being an aluminum-containing Group III–V compound, i.e., an Al-III–V layer, intentionally doped with oxygen from an oxide source. Also, wet oxide process or a deposited oxide source may be used to laterally form a native oxide of the Al-III–V layer. An example of a material system for this invention useful at optical telecommunication wavelengths is InGaAsP/InP where the Al-III–V layer comprises InAlAs:O or InAlAs:O:Fe.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: August 8, 2006
    Assignee: Infinera Corporation
    Inventors: Fred A. Kish, Jr., Sheila K. Mathis, Charles H. Joyner, Richard P. Schneider
  • Patent number: 7082231
    Abstract: An optical waveguide device, power coupler, a star coupler, a MMI coupler, an arrayed waveguide grating (AWG) or an Echelle grating, having at least one free space region with a plurality of optical waveguides coupled as inputs and separated by channels having a angled bottom portion, the channels monotonically decreasing in size or shape in a direction toward the free space region and optically coupling with adjacent waveguides at the interface region between the optical waveguides and the free space region so that insertion loss at the interface region is substantially reduced.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: July 25, 2006
    Assignee: Infinera Corporation
    Inventors: Charles H. Joyner, Mark J. Missey, Fred A. Kish, Jr.
  • Patent number: 7079720
    Abstract: A method of operating an array of laser sources integrated as an array in a single monolithic chip where the steps include designing the laser sources to have different target emission wavelengths so that together they form a spectral emission wavelength grid, coupling outputs from the laser sources to an array of gain/loss elements also integrated on the single monolithic chip, one each receiving the output from a respective laser source; and adjusting the outputs with the gain/loss elements so that the power levels across the laser source array are substantially uniform.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: July 18, 2006
    Assignee: Infinera Corporation
    Inventors: Fred A. Kish, Jr., Charles H. Joyner, David F. Welch, Robert B. Taylor, Alan C. Nilsson
  • Patent number: 7079721
    Abstract: A method and apparatus operates an array of laser sources as an integrated array on a single substrate or as integrated in an optical transmitter photonic integrated circuit (TxPIC) maintaining the emission wavelengths of such integrated laser sources at their targeted emission wavelengths or at least to more approximate their desired respective emission wavelengths. Wavelength changing elements may accompany the laser sources to bring about the change in their operational or emission wavelength to be corrected to or toward the desired or target emission wavelength. The wavelength changing elements may be comprise of temperature changing elements, current and voltage changing elements or bandgap changing elements.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: July 18, 2006
    Assignee: Infinera Corporation
    Inventors: Fred A. Kish, Jr., Charles H. Joyner, David F. Welch, Robert B. Taylor, Alan C. Nilsson
  • Patent number: 7079719
    Abstract: A method of tuning optical components integrated on a monolithic chip, such as an optical transmitter photonic integrated circuit (TxPIC), is disclosed where a group of first optical components are each fabricated to have an operating wavelength approximating a wavelength on a standardized or predetermined wavelength grid and are each included with a local wavelength tuning component also integrated in the chip. Each of the first optical components is wavelength tuned through their local wavelength tuning component to achieve a closer wavelength response that approximates their wavelength on the wavelength grid.
    Type: Grant
    Filed: August 10, 2004
    Date of Patent: July 18, 2006
    Assignee: Infinera Corporation
    Inventors: Fred A. Kish, Jr., Charles H. Joyner, David F. Welch, Jonas Webjorn, Robert B. Taylor, Alan C. Nilsson
  • Patent number: 7079715
    Abstract: A monolithic transmitter photonic integrated circuit (TxPIC) chip comprises an array of modulated sources formed on the PIC chip and having different operating wavelengths according to a standardized wavelength grid and providing signal outputs of different wavelengths. Pluralities of wavelength tuning elements are integrated on the chip, one associated with each of the modulated sources. An optical combiner is formed on the PIC chip and the signal outputs of the modulated sources are optically coupled to one or more inputs of the optical combiner and provided as a combined channel signal output from the combiner. The wavelength tuning elements provide for tuning the operating wavelength of the respective modulated sources to be approximate or to be chirped to the standardized wavelength grid. The wavelength tuning elements are temperature changing elements, current and voltage changing elements or bandgap changing elements.
    Type: Grant
    Filed: October 8, 2002
    Date of Patent: July 18, 2006
    Assignee: Infinera Corporation
    Inventors: Fred A. Kish, Jr., Charles H. Joyner, David F. Welch, Jonas Webjorn, Robert B. Taylor, Alan C. Nilsson
  • Patent number: 7079718
    Abstract: An optical probe and a method for testing an optical chip or device, such as an photonic integrated circuit (PIC), to provide for testing of such devices or circuits while they are still in their in-wafer form and is accomplished by using a an optical probe for interrogation of the circuit where an access is provided in the wafer to one or more of such in-wafer devices or circuits. As one example, the interrogation may be an interrogation beam provided at the access input to the in-wafer device or circuit. As another example, the interrogation may be an optical pickup from the access input to the in-wafer device or circuit.
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: July 18, 2006
    Assignee: Infinera Corporation
    Inventors: David F. Welch, Fred A. Kish, Jr., Frank H. Peters, Charles H. Joyner
  • Patent number: 7076126
    Abstract: A photonic integrated circuit (PIC) comprises a plurality of integrated optically coupled components formed in a surface of the PIC and a passivating layer overlies at least a portion of the PIC surface. The overlying passivating layer comprises a material selected from the group consisting of BCB, ZnS and ZnSe. Also, when the circuits are PIC chips are die in the semiconductor wafer, a plurality of linear cleave streets are formed in a wafer passivation layer where a pattern of the cleave streets define separate PIC chips in the wafer for their subsequent singulation from the wafer.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: July 11, 2006
    Assignee: Infinera Corporation
    Inventors: Charles H. Joyner, Mark J Missey, Radhakrishnan L. Nagarajan, Fred A. Kish, Jr.
  • Patent number: 7065266
    Abstract: An InP-based photonic integrated circuit (PIC) includes an optical passive element in the circuit with no bias current applied to such an element. A passivation cladding layer overlies a surface of the optical passive element where the passivation layer comprises benzocyclobutene polymer or BCB.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: June 20, 2006
    Assignee: Infinera Corporation
    Inventors: Charles H. Joyner, Mark J. Missey, Radhakrishnan L. Nagarajan, Fred A. Kish, Jr.
  • Patent number: 7060517
    Abstract: A method for reducing insertion loss in a transition region between a plurality of input or output waveguides to a free space coupler region in a photonic integrated circuit (PIC) includes the steps of forming a passivation layer over the waveguides and region and forming the passivation overlayer such that it monotonically increases in thickness through the transition region to the free space coupler region.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: June 13, 2006
    Assignee: Infinera Corporation
    Inventors: Charles H. Joyner, Mark J. Missey, Radhakrishnan L. Nagarajan, Fred A. Kish, Jr.
  • Patent number: 7058263
    Abstract: An optical transport network comprises a monolithic transmitter photonic integrated circuit (TxPIC) InP-based chip and a monolithic receiver photonic integrated circuit (RxPIC) InP-based chip.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: June 6, 2006
    Assignee: Infinera Corporation
    Inventors: David F. Welch, Radhakrishnan L. Nagarajan, Fred A. Kish, Jr., Mark J. Missey, Vincent G. Dominic, Atul Mathur, Frank H. Peters, Charles H. Joyner, Richard P. Schneider, Ting-Kuang Chiang
  • Patent number: 7058246
    Abstract: A monolithic photonic integrated circuit (PIC) chip comprises an array of modulated sources providing a plurality of channel signals of different wavelengths and an optical combiner coupled to receive the channel signals and produce a combined output of the channel signals. The arrays of modulated sources are formed as ridge waveguides to enhance the output power from the respective modulated sources so that the average output power from the sources is approximately 2 to 4 times higher than in the case of comparable arrays of modulated sources formed as buried waveguides.
    Type: Grant
    Filed: October 8, 2002
    Date of Patent: June 6, 2006
    Assignee: Infinera Corporation
    Inventors: Charles H. Joyner, Fred A. Kish, Jr., Frank H. Peters, Atul Mathur, David F. Welch, Andrew G. Dentai, Damien Lambert, Richard P. Schneider, Mark J. Missey
  • Patent number: 7043109
    Abstract: A method of in-wafer testing is provided for a monolithic photonic integrated circuit (PIC) formed in a semiconductor wafer where each such in-wafer circuit comprises two or more integrated electro-optic components, one of each in tandem forming a signal channel in the circuit. The method includes the provision of a first integrated photodetector at a rear end of each signal channel and a second integrated photodetector at forward end of each signal channel. Then, the testing is accomplished, first, by sequentially operating a first of a selected channel electro-optic component in a selected circuit to monitor light output from a channel via its first corresponding channel photodetector and adjusting its operating characteristics by detecting that channel electro-optic component output via its second corresponding channel photodetector to provide first calibration data.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: May 9, 2006
    Assignee: Infinera Corporation
    Inventors: Fred A. Kish, Jr., Charles H. Joyner, Mark J. Missey, Frank H. Peters, Radhakrishnan L. Nagarajan, Richard P. Schneider
  • Patent number: 7027703
    Abstract: A method for forming and apparatus comprising a free space coupler region having a plurality of optical waveguides coupled to the space coupler region at an interface region, the waveguides converging with one another to the interface region, and a trench formed between adjacent waveguides, the depth of the trench or trenches extending from an outer point to the interface region and monotonically decreasing in depth from the outer point to the interface region.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: April 11, 2006
    Assignee: Infinera Corporation
    Inventors: Charles H. Joyner, Mark J. Missey, Radhakrishnan L. Nagarajan, Frank H. Peters, Mehrdad Ziari, Fred A. Kish, Jr.
  • Patent number: 7016571
    Abstract: An arrayed waveguide grating (AWG) comprises at least two free space regions, a plurality of grating arms extending between the two space regions, a passivation layer formed over the arrayed waveguide grating and a plurality of inputs at least to one of the free space regions to receive a plurality of channel signals separated by a predetermined channel spacing. A depth of the passivation layer chosen by providing a TE to TM wavelength shift between TE and TM modes propagating through the arrayed waveguide grating being approximately less than or equal to 20% of a magnitude of the channel spacing.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: March 21, 2006
    Assignee: Infinera Corporation
    Inventors: Charles H. Joyner, Mark J. Missey, Radhakrishnan L. Nagarajan, Fred A. Kish, Jr.
  • Patent number: 7006719
    Abstract: Disclosed are apparatus and methods of reducing insertion loss, passivation, planarization and in-wafer testing of integrated optical components and in-wafer chips in photonic integrated circuits (PICs).
    Type: Grant
    Filed: March 10, 2003
    Date of Patent: February 28, 2006
    Assignee: Infinera Corporation
    Inventors: Charles H. Joyner, Mark J. Missey, Radhakrishnan L. Nagarajan, Frank H. Peters, Mehrdad Ziari, Fred A. Kish, Jr.
  • Patent number: 6985648
    Abstract: A method of in-wafer testing is provided for a monolithic photonic integrated circuit (PIC) formed in a semiconductor wafer where each such in-wafer circuit comprises two or more integrated electro-optic components, one of each in tandem forming a signal channel in the circuit. The method includes the provision of a first integrated photodetector at a rear end of each signal channel and a second integrated photodetector at forward end of each signal channel. Then, the testing is accomplished, first, by sequentially operating a first of a selected channel electro-optic component in a selected circuit to monitor light output from a channel via its first corresponding channel photodetector and adjusting its operating characteristics by detecting that channel electro-optic component output via its second corresponding channel photodetector to provide first calibration data.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: January 10, 2006
    Assignee: Infinera Corporation
    Inventors: Fred A. Kish, Jr., Mark J. Missey, Radhakrishnan L. Nagarajan, Frank H. Peters, Richard P. Schneider, Charles H. Joyner
  • Patent number: 6921925
    Abstract: In photonic integrated circuits (PICs) having at least one active semiconductor device, such as, a buried heterostructure semiconductor laser, LED, modulator, photodiode, heterojunction bipolar transistor, field effect transistor or other active device, a plurality of semiconductor layers are formed on a substrate with one of the layers being an active region. A current channel is formed through this active region defined by current blocking layers formed on adjacent sides of a designated active region channel where the blocking layers substantially confine the current through the channel. The blocking layers are characterized by being an aluminum-containing Group III-V compound, i.e., an Al-III-V layer, intentionally doped with oxygen from an oxide source. Also, wet oxide process or a deposited oxide source may be used to laterally form a native oxide of the Al-III-V layer.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: July 26, 2005
    Inventors: Fred A. Kish, Jr., Sheila K. Mathis, Charles H. Joyner, Richard P. Schneider
  • Patent number: 6891202
    Abstract: An active semiconductor device, such as, buried heterostructure semiconductor lasers, LEDs, modulators, photodiodes, heterojunction bipolar transistors, field effect transistors or other active devices, comprise a plurality of semiconductor layers formed on a substrate with one of the layers being an active region. A current channel is formed through this active region defined by current blocking layers formed on adjacent sides of a designated active region channel where the blocking layers substantially confine the current through the channel. The blocking layers are characterized by being an aluminum-containing Group III-V compound, i.e., an Al-III-V layer, intentionally doped with oxygen from an oxide source. Also, wet oxide process or a deposited oxide source may be used to laterally form a native oxide of the Al-III-V layer. An example of a material system for this invention useful at optical telecommunication wavelengths is InGaAsP/InP where the Al-III-V layer comprises InAlAs:O or InAlAs:O:Fe.
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: May 10, 2005
    Assignee: Infinera Corporation
    Inventors: Fred A. Kish, Jr., Sheila K. Mathis, Charles H. Joyner, Richard P. Schneider