Patents by Inventor Charles S. Chanley

Charles S. Chanley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7527994
    Abstract: The present invention provides amorphous silicon thin-film transistors and methods of making such transistors for use with active matrix displays. In particular, one aspect of the present invention provides transistors having a structure based on a channel passivated structure wherein the amorphous silicon layer thickness and the channel length can be optimized. In another aspect of the present invention thin-film transistor structures that include a contact enhancement layer that can provide a low threshold voltage are provided.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: May 5, 2009
    Assignee: Honeywell International Inc.
    Inventors: Kalluri R. Sarma, Charles S. Chanley
  • Publication number: 20060046335
    Abstract: The present invention provides amorphous silicon thin-film transistors and methods of making such transistors for use with active matrix displays. In particular, one aspect of the present invention provides transistors having a structure based on a channel passivated structure wherein the amorphous silicon layer thickness and the channel length can be optimized. In another aspect of the present invention thin-film transistor structures that include a contact enhancement layer that can provide a low threshold voltage are provided.
    Type: Application
    Filed: September 1, 2004
    Publication date: March 2, 2006
    Inventors: Kalluri R. Sarma, Charles S. Chanley
  • Patent number: 6498073
    Abstract: The present invention is a back illuminated image array device and a method of constructing such a device. The device is generally comprised of an array circuitry layer, a front layer, and a quartz layer. The array circuitry layer is defined on one surface of the front layer. The quartz layer is mounted on the other surface of the front layer. The method of fabricating the device is generally comprised of the following steps. The method provides a wafer having a thick silicon layer, an oxide layer on the thick silicon layer, and a front silicon layer on the oxide layer. The front layer has a first surface and a second surface with the second surface proximal to the oxide layer. Array circuitry is formed on the first surface of the front layer. A temporary layer is applied to the surface of the array circuitry. The thick silicon layer and the oxide layers are removed from the wafer, thereby, exposing the second surface of the front layer. A quartz layer is applied to the second surface.
    Type: Grant
    Filed: January 2, 2001
    Date of Patent: December 24, 2002
    Assignee: Honeywell International Inc.
    Inventors: Kalluri R. Sarma, Charles S. Chanley
  • Publication number: 20020084474
    Abstract: The present invention is a back illuminated image array device and a method of constructing such a device. The device is generally comprised of an array circuitry layer, a front layer, and a quartz layer. The array circuitry layer is defined on one surface of the front layer. The quartz layer is mounted on the other surface of the front layer. The method of fabricating the device is generally comprised of the following steps. The method provides a wafer having a thick silicon layer, an oxide layer on the thick silicon layer, and a front silicon layer on the oxide layer. The front layer has a first surface and a second surface with the second surface proximal to the oxide layer. Array circuitry is formed on the first surface of the front layer. A temporary layer is applied to the surface of the array circuitry. The thick silicon layer and the oxide layers are removed from the wafer, thereby, exposing the second surface of the front layer. A quartz layer is applied to the second surface.
    Type: Application
    Filed: January 2, 2001
    Publication date: July 4, 2002
    Inventors: Kalluri R. Sarma, Charles S. Chanley
  • Patent number: 5258323
    Abstract: A method for fabricating single crystal islands on a high temperature substrate, thereby allowing for the use of high temperature processes to further make devices incorporating the islands such as, for example, high mobility thin film transistor integrated drivers for active matrix displays.
    Type: Grant
    Filed: December 29, 1992
    Date of Patent: November 2, 1993
    Assignee: Honeywell Inc.
    Inventors: Kalluri R. Sarma, Charles S. Chanley
  • Patent number: 4705659
    Abstract: A process is disclosed for fabricating a free-standing thin or thick film structure. One embodiment of the process includes the steps of providing a substrate of a first refractory material, forming a layer of carbon on the substrate, and depositing a film of a second refractory material on top of the layer of carbon. This sandwich structure is heated in an oxidizing ambient to cause the oxidation of the carbon layer leaving the second refractory material as a free-standing film.
    Type: Grant
    Filed: July 7, 1986
    Date of Patent: November 10, 1987
    Assignee: Motorola, Inc.
    Inventors: Jonathan J. Bernstein, T. Bruce Koger, Charles S. Chanley
  • Patent number: 4542004
    Abstract: An improved process is disclosed for the high pressure plasma hydrogenation of silicon tetrachloride. Hydrogen and silicon tetrachloride are reacted in the presence of a high pressure plasma and further in the presence of a boron catalyst to form trichlorosilane and dichlorosilane. By adding the boron catalyst the overall conversion efficiency is increased and the dichlorosilane content in the reaction effluent is increased.
    Type: Grant
    Filed: March 28, 1984
    Date of Patent: September 17, 1985
    Assignee: Solavolt International
    Inventors: Kalluri R. Sarma, Charles S. Chanley