Abstract: Circuit structures and methods of fabrication are provided for facilitating implementing a complete electronic system in a compact package. The circuit structure includes, in one embodiment, a chips-first multichip base layer with conductive structures extending therethrough. An interconnect layer is disposed over the front surface of the multichip layer and includes interconnect metallization electrically connected to contact pads of the chips and to conductive structures extending through the structural material. A redistribution layer, disposed over the back surface of the multichip layer, includes a redistribution metallization also electrically connected to conductive structures extending through the structural material.

Abstract: Circuit structures and methods of fabrication are provided for facilitating implementing a complete electronic system in a compact package. The circuit structure includes, in one embodiment, a chips-first multichip base layer with conductive structures extending therethrough. An interconnect layer is disposed over the front surface of the multichip layer and includes interconnect metallization electrically connected to contact pads of the chips and to conductive structures extending through the structural material. A redistribution layer, disposed over the back surface of the multichip layer, includes a redistribution metallization also electrically connected to conductive structures extending through the structural material.

Abstract: Structure and method for temporarily holding at least one integrated circuit chip during packaging thereof are presented. A support plate has a release film secured to a main surface thereof. The support plate and release film allow UV light to pass therethrough. A UV curable chip adhesive is disposed over the release film for holding the at least one integrated circuit chip. After placement of the at least one integrated circuit chip in the UV curable chip adhesive, the UV curable chip adhesive is cured by UV light shone through the support plate and release film. As one example, the release film includes a UV release adhesive and the UV curable chip adhesive and UV release adhesive have a differential response to UV light which allows curing of the UV curable chip attach without release of the UV release adhesive.

Abstract: Structures and methods are provided for electrically interconnecting and absorbing stress between a first electrical structure and a second electrical structure. In one embodiment, non-conductive compliant bumps are disposed on at least one of the structures and a metal layer is provided over a surface of the non-conductive compliant bumps. The metal layer facilitates electrical coupling of the metal on the surfaces of the compliant bumps with multiple contact pads of the structure supporting the bumps. The non-conductive compliant bumps can be fabricated of a low modulus material which has a high ultimate elongation property (LMHE dielectric). The LMHE dielectric can have a Young's modulus of less than 50,000 psi and an ultimate elongation property of at least twenty percent. In an alternate embodiment, at least one mushroom-shaped conductive bump is disposed above a compliant dielectric layer on one of the first electrical structure or the second electrical structure.

Abstract: Structures and methods are provided for electrically interconnecting and absorbing stress between a first electrical structure and a second electrical structure. In one embodiment, non-conductive compliant bumps are disposed on at least one of the structures and a metal layer is provided over a surface of the non-conductive compliant bumps. The metal layer facilitates electrical coupling of the metal on the surfaces of the compliant bumps with multiple contact pads of the structure supporting the bumps. The non-conductive compliant bumps can be fabricated of a low modulus material which has a high ultimate elongation property (LMHE dielectric). The LMHE dielectric can have a Young's modulus of less than 50,000 psi and an ultimate elongation property of at least twenty percent. In an alternate embodiment, at least one mushroom-shaped conductive bump is disposed above a compliant dielectric layer on one of the first electrical structure or the second electrical structure.

Abstract: Structures and methods are provided for electrically interconnecting and absorbing stress between a first electrical structure and a second electrical structure. In one embodiment, non-conductive compliant bumps are disposed on at least one of the structures and a metal layer is provided over a surface of the non-conductive compliant bumps. The metal layer facilitates electrical coupling of the metal on the surfaces of the compliant bumps with multiple contact pads of the structure supporting the bumps. The non-conductive compliant bumps can be fabricated of a low modulus material which has a high ultimate elongation property (LMHE dielectric). The LMHE dielectric can have a Young's modulus of less than 50,000 psi and an ultimate elongation property of at least twenty percent. In an alternate embodiment, at least one mushroom-shaped conductive bump is disposed above a compliant dielectric layer on one of the first electrical structure or the second electrical structure.

Abstract: Structures and methods are provided for absorbing stress between a first electrical structure and a second electrical structure connected together, wherein the first and second structures have different coefficients of thermal expansion. A dielectric material is disposed on at least one of the first and second electrical structures. This dielectric material is a low modulus material which has a high ultimate elongation property (LMHE dielectric). Preferably, the LMHE dielectric has a Young's modulus of less than 50,000 psi and an ultimate elongation property of at least 20 percent. The LMHE dielectric can be photo patternable to facilitate formation of via openings therein and a metal layer is formed above the LMHE dielectric which has conductors capable of expanding or contracting with the dielectric.

Abstract: Chips first packaging structures and methods of fabrication are presented which employ electroless metallizations. An electroless barrier metal is disposed over and in electrical contact with at least one aluminum contact pad of the chips first integrated circuit. The electroless barrier metal is a first electroless metal and is a different material than the at least one aluminum contact pad. An electroless interconnect metal is disposed above and electrically contacts the electroless barrier metal. The electroless interconnect metal is a second electroless metal, which is different from the first electroless metal. As an example, the electroless barrier metal comprises electroless nickel and the electroless interconnect metal comprises electroless copper.

Abstract: A flexible high density interconnect structure is provided by extending the high density interconnect structure beyond the solid substrate containing the chips interconnected thereby. During fabrication, the flexible portion of the high density interconnect structure is supported by a temporary interconnect support to facilitate fabrication of the structure in accordance with existing fabrication techniques. Subsequently, that temporary support structure may be removed or may remain in place if it sufficiently flexible to impart the desired degree of flexibility to that portion of the high density interconnect structure. Methods of fabrication are also disclosed.

Abstract: A body is hermetically sealed by electroplating a hermetic layer over the exterior surface of the body. A hermetic high density interconnect structure is provided by forming a continuous metal layer over the outermost dielectric layer of the multilayer interconnect structure and by disposing that continuous metal layer in a hermetically sealing relation to the substrate of the high density interconnect structure. A variety of techniques may be used for providing electrical feedthroughs between the interior and exterior of the hermetic enclosure as may a pseudo-hermetic enclosure in those situations where true hermeticity is not required.

Abstract: Active components of a microwave system are interconnected on a substrate by a dielectric-overlay, high-density-interconnect structure in a manner which provides close impedance matching, minimizes impedance discontinuities and substantially increases the yield of good circuits.

Abstract: A mixture for affixing dice to a substrate includes a thermoplastic polyimide, a solvent for the polyimide, and a solvent which does not dissolve the polyimide but adds thixotropicity to the mixture. The mixture is applied to the substrate, the dice are placed thereon, and the solvents are evaporated to bond the dice to the substrate. The bond is radiation hard and exhibits high shear pull strength. A poor solvent for the polyimide, sprayed over the dice and exposed portions of die attach material, causes some polyimide to precipitate out of solution in the exposed portions of die attach material to form a grid that extends between the dice and prevents the dice from "swimming together" during high temperature processing. In a solvent die-attachment method, the substrate is first coated with a mixture of die attach material, and the mixture is dried. Spraying a solvent over the die attach material causes the material to soften so that the dice applied thereto may adhere.

Abstract: A high density interconnect structure is rendered suitable for the packaging of overlay sensitive chips by providing a cavity in the high density interconnect structure which spaces the sensitive surface of such chips from the overlying high density interconnect structure in a manner which prevents undesired interactions between the dielectric of the high density interconnect structure and the chip.

Abstract: A high acceleration object includes an electronic system which is operable at accelerations in excess of 20,000 g. Connections between integrated circuit chips and other portions of the electronic system are provided by metallization patterns disposed on polymer dielectric layers which are self-supporting across gaps between components. A high density interconnect structure is disposed within the cavity of a hermetically sealed package.

Abstract: A multichip integrated circuit package comprises a substrate having a flat upper surface to which is affixed one or more integrated circuit chips having interconnection pads. A polymer encapsulant completely surrounds the integrated circuit chips. The encapsulant is provided with a plurality of via openings therein to accommodate a layer of interconnection metallization. The metallization serves to connect various chips and chip pads with the interconnection pads disposed on the chips. In specific embodiments, the module is constructed to be repairable, have high I/O capability with optimal heat removal, have optimized speed, be capable of incorporating an assortment of components of various thicknesses and function, and be hermetically sealed with a high I/O count. Specific processing methods for each of the various module features are described herein, along with additional structural enhancements.

Abstract: An improved high density interconnect structure may include electronic components mounted on both sides of its substrate or a substrate which is only as thick as the semiconductor chips which reduces the overall structure thickness to the thickness of the semiconductor chips plus the combined thickness of the high density interconnect structure's dielectric and conductive layers. In the two-sided structures, feedthroughs, which are preferably hermetic, provide connections between opposite sides of the substrate. Substrates of either of these types may be stacked to form a three-dimensional structure. Means for connecting between adjacent substrates are preferably incorporated within the boundaries of the stack rather than on the outside surface thereof.

Abstract: A mixture for affixing dice to a substrate includes a thermoplastic polyimide, a solvent for the polyimide, and a solvent which does not dissolve the polyimide but adds thixotropicity to the mixture. The mixture is applied to the substrate, the dice are placed thereon, and the solvents are evaporated to bond the dice to the substrate. The bond is radiation hard and exhibits high shear pull strength. A poor solvent for the polyimide, sprayed over the dice and exposed portions of die attach material, causes some polyimide to precipitate out of solution in the exposed portions of die attach material to form a grid that extends between the dice and prevents the dice from "swimming together" during high temperature processing. In a solvent die-attachment method, the substrate is first coated with a mixture of die attach material, and the mixture is dried. Spraying a solvent over the die attach material causes the material to soften so that the dice applied thereto may adhere.

Abstract: A packaged electronics system, having respective portions each with respective input and output ports, and having interconnection busses between certain of these ports, is tested as follows. Each input port has a set of first transmission gates associated therewith for selectively disconnecting it during testing from the end of each interconnection bus connected bit during normal operation. Each input port has a second set of transmission gates associated therewith for selectively applying test vectors thereto during testing as provided in parallel form from a serially loaded shift register. Each output port connects to the input connections of a respective set of tristate drivers for selectively applying its output signals at relatively low source impedance to at least one interconnection bus connected from the output connections of that set of tristate drivers.

Abstract: The functionality, versatility and connection and packing density of a high density interconnect structure is enhanced by mounting one or more components on top of the high density interconnect structure for connection to conductors of the high density interconnect structure and the chips embedded within the high density interconnect structure. Both active and passive components may be mounted in this manner, as may components which would be adversely affected by high density interconnect structure fabrication temperatures or by the presence of the high density interconnect structure dielectric.

Abstract: A high density interconnect structure incorporating a plurality of laminated dieletric layers is fabricated using thermoplastic adhesive layers of progressively lower glass transition temperature in order to maintain the stability of the already fabricated structure during the addition of the later laminations. This structure also facilitates the removal of only a portion of the high density interconnect structure where a fault in the system can be corrected in one of the upper layers of the high density interconnect structure.