Patents by Inventor Cha Won Koh

Cha Won Koh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11927890
    Abstract: A substrate processing apparatus includes a photoresist coater applying a photoresist film on a substrate, a humidifier increasing an amount of moisture in an ambient to which the photoresist film on the substrate is exposed, and an exposer irradiating the photoresist film exposed to the ambient having the increased amount of moisture with light. The humidifier is disposed between the photoresist coater and the exposer.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: March 12, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok Heo, Cha Won Koh, Sang Joon Hong, Hyun Woo Kim, Kyung-Won Kang, Dong-Wook Kim, Kyung Won Seo, Young Il Jang, Yong Suk Choi
  • Publication number: 20230130025
    Abstract: A photoresist composition including an organometallic compound, and a method for fabricating a semiconductor device using the same are provided. The photoresist composition may include an organometallic compound, a radical sensitizer including a structure of Chemical formula 2-1 or Chemical formula 2-2, and a solvent. In Chemical formula 2-1, A1 is a substituted or unsubstituted hydrocarbon group having 1 to 20 carbon atoms, and R1, R2 and R3 are each independently hydrogen, a halogen, a substituted or unsubstituted hydrocarbon group having 1 to 20 carbon atoms, or a hetero-functional group. In Chemical formula 2-2, A2 is a substituted or unsubstituted hydrocarbon group having 1 to 20 carbon atoms, and R4 and R5 are each independently hydrogen, a halogen, a substituted or unsubstituted hydrocarbon group having 1 to 20 carbon atoms, or a hetero-functional group.
    Type: Application
    Filed: October 6, 2022
    Publication date: April 27, 2023
    Applicant: Samsung SDI Co., Ltd.
    Inventors: Cha Won KOH, Tsunehiro NISHI, Ji Young PARK, Dong Il SHIN, Chang Soo WOO, Min Young LEE, Hyun Jae LEE
  • Patent number: 10797056
    Abstract: A semiconductor device and methods of manufacturing the same are provided. The semiconductor device includes a substrate, buried semiconductor layers, a word line, a bit line, buried contacts, and insulation spacers, and a charge storage. The substrate has active regions and field regions. The buried semiconductor layers are buried in the substrate at the active regions. The word line is buried in the substrate and crosses one of the active regions. The bit line is disposed in one of the active regions. The buried contacts are disposed on the active regions and the field regions. The insulation spacers are disposed on the substrate and on a sidewall of the buried contacts, respectively. The charge storage is disposed on one or more of the buried contacts. The buried semiconductor layers contact, respectively, one of the buried contacts and one of the insulation spacers.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: October 6, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-A Kim, Yong-Kwan Kim, Se-Keun Park, Joo-Young Lee, Cha-Won Koh, Yeong-Cheol Lee
  • Patent number: 10688437
    Abstract: A filter structure for chemical solution used in manufacturing an integrated circuit includes: a first membrane structure comprising a plurality of membrane units, each comprising a cathode comprising a plurality of first openings, an anode comprising a plurality of second openings, and an insulating layer between the cathode and the anode; and a filter housing configured to receive the first membrane structure therein, the filter housing comprising an inlet through which the chemical solution is introduced and an outlet through which the chemical solution is discharged. The first membrane structure is configured such that when an electric field is applied between the cathode and the anode while the chemical solution introduced through the inlet passes through the first membrane structure, impurities having both positively charged particles and negatively charged particles in the chemical solution are trapped in the first membrane structure.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: June 23, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Cha-won Koh, Oleg Feygenson, Jung-hyeon Kim, Hyun-woo Kim, Eun-sung Kim
  • Publication number: 20200161308
    Abstract: A semiconductor device and methods of manufacturing the same are provided. The semiconductor device includes a substrate, buried semiconductor layers, a word line, a bit line, buried contacts, and insulation spacers, and a charge storage. The substrate has active regions and field regions. The buried semiconductor layers are buried in the substrate at the active regions. The word line is buried in the substrate and crosses one of the active regions. The bit line is disposed in one of the active regions. The buried contacts are disposed on the active regions and the field regions. The insulation spacers are disposed on the substrate and on a sidewall of the buried contacts, respectively. The charge storage is disposed on one or more of the buried contacts. The buried semiconductor layers contact, respectively, one of the buried contacts and one of the insulation spacers.
    Type: Application
    Filed: January 22, 2020
    Publication date: May 21, 2020
    Applicant: SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Inventors: Jin-A KIM, Yong-Kwan Kim, Se-Keun Park, Joo-Young Lee, Cha-Won Koh, Yeong-Cheol Lee
  • Patent number: 10586798
    Abstract: A semiconductor device and methods of manufacturing the same are provided. The semiconductor device includes a substrate, word lines, a doped junction, bit line structures, and buried contacts. The substrate has active regions. The word lines extend across the active regions. The doped junction has impurities and is arranged at the active regions, and includes first junctions and second junctions, each first junction arranged at a central portion of one of the active regions and each second junction arranged at an end portion of another one of the active regions, a buried semiconductor layer being included in each second junction. The bit line structures contact with a respective one of the first junctions. The buried contacts are arranged in a matrix shape, each contacting with a respective one of the second junctions and the included buried semiconductor layer and simultaneously contacting with a charge storage for storing data.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: March 10, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-A Kim, Yong-Kwan Kim, Se-Keun Park, Joo-Young Lee, Cha-Won Koh, Yeong-Cheol Lee
  • Patent number: 10438810
    Abstract: Example embodiments relate to a method of forming a photoresist pattern and a method of fabricating a semiconductor device using the same. The method of fabricating a semiconductor device comprises forming a mask layer on a substrate, forming a photoresist pattern on the mask layer, the photoresist pattern having pattern portions at a first height and recess portions, applying a first liquid onto the photoresist pattern, filling the recess portions with a pattern filler at a second height, the pattern filler having an higher etch rate than the etch rate of the pattern portions to the same etchant, removing the first liquid, etching the pattern filler after removing the first liquid, etching the mask layer via the photoresist pattern to form a mask pattern, and etching the substrate via the mask pattern to form a fine pattern.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: October 8, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cha-Won Koh, Cheol-Hong Park, Hyun-Woo Kim, Jin-Kyu Han
  • Publication number: 20190232227
    Abstract: A filter structure for chemical solution used in manufacturing an integrated circuit includes: a first membrane structure comprising a plurality of membrane units, each comprising a cathode comprising a plurality of first openings, an anode comprising a plurality of second openings, and an insulating layer between the cathode and the anode; and a filter housing configured to receive the first membrane structure therein, the filter housing comprising an inlet through which the chemical solution is introduced and an outlet through which the chemical solution is discharged. The first membrane structure is configured such that when an electric field is applied between the cathode and the anode while the chemical solution introduced through the inlet passes through the first membrane structure, impurities having both positively charged particles and negatively charged particles in the chemical solution are trapped in the first membrane structure.
    Type: Application
    Filed: September 5, 2018
    Publication date: August 1, 2019
    Inventors: Cha-won Koh, Oleg Feygenson, Jung-hyeon Kim, Hyun-woo Kim, Eun-sung Kim
  • Patent number: 10345701
    Abstract: A photoresist polymer includes a first repeating unit and a second repeating unit. The first repeating unit includes a fluorine leaving group that is configured to be removed by a photo-chemical reaction. The second repeating unit includes a silicon-containing leaving group that is configured to be removed by the fluorine leaving group when the fluorine leaving group is removed from the first repeating unit.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: July 9, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin Park, Hyun-woo Kim, Jin-Kyu Han, Cha-Won Koh
  • Publication number: 20190206872
    Abstract: A semiconductor device and methods of manufacturing the same are provided. The semiconductor device includes a substrate, word lines, a doped junction, bit line structures, and buried contacts. The substrate has active regions. The word lines extend across the active regions. The doped junction has impurities and is arranged at the active regions, and includes first junctions and second junctions, each first junction arranged at a central portion of one of the active regions and each second junction arranged at an end portion of another one of the active regions, a buried semiconductor layer being included in each second junction. The bit line structures contact with a respective one of the first junctions. The buried contacts are arranged in a matrix shape, each contacting with a respective one of the second junctions and the included buried semiconductor layer and simultaneously contacting with a charge storage for storing data.
    Type: Application
    Filed: October 25, 2018
    Publication date: July 4, 2019
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-A KIM, Yong-Kwan KIM, Se-Keun PARK, Joo-Young LEE, Cha-Won KOH, Yeong-Cheol LEE
  • Publication number: 20180069020
    Abstract: A photoresist polymer includes a first repeating unit and a second repeating unit. The first repeating unit includes a fluorine leaving group that is configured to be removed by a photo-chemical reaction. The second repeating unit includes a silicon-containing leaving group that is configured to be removed by the fluorine leaving group when the fluorine leaving group is removed from the first repeating unit.
    Type: Application
    Filed: November 9, 2017
    Publication date: March 8, 2018
    Inventors: Jin PARK, Hyun-woo KIM, Jin-Kyu HAN, Cha-Won KOH
  • Patent number: 9842852
    Abstract: A photoresist polymer includes a first repeating unit and a second repeating unit. The first repeating unit includes a fluorine leaving group that is configured to be removed by a photo-chemical reaction. The second repeating unit includes a silicon-containing leaving group that is configured to be removed by the fluorine leaving group when the fluorine leaving group is removed from the first repeating unit.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: December 12, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin Park, Hyun-Woo Kim, Jin-Kyu Han, Cha-Won Koh
  • Patent number: 9772555
    Abstract: In a method of forming a pattern, a lower coating layer and a photoresist layer are sequentially formed on an object layer. An exposure process may be performed such that the photoresist layer is divided into an exposed portion and a non-exposed portion. A portion of the lower coating layer overlapping or contacting the exposed portion is at least partially transformed into a polarity conversion portion that has a polarity substantially identical to that of the exposed portion. The non-exposed portion of the photoresist layer is selectively removed.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: September 26, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Cheol-Hong Park, Sang-Yoon Woo, Cha-Won Koh, Hyun-Woo Kim, Sang-Min Park
  • Publication number: 20170125257
    Abstract: Example embodiments relate to a method of forming a photoresist pattern and a method of fabricating a semiconductor device using the same. The method of fabricating a semiconductor device comprises forming a mask layer on a substrate, forming a photoresist pattern on the mask layer, the photoresist pattern having pattern portions at a first height and recess portions, applying a first liquid onto the photoresist pattern, filling the recess portions with a pattern filler at a second height, the pattern filler having an higher etch rate than the etch rate of the pattern portions to the same etchant, removing the first liquid, etching the pattern filler after removing the first liquid, etching the mask layer via the photoresist pattern to form a mask pattern, and etching the substrate via the mask pattern to form a fine pattern.
    Type: Application
    Filed: August 22, 2016
    Publication date: May 4, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Cha-Won KOH, Cheol-Hong PARK, Hyun-Woo KIM, Jin-Kyu HAN
  • Patent number: 9520289
    Abstract: In a method of forming a pattern of a semiconductor device, a hard mask layer is formed on a substrate. A photoresist film is coated on the hard mask layer. The photoresist film is exposed and developed to form a first photoresist pattern. A smoothing process is performed on the first photoresist pattern to form a second photoresist pattern having a roughness property lower from that of the first photoresist pattern. In the smoothing process, a surface of the first photoresist pattern is treated with an organic solvent. An ALD layer is formed on a surface of the second photoresist pattern. The ALD layer is anisotropically etched to form an ALD layer pattern on a sidewall of the second photoresist pattern. The hard mask layer is etched using the second photoresist pattern and the ALD layer pattern as an etching mask to form a hard mask pattern.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: December 13, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin Park, Cha-Won Koh, Hyun-Woo Kim
  • Publication number: 20160358778
    Abstract: In a method of forming a pattern, a lower coating layer and a photoresist layer are sequentially formed on an object layer. An exposure process may be performed such that the photoresist layer is divided into an exposed portion and a non-exposed portion. A portion of the lower coating layer overlapping or contacting the exposed portion is at least partially transformed into a polarity conversion portion that has a polarity substantially identical to that of the exposed portion. The non-exposed portion of the photoresist layer is selectively removed.
    Type: Application
    Filed: February 19, 2016
    Publication date: December 8, 2016
    Inventors: Cheol-Hong PARK, Sang-Yoon WOO, Cha-Won KOH, Hyun-Woo KIM, Sang-Min PARK
  • Patent number: 9482953
    Abstract: A lithography apparatus and a method of using the same, the apparatus including a stage for accommodating a substrate that has a photoresist film thereon; a main unit on the stage, the main unit being configured to irradiate a projection beam to the photoresist film; and an electric field unit adjacent to the stage, the electric field unit being configured to apply an electric field to the photoresist film, wherein the electric field unit is configured to be turned on at a same time as or before irradiation of the projection beam, and is configured to be turned off at a same time as or after termination of the projection beam.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: November 1, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Cha-Won Koh, Jeon-Il Lee, Su-Min Kim, Hyun-Woo Kim, Jin Park
  • Patent number: 9412604
    Abstract: The present inventive concept provides methods of manufacturing a semiconductor device including forming an inner mask layer on an etching target film, the inner mask layer including a polymer; forming a porous film on the etching target film, the porous film covering the inner mask layer; supplying an acid source to an outer surface area of the inner mask layer through the porous film; inducing a chemical reaction of the polymer included in the inner mask layer in the outer surface area by using the acid source; forming inner mask patterns by removing a chemically reacted portion of the inner mask layer; and etching the etching target film by using at least a portion of the porous film and the inner mask patterns as an etching mask.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: August 9, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cha-won Koh, Hyun-woo Kim, Jong-soo Kim, Jin Park, Hyung-rae Lee
  • Publication number: 20160170304
    Abstract: A photoresist polymer includes a first repeating unit and a second repeating unit. The first repeating unit includes a fluorine leaving group that is configured to be removed by a photo-chemical reaction. The second repeating unit includes a silicon-containing leaving group that is configured to be removed by the fluorine leaving group when the fluorine leaving group is removed from the first repeating unit.
    Type: Application
    Filed: December 4, 2015
    Publication date: June 16, 2016
    Inventors: Jin PARK, Hyun-Woo Kim, Jin-Kyu Han, Cha-Won Koh
  • Publication number: 20160049306
    Abstract: The present inventive concept provides methods of manufacturing a semiconductor device including forming an inner mask layer on an etching target film, the inner mask layer including a polymer; forming a porous film on the etching target film, the porous film covering the inner mask layer; supplying an acid source to an outer surface area of the inner mask layer through the porous film; inducing a chemical reaction of the polymer included in the inner mask layer in the outer surface area by using the acid source; forming inner mask patterns by removing a chemically reacted portion of the inner mask layer; and etching the etching target film by using at least a portion of the porous film and the inner mask patterns as an etching mask.
    Type: Application
    Filed: April 21, 2015
    Publication date: February 18, 2016
    Inventors: Cha-won Koh, Hyun-woo Kim, Jong-soo Kim, Jin Park, Hyung-rae Lee