Patents by Inventor Che-Hoo Ng

Che-Hoo Ng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • End-of-range damage suppression for ultra-shallow junction formation
    Patent number: 6074937
    Abstract: Lightly doped regions are implanted into an amorphous region in the semiconductor substrate to significantly reduce transient enhanced diffusion upon subsequent activation annealing. A sub-surface non-amorphous region is also formed before activation annealing to substantially eliminate end-of-range defects on crystallization of amorphous region containing the lightly doped implants.
    Type: Grant
    Filed: April 13, 1998
    Date of Patent: June 13, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Shekhar Pramanick, Che-Hoo Ng, Emi Ishida
  • Ultra shallow junction formation using amorphous silicon layer
    Patent number: 6008098
    Abstract: A method of achieving shallow junctions in a semiconductor device is achieved by providing an amorphous silicon layer over an epitaxial layer, implanting ions into the amorphous silicon layer, and annealing the resulting device to recrystallize the amorphous silicon layer and drive in the implanted ions to a shallow depth less than the depth of the amorphous silicon layer.
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: December 28, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Shekhar Pramanick, Che-Hoo Ng
  • Reduction of charge loss in nonvolatile memory cells by phosphorus implantation into PECVD nitride/oxynitride films
    Patent number: 5940735
    Abstract: A semiconductor device formed in a semiconductor substrate with a low hydrogen content barrier layer formed over the semiconductor device. The barrier layer is implanted with phosphorus ions. The semiconductor device may have a hydrogen getter layer formed under the barrier layer. The barrier layer is a high temperature PECVD nitride film, a high temperature PECVD oxynitride film or a high temperature LPCVD nitride film. The hydrogen getter layer is P-doped film having a thickness between 1000 and 2000 Angstroms and is a PSG, BPSG, PTEOS deposited oxide film, or BPTEOS deposited oxide film. Interconnects are made by a tungsten damascene process.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: August 17, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Sunil D. Mehta, Che-Hoo Ng
  • Virtual hard mask for etching
    Patent number: 5876903
    Abstract: A method of hardening photoresist (24) by bombardment with ionized particles (42), such as argon. Ionic bombardment causes formation of a hardened skin (22) on the exposed top (30) and side walls (32) of the photoresist (24). The hardened skin erodes at a reduced rate during etching and is less likely to react with products created during etching, thereby allowing etching of more accurate line widths and gaps.
    Type: Grant
    Filed: December 31, 1996
    Date of Patent: March 2, 1999
    Assignee: Advanced Micro Devices
    Inventors: Che-Hoo Ng, Bhanwar Singh, Shekhar Pramanick, Subash Gupta
  • Conductive layer with anti-reflective surface portion
    Patent number: 5841179
    Abstract: The application of a dissimilar anti-reflective coating on a conductive layer during photolithographic processing is avoided, as by modifying a portion of the upper surface of the conductive layer to exhibit anti-reflective properties. In an embodiment of the present invention, impurity ions are implanted into a portion of the upper surface of an aluminum or an aluminum-alloy conductive layer to render the upper portion substantially amorphous and, hence, decrease its reflectivity to perform an anti-reflective function.
    Type: Grant
    Filed: August 28, 1996
    Date of Patent: November 24, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Shekhar Pramanick, Bhanwar Singh, Che-Hoo Ng