Patents by Inventor Chen-Fu Chu

Chen-Fu Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10797188
    Abstract: The invention discloses a semiconductor structure, processing light signal, the semiconductor structure comprising: a first type semiconductor layer; a second type semiconductor layer; an active layer located between the first type semiconductor layer and the second type semiconductor layer; a reflector covered surfaces of the first type semiconductor layer and the second type semiconductor layer; a first pad disposed on a top surface of the reflector which is covered the first type semiconductor layer; a second pad disposed on the top surface of the reflector or second type semiconductor layer; an aperture disposed on the top surface of the first type semiconductor layer and passed through the reflector; and a light collection module disposed around the aperture or covered a top surface of the reflector.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: October 6, 2020
    Inventor: Chen-Fu Chu
  • Publication number: 20190097103
    Abstract: A semiconductor continuous array layer comprising: an array of multiple semiconductor units; a sidewall of each semiconductor unit is surrounded by a semi-cured material or a cured material connecting the semiconductor units together to form a semiconductor continuous array; wherein multiple voids or air gaps are enclosed by the semi-cured material or the cured material within the semiconductor continuous array or around the edge of the semiconductor continuous array.
    Type: Application
    Filed: November 20, 2018
    Publication date: March 28, 2019
    Inventor: Chen-Fu CHU
  • Patent number: 10205055
    Abstract: The invention discloses a light engine array having at least an anode and a cathode comprising: a first type semiconductor layer; an active layer; and a second type semiconductor layer; a cathode electrode has a conductive metal layer in electrical contact with a portion of the first type semiconductor layer, and the second type semiconductor layer to form a short circuit structure in a common cathode region; and an anode electrode has the conductive metal layer and coupled to a portion of the first type semiconductor layer; wherein, the anode electrode is electrically isolated with the active layer and the second type semiconductor layer in a sub-pixel region.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: February 12, 2019
    Assignee: HIPHOTON CO., LTD.
    Inventors: Chen-Fu Chu, Chen-Hsien Chu
  • Patent number: 10170671
    Abstract: A method to fill the flowable material into the semiconductor assembly module gap regions is described. In an embodiment, multiple semiconductor units are formed on the substrate to create an array module; the array module is attached to a backplane having circuitry to form the semiconductor assembly module in which multiple gap regions are formed inside the semiconductor assembly module and edge gap regions are formed surround an edge of the assembly module; The flowable material is forced inside the gap regions by performing the high acting pressure environment and then cured to be a stable solid to form a robustness structure. A semiconductor convert module is formed by removing the substrate utilizing a substrate removal process. A semiconductor driving module is formed by utilizing a connecting layer on the semiconductor convert module. In one embodiment, a vertical light emitting diode semiconductor driving module is formed to light up the vertical LED array.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: January 1, 2019
    Inventor: Chen-Fu Chu
  • Publication number: 20180047876
    Abstract: The invention discloses a light engine array having at least an anode and a cathode comprising: a first type semiconductor layer; an active layer; and a second type semiconductor layer; a cathode electrode has a conductive metal layer in electrical contact with a portion of the first type semiconductor layer, and the second type semiconductor layer to form a short circuit structure in a common cathode region; and an anode electrode has the conductive metal layer and coupled to a portion of the first type semiconductor layer; wherein, the anode electrode is electrically isolated with the active layer and the second type semiconductor layer in a sub-pixel region.
    Type: Application
    Filed: October 25, 2017
    Publication date: February 15, 2018
    Inventors: CHEN-FU CHU, CHEN-HSIEN CHU
  • Publication number: 20170365755
    Abstract: A method to fill the flowable material into the semiconductor assembly module gap regions is described. In an embodiment, multiple semiconductor units are formed on the substrate to create an array module; the array module is attached to a backplane having circuitry to form the semiconductor assembly module in which multiple gap regions are formed inside the semiconductor assembly module and edge gap regions are formed surround an edge of the assembly module; The flowable material is forced inside the gap regions by performing the high acting pressure environment and then cured to be a stable solid to form a robustness structure. A semiconductor convert module is formed by removing the substrate utilizing a substrate removal process. A semiconductor driving module is formed by utilizing a connecting layer on the semiconductor convert module. In one embodiment, a vertical light emitting diode semiconductor driving module is formed to light up the vertical LED array.
    Type: Application
    Filed: May 24, 2017
    Publication date: December 21, 2017
    Inventor: Chen-Fu CHU
  • Patent number: 9831387
    Abstract: The invention discloses a light engine array comprises a multiple light engines arranged into an array, multiple dams located on a first surface of the light engines; and the dams combined a dam array.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: November 28, 2017
    Assignee: Hiphoton Co., Ltd.
    Inventors: Chen-Fu Chu, Chen-Hsien Chu
  • Patent number: 9343620
    Abstract: A method for fabricating a light emitting diode die includes the steps of providing a carrier substrate and forming an epitaxial structure on the carrier substrate including a first type semiconductor layer, a multiple quantum well (MQW) layer on the first type semiconductor layer configured to emit light, and a second type semiconductor layer on the multiple quantum well (MQW) layer. The method also includes the steps of forming a plurality of trenches through the epitaxial structure, forming a reflector layer on the second type semiconductor layer, forming a seed layer on the reflector layer and in the trenches, and forming a substrate on the seed layer having an area configured to protect the epitaxial structure.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: May 17, 2016
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Jiunn-Yi Chu, Chen-Fu Chu, Chao-Chen Cheng
  • Publication number: 20160020353
    Abstract: The invention discloses a semiconductor structure, processing light signal, the semiconductor structure comprising: a first type semiconductor layer; a second type semiconductor layer; an active layer located between the first type semiconductor layer and the second type semiconductor layer; a reflector covered surfaces of the first type semiconductor layer and the second type semiconductor layer; a first pad disposed on a top surface of the reflector which is covered the first type semiconductor layer; a second pad disposed on the top surface of the reflector or second type semiconductor layer; an aperture disposed on the top surface of the first type semiconductor layer and passed through the reflector; and a light collection module disposed around the aperture or covered a top surface of the reflector.
    Type: Application
    Filed: September 28, 2015
    Publication date: January 21, 2016
    Inventor: Chen-Fu CHU
  • Publication number: 20150362165
    Abstract: The invention discloses a light engine array comprises a multiple light engines arranged into an array, multiple dams located on a first surface of the light engines; and the dams combined a dam array.
    Type: Application
    Filed: June 12, 2015
    Publication date: December 17, 2015
    Inventors: Chen-Fu CHU, Chen-Hsien CHU
  • Publication number: 20150340346
    Abstract: A structure of a semiconductor array comprises multiple semiconductor units, an isolation layer and a decomposed or buffer unit. Multiple semiconductor units combined the semiconductor array. The isolation layer coated each semiconductor unit. The decomposed or buffer unit coated the isolation layer and filled between each semiconductor unit to enhance structure of the semiconductor units. Wherein, the isolation layer protected by edge of the semiconductor units and the decomposed or buffer unit.
    Type: Application
    Filed: May 22, 2015
    Publication date: November 26, 2015
    Inventor: Chen-Fu CHU
  • Patent number: 9130114
    Abstract: A vertical light emitting diode (VLED) die includes an epitaxial structure having a first-type confinement layer, an active layer on the first-type confinement layer configured as a multiple quantum well (MQW) configured to emit light, and a second-type confinement layer having a roughened surface. In a first embodiment, the roughened surface includes a pattern of holes with a depth (d) in a major surface thereof surrounded by a pattern of protuberances with a height (h) on the major surface. In a second embodiment, the roughened surface includes a pattern of primary protuberances surrounded by a pattern of secondary protuberances.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: September 8, 2015
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Hao-Chung Cheng, Feng-Hsu Fan, Wen-Huang Liu, Chao-Chen Cheng, David Trung Doan, Yang Po Wen
  • Patent number: 8933467
    Abstract: A light emitting diode (LED) system includes a substrate, an application specific integrated circuit (ASIC), and at least one light emitting diode (LED) that includes a Group-III nitride based material such as GaN, InGaN, AlGaN, AlInGaN or other (Ga, In or Al) N-based materials. The light emitting diode (LED) system can also include a polymer lens, and a phosphor layer on the lens or light emitting diode (LED) for producing white light. In addition, multiple light emitting diodes (LEDs) can be mounted on the substrate, and can have different colors for smart color control lighting. The substrate and the application specific integrated circuit (ASIC) are configured to provide an integrated LED circuit having smart functionality. In addition, the substrate is configured to compliment and expand the functions of the application specific integrated circuit (ASIC), and can also include built in integrated circuits for performing additional electrical functions.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: January 13, 2015
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Trung Tri Doan, Tien Wei Tan, Wen-Huang Liu, Chen-Fu Chu, Yung Wei Chen
  • Patent number: 8921204
    Abstract: A method for fabricating semiconductor dice includes the steps of providing a wafer assembly having a substrate and semiconductor structures on the substrate; and defining the semiconductor dice on the substrate. The method also includes the step of separating the substrate from the semiconductor structures by applying a first laser pulse to each semiconductor die on the substrate having first parameters selected to break an interface between the substrate and the semiconductor structures and then applying a second laser pulse to each semiconductor die on the substrate having second parameters selected to complete separation of the substrate from the semiconductor structures. The method can also include the steps of forming one or more intermediate structures between the semiconductor dice on the substrate configured to protect the semiconductor dice during the separating step.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: December 30, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Hao-Chung Cheng, Trung Tri Doan, Feng-Hsu Fan
  • Publication number: 20140339496
    Abstract: A vertical light emitting diode (VLED) die includes an epitaxial structure having a first-type confinement layer, an active layer on the first-type confinement layer configured as a multiple quantum well (MQW) configured to emit light, and a second-type confinement layer having a roughened surface. In a first embodiment, the roughened surface includes a pattern of holes with a depth (d) in a major surface thereof surrounded by a pattern of protuberances with a height (h) on the major surface. In a second embodiment, the roughened surface includes a pattern of primary protuberances surrounded by a pattern of secondary protuberances.
    Type: Application
    Filed: May 16, 2013
    Publication date: November 20, 2014
    Inventors: Chen-FU Chu, Hao-Chun Cheng, Feng-Hsu Fan, Wen-Huang Liu, Chao-Chen Cheng, David Trung Doan, Yang Po Wen
  • Patent number: 8871547
    Abstract: A method for fabricating a vertical light-emitting diode (VLED) structure includes the steps of providing a carrier substrate, and forming a semiconductor structure on the carrier substrate having a p-type confinement layer, a multiple quantum well (MQW) layer in electrical contact with the p-type confinement layer configured to emit electromagnetic radiation, and an n-type confinement layer in electrical contact with the multiple quantum well (MQW) layer. The method also includes the steps of removing the carrier substrate using a laser pulse to expose an inverted surface of the n-type confinement layer, and forming a metal contact on the surface of the n-type confinement layer.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: October 28, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Wen-Huang Liu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Trung Tri Doan
  • Patent number: 8802469
    Abstract: A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: August 12, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Trung Tri Doan, Hao-Chun Cheng, Feng-Hsu Fan, Fu-Hsien Wang
  • Patent number: 8802465
    Abstract: Systems and methods for fabricating a light emitting diode include forming a multilayer epitaxial structure above a carrier substrate; depositing at least one metal layer above the multilayer epitaxial structure; removing the carrier substrate.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: August 12, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Trung Tri Doan, Chen-Fu Chu
  • Patent number: 8778780
    Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: July 15, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Trung-Tri Doan, Chen-Fu Chu, Hao-Chun Cheng, Feng-Hsu Fan
  • Patent number: D715234
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: October 14, 2014
    Assignee: SemiLEDs Optoelectronics Co., Ltd.
    Inventors: Hsun-Cheng Chan, Hao-Chun Cheng, Chen-Fu Chu