Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.

Abstract: A plating system and a method thereof are disclosed. The plating system performs a N-stage plating drilling filling process in which a M-th stage plating drilling filling process with a M-th current density is performed on a hole of a substrate for a M-th plating time to form a M-th plating layer on the to-be-plated layer, wherein N is a positive integer equal to or greater than 3, and M is a positive integer positive integer in a range of 1 to N. Therefore, the technical effect of providing a higher drilling filling rate than conventional plating filling technology under a condition that a total thickness of plating layers is fixed can be achieved.

Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.

Abstract: A semiconductor device includes a first gate structure extending along a first lateral direction. The semiconductor device includes a first interconnect structure, disposed above the first gate structure, that extends along a second lateral direction perpendicular to the first lateral direction. The first interconnect structure includes a first portion and a second portion electrically isolated from each other by a first dielectric structure. The semiconductor device includes a second interconnect structure, disposed between the first gate structure and the first interconnect structure, that electrically couples the first gate structure to the first portion of the first interconnect structure. The second interconnect structure includes a recessed portion that is substantially aligned with the first gate structure and the dielectric structure along a vertical direction.

Abstract: A method for performing adaptive multi-link aggregation dispatching control in multi-link operation architecture and associated apparatus are provided.

Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.

Abstract: An isolated bispecific antibody or antigen-binding portion thereof includes a first chain which specifically binds to human PD-1(hPD-1) and blocks the interaction between hPD-1 and PD-L1, and a second chain which specifically binds to human CD47 and inhibits its interaction with SIRP-alpha, where the first chain and the second chain are coupled in a knob-in-hole format through their respective CH3 domain.

Abstract: Systems, methods, and devices are described herein for integrated circuit (IC) layout validation. A plurality of IC patterns are collected which include a first set of patterns capable of being manufactured and a second set of patterns incapable of being manufactured. A machine learning model is trained using the plurality of IC patterns. The machine learning model generates a prediction model for validating IC layouts. The prediction model receives data including a set of test patterns comprising scanning electron microscope (SEM) images of IC patterns. Design violations associated with an IC layout are determined based on the SEM images and the plurality of IC patterns. A summary of the design violations is provided for further characterization of the IC layout.

Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.

Abstract: This invention relates to processes and systems of rapid prototyping and production. Its features includes flexible material deposition along tangential directions of surfaces of a part to be made, thereby eliminating stair-shape surface due to uniform horizontal layer deposition, increasing width of material deposition to increase build up rate, applying the principles of traditional forming/joining processes, such as casting, fusion welding, plastic extrusion and injection molding in the fabrication process so that various industrial materials can be processed, applying comparatively low cost heating sources, such as induction heating and arc-heating. Additional features include varying width and size of material deposition in accordance with geometry to be formed and applying a differential molding means for improved shape formation and surface finishing.

Abstract: A MEMS resonator active temperature compensation method is provided. The MEMS resonator active temperature compensation method includes: a MEMS resonator is provided, wherein a structural resistance of the MEMS resonator is varied with an environmental temperature; a structural resistance shift value is formed by a variation of the environmental temperature; an electrical circuit is provided, wherein the electrical circuit is electrically connected with the MEMS resonator for providing an adjustment mechanism to the MEMS resonator; and a compensation value is provided from the adjustment mechanism for controlling the structural resistance shift value.

Abstract: An ultra low power thermally-actuated oscillator and driving circuit thereof are provided. The ultra low power thermally-actuated oscillator includes proof masses, thermally-actuated element and a plurality of driving elements. The proof masses is symmetrically disposed and suspended from a substrate by spring structure. The thermally-actuated element is a line structure to effectively reduce the motional impedance and direct current power. Wherein, the thermally-actuated element is connected to the proof masses or the spring structure. The plurality of driving elements are respectively disposed on both sides of the thermally-actuated element to provide a driving current. When the driving current flows through the thermally-actuated element, the thermally-actuated element will be deformed and thus the proof masses will be driven to produce a harmonic oscillation.

Abstract: An ultra low power thermally-actuated oscillator and driving circuit thereof are provided. The ultra low power thermally-actuated oscillator includes proof masses, thermally-actuated element and a plurality of driving elements. The proof masses is symmetrically disposed and suspended from a substrate by spring structure. The thermally-actuated element is a line structure to effectively reduce the motional impedance and direct current power. Wherein, the thermally-actuated element is connected to the proof masses or the spring structure. The plurality of driving elements are respectively disposed on both sides of the thermally-actuated element to provide a driving current. When the driving current flows through the thermally-actuated element, the thermally-actuated element will be deformed and thus the proof masses will be driven to produce a harmonic oscillation.

Abstract: An electronic device including a shell, an antenna unit, an insulating layer and an isolating conductor is provided. The material of the shell includes conductive material. The antenna unit is disposed on the shell and includes a first antenna and a second antenna. The first antenna and the second antenna are grounded to the shell. The insulating layer is disposed on the shell and located between a ground plane of the first antenna and a ground plane of the second antenna. The isolating conductor is disposed on the insulating layer and has a slot.

Abstract: A MEMS resonator active temperature compensation method is provided. The MEMS resonator active temperature compensation method includes: a MEMS resonator is provided, wherein a structural resistance of the MEMS resonator is varied with an environmental temperature; a structural resistance shift value is formed by a variation of the environmental temperature; an electrical circuit is provided, wherein the electrical circuit is electrically connected with the MEMS resonator for providing an adjustment mechanism to the MEMS resonator; and a compensation value is provided from the adjustment mechanism for controlling the structural resistance shift value.

Abstract: An electronic device including a shell, an antenna unit, an insulating layer and an isolating conductor is provided. The material of the shell includes conductive material. The antenna unit is disposed on the shell and includes a first antenna and a second antenna. The first antenna and the second antenna are grounded to the shell. The insulating layer is disposed on the shell and located between a ground plane of the first antenna and a ground plane of the second antenna. The isolating conductor is disposed on the insulating layer and has a slot.

Abstract: A container date center includes a floor and a number of cabinets supported on the floor. The floor and each cabinet each define an installation slot. An insulation member defining a receiving slot is received in each installation slot. A wire is received in each receiving slot. An insulating lid is received in each installation slot to shield the receiving slot. A number of connecting portions extend from each wire, through the insulating lid. The installation slot of each cabinet is perpendicular to the installation slot of the floor. One end of the wire of the floor is connected to a power supply. The connecting portions of the floor are connected to bottom ends of the wires of the cabinets, for supplying power to the servers in the cabinets.

Abstract: A container date center includes a floor and a number of cabinets supported on the floor. The floor and each cabinet each define an installation slot. An insulation member defining a receiving slot is received in each installation slot. A wire is received in each receiving slot. An insulating lid is received in each installation slot to shield the receiving slot. A number of connecting portions extend from each wire, through the insulating lid. The installation slot of each cabinet is perpendicular to the installation slot of the floor. One end of the wire of the floor is connected to a power supply. The connecting portions of the floor are connected to bottom ends of the wires of the cabinets, for supplying power to the servers in the cabinets.

Abstract: A wireless mouse includes a switch unit arranged between a circuit board and a lower cover of the wireless mouse. The circuit board defines two electrical connection contacts which can control to provide power for the wireless mouse. The switch unit can make the electrical connection contacts be connected to each other in response to the wireless mouse is pressed by a user. The switch unit also can make the electrical connection contacts be not connected to each other in response to the wireless mouse is not pressed by a user.

Abstract: A system for automatic voltage range measurement borne by an electronic device controls a voltage regulator module (VRM) of the electronic device to output a work voltage equaling a work voltage output by the VRM last time added to or subtracted by a voltage difference. When a determination module determines the electronic device has failed to power on or a test of the electronic device for testing hardware of the electronic device has failed after the electronic device is powered on at a work voltage, a limit value of a voltage range boned by the electronic device is ascertained. The limit value is equal to the work voltage this time subtracted or added by the voltage difference.