Patents by Inventor Cheng-Chung Chang

Cheng-Chung Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11329140
    Abstract: A method of forming a gas spacer in a semiconductor device and a semiconductor device including the same are disclosed. In accordance with an embodiment, a method includes forming a gate stack over a substrate; forming a first gate spacer on sidewalls of the gate stack; forming a second gate spacer on sidewalls of the first gate spacer; removing the second gate spacer using an etching process to form a first opening, the etching process being performed at a temperature less than 0° C., the etching process using an etching solution including hydrogen fluoride; and depositing a dielectric layer over the first gate spacer and the gate stack, the dielectric layer sealing a gas spacer in the first opening.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: May 10, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Huang Huang, Ming-Jhe Sie, Cheng-Chung Chang, Shao-Hua Hsu, Shu-Uei Jang, An Chyi Wei, Shiang-Bau Wang, Ryan Chia-Jen Chen
  • Patent number: 11282967
    Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate, where a top portion of the fin comprises a layer stack that includes alternating layers of a first semiconductor material and a second semiconductor material; forming a dummy gate structure over the fin; forming openings in the fin on opposing sides of the dummy gate structure; forming source/drain regions in the openings; removing the dummy gate structure to expose the first semiconductor material and the second semiconductor material under the dummy gate structure; performing a first etching process to selectively remove the exposed first semiconductor material, where after the first etching process, the exposed second semiconductor material form nanostructures, where each of the nanostructures has a first shape; and after the first etching process, performing a second etching process to reshape each of the nanostructures into a second shape different from the first shape.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: March 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chung Chang, Hsiu-Hao Tsao, Ming-Jhe Sie, Shun-Hui Yang, Chen-Huang Huang, An Chyi Wei, Ryan Chia-Jen Chen
  • Patent number: 11229144
    Abstract: A heat dissipation housing includes an outer casing and the heat conduction block. The heat dissipation housing includes a thickness portion and at least one first tenon extending towards the inner direction of the outer casing from the inner surface of the thickness portion. Heat conduction block includes a base and at least one second tenon extending towards the outer direction of the outer casing from the base. The first tenon and the second tenon are combined, such that the first tenon, the second tenon, and the base together form a column extending towards the inner direction of the outer casing from the inner surface of the thickness portion. The outer casing and the heat conduction block both have a thermal conductivity greater than 0.5 W/m-k.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: January 18, 2022
    Assignee: SERCOMM CORPORATION
    Inventors: Shi-Jun Weng, Cheng-Chung Chang
  • Publication number: 20210408266
    Abstract: In an embodiment, a method of forming a semiconductor device includes forming a dummy gate stack over a substrate; forming a first spacer layer over the dummy gate stack; oxidizing a surface of the first spacer layer to form a sacrificial liner; forming one or more second spacer layers over the sacrificial liner; forming a third spacer layer over the one or more second spacer layers; forming an inter-layer dielectric (ILD) layer over the third spacer layer; etching at least a portion of the one or more second spacer layers to form an air gap, the air gap being interposed between the third spacer layer and the first spacer layer; and forming a refill layer to fill an upper portion of the air gap.
    Type: Application
    Filed: June 30, 2020
    Publication date: December 30, 2021
    Inventors: Ming-Jhe Sie, Chen-Huang Huang, Shao-Hua Hsu, Cheng-Chung Chang, Szu-Ping Lee, An Chyi Wei, Shiang-Bau Wang, Chia-Jen Chen
  • Publication number: 20210280695
    Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin.
    Type: Application
    Filed: May 20, 2021
    Publication date: September 9, 2021
    Inventors: Ryan Chia-Jen Chen, Li-Wei Yin, Tzu-Wen Pan, Cheng-Chung Chang, Shao-Hua Hsu, Yi-Chun Chen, Yu-Hsien Lin, Ming-Ching Chang
  • Patent number: 11114549
    Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: September 7, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ryan Chia-Jen Chen, Ming-Ching Chang, Yi-Chun Chen, Yu-Hsien Lin, Li-Wei Yin, Tzu-Wen Pan, Cheng-Chung Chang, Shao-Hua Hsu
  • Publication number: 20210226033
    Abstract: A method of forming a gas spacer in a semiconductor device and a semiconductor device including the same are disclosed. In accordance with an embodiment, a method includes forming a gate stack over a substrate; forming a first gate spacer on sidewalls of the gate stack; forming a second gate spacer on sidewalls of the first gate spacer; removing the second gate spacer using an etching process to form a first opening, the etching process being performed at a temperature less than 0° C., the etching process using an etching solution including hydrogen fluoride; and depositing a dielectric layer over the first gate spacer and the gate stack, the dielectric layer sealing a gas spacer in the first opening.
    Type: Application
    Filed: January 17, 2020
    Publication date: July 22, 2021
    Inventors: Chen-Huang Huang, Ming-Jhe Sie, Cheng-Chung Chang, Shao-Hua Hsu, Shu-Uei Jang, An Chyi Wei, Shiang-Bau Wang, Ryan Chia-Jen Chen
  • Publication number: 20210202756
    Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate, where a top portion of the fin comprises a layer stack that includes alternating layers of a first semiconductor material and a second semiconductor material; forming a dummy gate structure over the fin; forming openings in the fin on opposing sides of the dummy gate structure; forming source/drain regions in the openings; removing the dummy gate structure to expose the first semiconductor material and the second semiconductor material under the dummy gate structure; performing a first etching process to selectively remove the exposed first semiconductor material, where after the first etching process, the exposed second semiconductor material form nanostructures, where each of the nanostructures has a first shape; and after the first etching process, performing a second etching process to reshape each of the nanostructures into a second shape different from the first shape.
    Type: Application
    Filed: May 14, 2020
    Publication date: July 1, 2021
    Inventors: Cheng-Chung Chang, Hsiu-Hao Tsao, Ming-Jhe Sie, Shun-Hui Yang, Chen-Huang Huang, An Chyi Wei, Ryan Chia-Jen Chen
  • Publication number: 20200413569
    Abstract: A heat dissipation housing includes an outer casing and the heat conduction block. The heat dissipation housing includes a thickness portion and at least one first tenon extending towards the inner direction of the outer casing from the inner surface of the thickness portion. Heat conduction block includes a base and at least one second tenon extending towards the outer direction of the outer casing from the base. The first tenon and the second tenon are combined, such that the first tenon, the second tenon, and the base together form a column extending towards the inner direction of the outer casing from the inner surface of the thickness portion. The outer casing and the heat conduction block both have a thermal conductivity greater than 0.5 W/m-k.
    Type: Application
    Filed: June 12, 2020
    Publication date: December 31, 2020
    Inventors: Shi-Jun WENG, Cheng-Chung CHANG
  • Patent number: 10795241
    Abstract: An IP Camera includes a heat-generating element, a lens holder, a lens assembly and a heat-conducting element. The lens assembly includes a lens, a front portion and a rear portion opposite to the front portion. The front portion surrounds the lens. The lens assembly is disposed on the lens holder with the rear portion. The heat-conducting element has a thermal conductivity greater than 5 W/mK. The heat-conducting element is in contact with the heat-generating element, and a portion of the heat-conducting element surrounds the front portion.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: October 6, 2020
    Assignee: SERCOMM CORPORATION
    Inventor: Cheng-Chung Chang
  • Publication number: 20200192158
    Abstract: A fingerprint identification and uniform light structure is applied to an electronic device which includes a display screen. The fingerprint identification and uniform light structure includes a backlight plate, a plurality of light emitting units, a semi-transparent reflective filter and a fingerprint photography module. The backlight plate is located under the display screen, and the backlight plate includes a hole. The plurality of light emitting units are located on one side of the backlight plate, and the side is toward the display screen. The semi-transparent reflective filter is located in the hole. The fingerprint photography module is located under the filter.
    Type: Application
    Filed: September 6, 2019
    Publication date: June 18, 2020
    Inventors: CHENG-CHUNG CHANG, CHIH-LIANG LIAO
  • Patent number: 10492317
    Abstract: A latching structure includes a first plate, a second plate and a sliding plate disposed on a surface of the first plate and movable in a first direction. The first plate includes first arches each having an alignment hole in the first direction. The second plate includes second arches each having a latching hole in the first direction. The sliding plate includes pins corresponding to the latching holes. When the alignment hole accommodates the second arch and the sliding plate is located at a latching position, the pin is located in a corresponding latching hole to block separation of the first plate from the second plate in a second direction. When the sliding plate is located at a retracted position, the pin separates from the corresponding latching hole to allow separation of the first plate from the second plate in the second direction.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: November 26, 2019
    Assignee: SERCOMM CORPORATION
    Inventors: Li-Li Ho, Cheng-Chung Chang, Yi-Fei Yu
  • Publication number: 20190343012
    Abstract: A latching structure includes a first plate, a second plate and a sliding plate disposed on a surface of the first plate and movable in a first direction. The first plate includes first arches each having an alignment hole in the first direction. The second plate includes second arches each having a latching hole in the first direction. The sliding plate includes pins corresponding to the latching holes. When the alignment hole accommodates the second arch and the sliding plate is located at a latching position, the pin is located in a corresponding latching hole to block separation of the first plate from the second plate in a second direction. When the sliding plate is located at a retracted position, the pin separates from the corresponding latching hole to allow separation of the first plate from the second plate in the second direction.
    Type: Application
    Filed: April 15, 2019
    Publication date: November 7, 2019
    Inventors: Li-Li HO, Cheng-Chung CHANG, Yi-Fei YU
  • Patent number: 10325912
    Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: June 18, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ryan Chia-Jen Chen, Li-Wei Yin, Tzu-Wen Pan, Yi-Chun Chen, Cheng-Chung Chang, Shao-Hua Hsu, Yu-Hsien Lin, Ming-Ching Chang
  • Publication number: 20190165137
    Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin.
    Type: Application
    Filed: March 1, 2018
    Publication date: May 30, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ryan Chia-Jen CHEN, Ming-Ching CHANG, Yi-Chun CHEN, Yu-Hsien LIN, Li-Wei YIN, Tzu-Wen PAN, Cheng-Chung CHANG, Shao-Hua HSU
  • Publication number: 20190131298
    Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
    Type: Application
    Filed: November 30, 2018
    Publication date: May 2, 2019
    Inventors: Ryan Chia-Jen Chen, Cheng-Chung Chang, Shao-Hua Hsu, Yu-Hsien Lin, Ming-Ching Chang, Li-Wei Yin, Tzu-Wen Pan, Yi-Chun Chen
  • Publication number: 20190131297
    Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 2, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: RYAN CHIA-JEN CHEN, LI-WEI YIN, TZU-WEN PAN, YI-CHUN CHEN, CHENG-CHUNG CHANG, SHAO-HUA HSU, YU-HSIEN LIN, MING-CHING CHANG
  • Patent number: D911737
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: March 2, 2021
    Assignee: Designer Brass Corporation
    Inventor: Cheng Chung Chang
  • Patent number: D911738
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: March 2, 2021
    Assignee: DESIGNER BRASS CORPORATION
    Inventor: Cheng Chung Chang
  • Patent number: D912433
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: March 9, 2021
    Assignee: Designer Brass Corporation
    Inventor: Cheng Chung Chang