Patents by Inventor Cheng Jen Liu

Cheng Jen Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10396021
    Abstract: A fabrication method of a layer structure for mounting a semiconductor device is provided, which includes the steps of: providing a base material, wherein the base material has a conductive layer having a first surface having a plurality of first conductive elements and an opposite second surface having a plurality of second conductive elements, and a first encapsulant formed on the first surface of the conductive layer for encapsulating the first conductive elements; partially removing the conductive layer to form a circuit layer that electrically connects the first conductive elements and the second conductive elements; and forming a second encapsulant on a bottom surface of the first encapsulant for encapsulating the circuit layer and the second conductive elements, thus reducing the fabrication difficulty and increasing the product yield.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: August 27, 2019
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Fang-Lin Tsai, Yi-Feng Chang, Cheng-Jen Liu, Yi-Min Fu, Hung-Chi Chen
  • Publication number: 20180233442
    Abstract: A fabrication method of a layer structure for mounting a semiconductor device is provided, which includes the steps of: providing a base material, wherein the base material has a conductive layer having a first surface having a plurality of first conductive elements and an opposite second surface having a plurality of second conductive elements, and a first encapsulant formed on the first surface of the conductive layer for encapsulating the first conductive elements; partially removing the conductive layer to form a circuit layer that electrically connects the first conductive elements and the second conductive elements; and forming a second encapsulant on a bottom surface of the first encapsulant for encapsulating the circuit layer and the second conductive elements, thus reducing the fabrication difficulty and increasing the product yield.
    Type: Application
    Filed: April 11, 2018
    Publication date: August 16, 2018
    Inventors: Fang-Lin Tsai, Yi-Feng Chang, Cheng-Jen Liu, Yi-Min Fu, Hung-Chi Chen
  • Patent number: 9972564
    Abstract: A fabrication method of a layer structure for mounting a semiconductor device is provided, which includes the steps of: providing a base material, wherein the base material has a conductive layer having a first surface having a plurality of first conductive elements and an opposite second surface having a plurality of second conductive elements, and a first encapsulant formed on the first surface of the conductive layer for encapsulating the first conductive elements; partially removing the conductive layer to form a circuit layer that electrically connects the first conductive elements and the second conductive elements; and forming a second encapsulant on a bottom surface of the first encapsulant for encapsulating the circuit layer and the second conductive elements, thus reducing the fabrication difficulty and increasing the product yield.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: May 15, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Fang-Lin Tsai, Yi-Feng Chang, Cheng-Jen Liu, Yi-Min Fu, Hung-Chi Chen
  • Publication number: 20150206814
    Abstract: A fabrication method of a layer structure for mounting a semiconductor device is provided, which includes the steps of: providing a base material, wherein the base material has a conductive layer having a first surface having a plurality of first conductive elements and an opposite second surface having a plurality of second conductive elements, and a first encapsulant formed on the first surface of the conductive layer for encapsulating the first conductive elements; partially removing the conductive layer to form a circuit layer that electrically connects the first conductive elements and the second conductive elements; and forming a second encapsulant on a bottom surface of the first encapsulant for encapsulating the circuit layer and the second conductive elements, thus reducing the fabrication difficulty and increasing the product yield.
    Type: Application
    Filed: May 29, 2014
    Publication date: July 23, 2015
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Fang-Lin Tsai, Yi-Feng Chang, Cheng-Jen Liu, Yi-Min Fu, Hung-Chi Chen
  • Patent number: 7339199
    Abstract: The is to disclose a semiconductor package featuring inclusion of light emitter(s) providing light to indicate the states of the semiconductor package as a whole and/or the chip(s) therein. The light emitter is in an original state or flashing state or emitting state according to the states of the semiconductor package as a whole and/or the chip(s). The semiconductor package includes a carrier and a shield structure in addition to the light emitter. The chip and at least part of the carrier are covered by the shield structure. The light emitter may be partially or fully covered or sealed by the shield structure. The light emitter may also be partially or fully exposed. The shield structure is such that the light provided by the light emitter sealed therein can pass therethrough to reach the outside thereof, thereby the states of the semiconductor package as a whole and/or the chip(s) can be recognized from the outside of the semiconductor package.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: March 4, 2008
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Wei Lung Lu, Cheng Jen Liu, Chin-Huang Chang, Yi-Feng Chang
  • Publication number: 20060071220
    Abstract: The is to disclose a semiconductor package featuring inclusion of light emitter(s) providing light to indicate the states of the semiconductor package as a whole and/or the chip(s) therein. The light emitter is in an original state or flashing state or emitting state according to the states of the semiconductor package as a whole and/or the chip(s). The semiconductor package includes a carrier and a shield structure in addition to the light emitter. The chip and at least part of the carrier are covered by the shield structure. The light emitter may be partially or fully covered or sealed by the shield structure. The light emitter may also be partially or fully exposed. The shield structure is such that the light provided by the light emitter sealed therein can pass therethrough to reach the outside thereof, thereby the states of the semiconductor package as a whole and/or the chip(s) can be recognized from the outside of the semiconductor package.
    Type: Application
    Filed: September 28, 2005
    Publication date: April 6, 2006
    Inventors: Wei Lung Lu, Cheng Jen Liu, Chin-Huang Chang, Yi-Feng Chang