Abstract: An optical package structure is provided. The optical package structure includes a carrier, an optical emitter, an optical receiver, an optical barrier, and an insulating structure. The optical emitter and the optical receiver are over the carrier. The optical barrier is over the carrier and between the optical emitter and the optical receiver, wherein the optical barrier defines a cavity. The insulating structure is filled in the cavity, wherein an elevation of a top surface of the insulating structure is lower than an elevation of a top surface of the optical barrier with respect to a surface of the carrier.

Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic element stacking structure is disposed on a carrier structure to integrate multiple chips into a single package, so that the electronic package can meet with the requirements of miniaturization without increasing the layout area of the carrier structure.

Abstract: A method for forming an indium gallium nitride quantum well structure is disclosed. The method includes forming a gallium nitride microdisk on a substrate, with the gallium nitride microdisk having an inverted pyramid form and an end face; and forming multiple quantum well layers on the end face, with each quantum well layer including an indium gallium nitride quantum well and a barrier layer. The indium gallium nitride quantum well is grown at a growth temperature adjusted using a trend equation within a temperature range of 480° C. to 810° C.

Abstract: A display panel includes a substrate, multiple scan lines, multiple data lines, and multiple pixel structures. The scan lines and the data lines are disposed on the substrate. The pixel structure is disposed on the substrate and electrically connected to the scan lines and the data lines, and includes an active device, a pixel electrode, a capacitor electrode, an overcoat layer, a first common electrode, a second common electrode, a first passivation layer, and a second passivation layer. The active device is electrically connected one scan line, one data line, and the pixel electrode. The capacitor electrode extends from a drain and is electrically connected to the pixel electrode. The overcoat layer is disposed between the pixel electrode and the capacitor electrode. The first common electrode overlaps the capacitor electrode, and is located between the overcoat layer and the capacitor electrode.

Abstract: A titanium precursor is used to selectively form a titanium silicide (TiSix) layer in a semiconductor device. A plasma-based deposition operation is performed in which the titanium precursor is provided into an opening, and a reactant gas and a plasma are used to cause silicon to diffuse to a top surface of a transistor structure. The diffusion of silicon results in the formation of a silicon-rich surface of the transistor structure, which increases the selectivity of the titanium silicide formation relative to other materials of the semiconductor device. The titanium precursor reacts with the silicon-rich surface to form the titanium silicide layer. The selective titanium silicide layer formation results in the formation of a titanium silicon nitride (TiSixNy) on the sidewalls in the opening, which enables a conductive structure such as a metal source/drain contact to be formed in the opening without the addition of another barrier layer.

Abstract: A modified polyphenylene ether resin having a structure represented by [Formula 1] is provided.

Abstract: A boneless wiper structure (10) for a wiper arm (3) includes a wiper blade (1) and a connection base assembly (2). The wiper blade (1) is provided with two positioning holes. The connection base assembly (2) includes a fixing base (21) and a joint base (22). The fixing base (21) is assembled to the wiper blade (1). Two positioning feet (211) extend from a bottom of the fixing base (21) for engagement with the two positioning holes (11). A top of the fixing base (21) includes a containing groove (212) and a first engagement groove (213) and a second engagement groove (214) arranged on a front side and a rear side of the containing groove (212). The joint base (22) is engaged with the containing groove (212). A block (221) extends from one end of the joint base (22) to engage with the first engagement groove (213).

Abstract: An electronic package is provided. The electronic package includes an encapsulating layer encapsulating a plurality of conductive pillars and an interposer board that has through-silicon vias. An electronic component is disposed on the encapsulating layer and electrically connected to the conductive pillars and the through-silicon vias. The conductive pillars act as an electric transmission path of a portion of electric functions of the electronic component. Therefore, the number of the through-silicon vias is reduced, and the fabrication time and chemical agent cost are reduced. Also, the through silicon interposer of a large area can be replaced by a smaller one, and the yield is increased. Further, a method of fabricating an electronic package is provided.

Abstract: An electronic package and the manufacturing method thereof are provided, in which a first electronic element and a second electronic element are disposed on a carrier structure, and the first electronic element and the second electronic element are electrically connected to each other by a wire. Therefore, by replacing some layers of the circuit layer of the carrier structure with the wire, the carrier structure can satisfy the functional signal transmission of the first and second electronic elements without configuring too many circuit layers, so as to shorten the process steps and time of the carrier structure, thereby effectively reducing the manufacturing cost of the electronic package.

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface, an electrical contact disposed over a first region of the substrate, and an EMI shielding layer disposed over the substrate. The EMI shielding layer includes a non-uniform thickness and an elevation of the EMI shielding layer is higher than an elevation of the electrical contact with respect to the first surface of the substrate. A method for manufacturing a semiconductor device package is also disclosed.

Abstract: The present disclosure provides a semiconductor device package including a carrier, an electronic component, and a shielding layer. The carrier includes a predetermined non-shielding region. The electronic component is disposed over the predetermined non-shielding region. The shielding layer includes a first portion disposed over the predetermined non-shielding region.

Abstract: An electronic package is provided. The electronic package includes an encapsulating layer encapsulating a plurality of conductive pillars and an interposer board that has through-silicon vias. An electronic component is disposed on the encapsulating layer and electrically connected to the conductive pillars and the through-silicon vias. The conductive pillars act as an electric transmission path of a portion of electric functions of the electronic component. Therefore, the number of the through-silicon vias is reduced, and the fabrication time and chemical agent cost are reduced. Also, the through silicon interposer of a large area can be replaced by a smaller one, and the yield is increased. Further, a method of fabricating an electronic package is provided.

Abstract: The present application provides an electronic package having an optoelectronic component and a laser component disposed on a packaging unit, with the optoelectronic component and the laser component being separated from each other. Since the laser component and the optoelectronic component are separated from each other, the electronic package has a reduced fabrication difficulty and a high yield rate. A method for fabricating the electronic package and an electronic packaging module having the electronic package are also provided.

Abstract: An electronic package is provided, which is disposed with a second electronic component and a third electronic component on a first electronic component as a carrier structure, such that there is no need to match a layout size of the conventional package substrate. Therefore, the first electronic component can be designed as a System on a Chip (SoC) with a smaller size to improve the process yield.

Abstract: An electronic package is provided, which is disposed with a second electronic component and a third electronic component on a first electronic component as a carrier structure, such that there is no need to match a layout size of the conventional package substrate. Therefore, the first electronic component can be designed as a System on a Chip (SoC) with a smaller size to improve the process yield.

Abstract: A method for fabricating an electronic package is provided. A plurality of packaging structures are provided, each of which having a carrier and at least one electronic component disposed on the carrier. The plurality of packaging structures are disposed on a supporting plate. An encapsulation layer is formed on the supporting plate and encapsulates the plurality of packaging structures. Even if there are various types of electronic packages of different specifications in the market, the molds that the encapsulation layer uses can still be developed for a supporting plate of a certain specification. Therefore, the fabrication cost of the electronic package is reduced.

Abstract: The present disclosure provides an electronic packaging structure. A photonic die is disposed on an electronic package, and an optical guide die is not disposed on the electronic package. As the optical guide die malfunctions, only the optical guide die, rather than the whole electronic package and the photonic die, which may still function well, needs to be replaced. Therefore, the replacement cost is reduced, and the lifespan of the electronic packaging structure is increased. The present disclosure also provides a method for manufacturing the electronic packaging structure.

Abstract: An electronic package is provided, including: a first carrying structure having a first circuit layer; a package module disposed on the first carrying structure and electrically connected to the first circuit layer; a first electronic component disposed on the first carrying structure and electrically connected to the first circuit layer; and a second electronic component stacked on and electrically connected to the first electronic component. As the second electronic component is stacked with the first electronic component, a surface area of the first carrying structure that the first and second electronic components occupy is reduced, and the electronic package can have sufficient space to accommodate the package modules. A method for fabricating an electronic package is also provided.

Abstract: A method for fabricating an electronic package is provided. A plurality of packaging structures are provided, each of which having a carrier and at least one electronic component disposed on the carrier. The plurality of packaging structures are disposed on a supporting plate. An encapsulation layer is formed on the supporting plate and encapsulates the plurality of packaging structures. Even if there are various types of electronic packages of different specifications in the market, the molds that the encapsulation layer uses can still be developed for a supporting plate of a certain specification. Therefore, the fabrication cost of the electronic package is reduced.

Abstract: An electronic package is provided, including: a first carrying structure having a first circuit layer; a package module disposed on the first carrying structure and electrically connected to the first circuit layer; a first electronic component disposed on the first carrying structure and electrically connected to the first circuit layer; and a second electronic component stacked on and electrically connected to the first electronic component. As the second electronic component is stacked with the first electronic component, a surface area of the first carrying structure that the first and second electronic components occupy is reduced, and the electronic package can have sufficient space to accommodate the package modules. A method for fabricating an electronic package is also provided.