Patents by Inventor Cheng-Kai Chang

Cheng-Kai Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096998
    Abstract: The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shuen-Shin LIANG, Chij-chien CHI, Yi-Ying LIU, Chia-Hung CHU, Hsu-Kai CHANG, Cheng-Wei CHANG, Chein-Shun LIAO, Keng-chu LIN, KAi-Ting HUANG
  • Patent number: 11932207
    Abstract: A universal wiper base assembly structure includes a fastening base, a rear base, a combination base, and an outer cover. The fastening base includes a main body and a decorative cover. The main body has a coupling hole, an insertion slot, a protruding platform, a positioning protrusion, a first shaft hole, two limiting arc surfaces, and multiple engagement grooves. The decorative cover has a fastening slot. The rear base includes two contact blocks, a top abutting block, and two hooks. The combination base includes two side plates, a connection plate, an open groove and a second shaft hole. The outer cover includes a fastening block, an opening, and a third shaft hole. Accordingly, a variety of wiper driving arms may be positioned to the universal wiper base assembly structure, so as to improve the convenience in assembling and reduce an overall cost.
    Type: Grant
    Filed: March 21, 2023
    Date of Patent: March 19, 2024
    Assignee: DANYANG UPC AUTO PARTS CO., LTD.
    Inventors: Che-Wei Chang, Cheng-Kai Yang, Chuan-Chih Chang
  • Publication number: 20240072299
    Abstract: A method of making solid oxidesolid oxide electrolyte membrane comprises steps (S1)-(S5). Step (S1), mixing a high molecular polymer and a first solvent to form a first mixed slurry; and homogenizing the first mixed slurry, to obtain a reagent A. Step (S2), mixing an oxide powder, a dispersant and a second solvent to form a second mixed slurry, treating the second mixed slurry, to obtain a reagent B. Step (S3), adding a protective agent into the reagent B to form a third mixed slurry, and homogenizing the third mixed slurry to obtain a reagent C. Step (S4), mixing the reagent A and the reagent C to form a fourth mixed slurry, and treating the fourth mixed slurry a fifth mixed slurry; and homogenizating the fifth mixed slurry to form a solid electrolyte slurry. And step (S5), producing the solid oxidesolid oxide electrolyte membrane by a coating process.
    Type: Application
    Filed: April 12, 2023
    Publication date: February 29, 2024
    Inventors: HONG-ZHENG LAI, JING-KAI KAO, CHENG-TING LIN, TSENG-LUNG CHANG
  • Patent number: 11443994
    Abstract: The present application provides an electronic package having an optoelectronic component and a laser component disposed on a packaging unit, with the optoelectronic component and the laser component being separated from each other. Since the laser component and the optoelectronic component are separated from each other, the electronic package has a reduced fabrication difficulty and a high yield rate. A method for fabricating the electronic package and an electronic packaging module having the electronic package are also provided.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: September 13, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Jin-Wei You, Cheng-Kai Chang
  • Patent number: 11398429
    Abstract: An electronic package is provided, which is disposed with a second electronic component and a third electronic component on a first electronic component as a carrier structure, such that there is no need to match a layout size of the conventional package substrate. Therefore, the first electronic component can be designed as a System on a Chip (SoC) with a smaller size to improve the process yield.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: July 26, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Cheng Kai Chang, Chang-Fu Lin, Don-Son Jiang
  • Publication number: 20220093518
    Abstract: An electronic package is provided, which is disposed with a second electronic component and a third electronic component on a first electronic component as a carrier structure, such that there is no need to match a layout size of the conventional package substrate. Therefore, the first electronic component can be designed as a System on a Chip (SoC) with a smaller size to improve the process yield.
    Type: Application
    Filed: December 1, 2020
    Publication date: March 24, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Cheng Kai Chang, Chang-Fu Lin, Don-Son Jiang
  • Patent number: 11195812
    Abstract: A method for fabricating an electronic package is provided. A plurality of packaging structures are provided, each of which having a carrier and at least one electronic component disposed on the carrier. The plurality of packaging structures are disposed on a supporting plate. An encapsulation layer is formed on the supporting plate and encapsulates the plurality of packaging structures. Even if there are various types of electronic packages of different specifications in the market, the molds that the encapsulation layer uses can still be developed for a supporting plate of a certain specification. Therefore, the fabrication cost of the electronic package is reduced.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: December 7, 2021
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Hsin-Yi Liao, Cheng-Kai Chang, Bo-Hao Ma, Chun-Chi Ke
  • Patent number: 11143549
    Abstract: The present disclosure provides an electronic packaging structure. A photonic die is disposed on an electronic package, and an optical guide die is not disposed on the electronic package. As the optical guide die malfunctions, only the optical guide die, rather than the whole electronic package and the photonic die, which may still function well, needs to be replaced. Therefore, the replacement cost is reduced, and the lifespan of the electronic packaging structure is increased. The present disclosure also provides a method for manufacturing the electronic packaging structure.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: October 12, 2021
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Jin-Wei You, Cheng-Kai Chang
  • Patent number: 11114412
    Abstract: An electronic package is provided, including: a first carrying structure having a first circuit layer; a package module disposed on the first carrying structure and electrically connected to the first circuit layer; a first electronic component disposed on the first carrying structure and electrically connected to the first circuit layer; and a second electronic component stacked on and electrically connected to the first electronic component. As the second electronic component is stacked with the first electronic component, a surface area of the first carrying structure that the first and second electronic components occupy is reduced, and the electronic package can have sufficient space to accommodate the package modules. A method for fabricating an electronic package is also provided.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: September 7, 2021
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Hsin-Yi Liao, Cheng-Kai Chang
  • Publication number: 20210175196
    Abstract: A method for fabricating an electronic package is provided. A plurality of packaging structures are provided, each of which having a carrier and at least one electronic component disposed on the carrier. The plurality of packaging structures are disposed on a supporting plate. An encapsulation layer is formed on the supporting plate and encapsulates the plurality of packaging structures. Even if there are various types of electronic packages of different specifications in the market, the molds that the encapsulation layer uses can still be developed for a supporting plate of a certain specification. Therefore, the fabrication cost of the electronic package is reduced.
    Type: Application
    Filed: March 17, 2020
    Publication date: June 10, 2021
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Hsin-Yi Liao, Cheng-Kai Chang, Bo-Hao Ma, Chun-Chi Ke
  • Publication number: 20210104491
    Abstract: An electronic package is provided, including: a first carrying structure having a first circuit layer; a package module disposed on the first carrying structure and electrically connected to the first circuit layer; a first electronic component disposed on the first carrying structure and electrically connected to the first circuit layer; and a second electronic component stacked on and electrically connected to the first electronic component. As the second electronic component is stacked with the first electronic component, a surface area of the first carrying structure that the first and second electronic components occupy is reduced, and the electronic package can have sufficient space to accommodate the package modules. A method for fabricating an electronic package is also provided.
    Type: Application
    Filed: November 18, 2019
    Publication date: April 8, 2021
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Hsin-Yi Liao, Cheng-Kai Chang
  • Publication number: 20210057300
    Abstract: The present application provides an electronic package having an optoelectronic component and a laser component disposed on a packaging unit, with the optoelectronic component and the laser component being separated from each other. Since the laser component and the optoelectronic component are separated from each other, the electronic package has a reduced fabrication difficulty and a high yield rate. A method for fabricating the electronic package and an electronic packaging module having the electronic package are also provided.
    Type: Application
    Filed: April 27, 2020
    Publication date: February 25, 2021
    Applicant: SILICONWAR E PR ECISION INDUSTRIES CO., LT D.
    Inventors: Jin-Wei You, Cheng-Kai Chang
  • Publication number: 20210018360
    Abstract: The present disclosure provides an electronic packaging structure. A photonic die is disposed on an electronic package, and an optical guide die is not disposed on the electronic package. As the optical guide die malfunctions, only the optical guide die, rather than the whole electronic package and the photonic die, which may still function well, needs to be replaced. Therefore, the replacement cost is reduced, and the lifespan of the electronic packaging structure is increased. The present disclosure also provides a method for manufacturing the electronic packaging structure.
    Type: Application
    Filed: September 27, 2019
    Publication date: January 21, 2021
    Inventors: Jin-Wei You, Cheng-Kai Chang
  • Publication number: 20200365489
    Abstract: An electronic package is provided. The electronic package includes an encapsulating layer encapsulating a plurality of conductive pillars and an interposer board that has through-silicon vias. An electronic component is disposed on the encapsulating layer and electrically connected to the conductive pillars and the through-silicon vias. The conductive pillars act as an electric transmission path of a portion of electric functions of the electronic component. Therefore, the number of the through-silicon vias is reduced, and the fabrication time and chemical agent cost are reduced. Also, the through silicon interposer of a large area can be replaced by a smaller one, and the yield is increased. Further, a method of fabricating an electronic package is provided.
    Type: Application
    Filed: September 12, 2019
    Publication date: November 19, 2020
    Inventors: Pin-Jing Su, Cheng-Kai Chang
  • Patent number: 10431535
    Abstract: An electronic package and a method for fabricating the same are provided. The method includes forming an antenna structure in contact with one side of a circuit structure of a packaging substrate, and disposing an electronic component on the other side of the circuit structure. As such, the antenna structure is integrated with the packaging substrate, thereby reducing the thickness of the electronic package and improving the efficiency of the antenna structure.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: October 1, 2019
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Jui-Feng Chen, Chia-Cheng Hsu, Wen-Jung Tsai, Chia-Cheng Chen, Cheng Kai Chang
  • Publication number: 20180316083
    Abstract: An electronic package and a method for fabricating the same are provided. The method includes forming an antenna structure in contact with one side of a circuit structure of a packaging substrate, and disposing an electronic component on the other side of the circuit structure. As such, the antenna structure is integrated with the packaging substrate, thereby reducing the thickness of the electronic package and improving the efficiency of the antenna structure.
    Type: Application
    Filed: August 18, 2017
    Publication date: November 1, 2018
    Inventors: Jui-Feng Chen, Chia-Cheng Hsu, Wen-Jung Tsai, Chia-Cheng Chen, Cheng Kai Chang
  • Publication number: 20180096967
    Abstract: An electronic package structure is provided, which includes: a plurality of first and second electronic components disposed on opposite sides of a carrier; a blocking member formed between adjacent two of the first electronic components; an encapsulant encapsulating the first and second electronic components and the blocking member; and a shielding element formed on the encapsulant to improve the electromagnetic shielding effect. The present disclosure further provides a method for fabricating the electronic package structure.
    Type: Application
    Filed: February 17, 2017
    Publication date: April 5, 2018
    Inventors: Wen-Jung Tsai, Cheng-Kai Chang, Yen-Hung Lin, Hsin-Lung Chung
  • Patent number: 6041322
    Abstract: A digital artificial neural network (ANN) reduces memory requirements by storing sample transfer function representing output values for multiple nodes. Each nodes receives an input value representing the information to be processed by the network. Additionally, the node determines threshold values indicative of boundaries for application of the sample transfer function for the node. From the input value received, the node generates an intermediate value. Based on the threshold values and the intermediate value, the node determines an output value in accordance with the sample transfer function.
    Type: Grant
    Filed: April 18, 1997
    Date of Patent: March 21, 2000
    Assignee: Industrial Technology Research Institute
    Inventors: Wan-Yu Meng, Cheng-Kai Chang, Hwai-Tsu Chang, Fang-Ru Hsu, Ming-Rong Lee
  • Patent number: D1017504
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: March 12, 2024
    Assignee: DANYANG UPC AUTO PARTS CO., LTD.
    Inventors: Che-Wei Chang, Cheng-Kai Yang