Abstract: A method includes depositing an inter-metal dielectric (IMD) layer over a conductive line. A via opening is formed in the IMD layer and directly over the conductive line. A width of the conductive line is greater than a width of the via opening. An overlay measurement is performed. The overlay measurement includes obtaining a backscattered electron image of the via opening and the conductive line and determining an overlay between the via opening and the conductive line according to the backscattered electron image.

Abstract: Semiconductor devices, methods of manufacturing the semiconductor device and tools are disclosed herein. Some methods include providing an electrostatic chuck and placing an edge ring adjacent to the electrostatic chuck. The electrostatic chuck includes a first electrode to generate a sheath at a first distance over the electrostatic chuck. The edge ring includes a coil and a second electrode to generate an electric field control to maintain a portion of the sheath over the edge ring in a coplanar orientation with the portion of the sheath over the electrostatic chuck.

Abstract: An IC manufacturing method includes forming first mandrels and second mandrels over a substrate; and forming first spacers on sidewalls of the first mandrels and second spacers on sidewalls of the second mandrels. Each of the first and second spacers has a loop structure with two curvy portions connected by two lines. The method further includes removing the first and second mandrels; and removing the curvy portions from each of the first spacers without removing the curvy portions from the second spacers. The second spacers are used for monitoring variations of the IC fabrication processes.

Abstract: An IC manufacturing method includes forming first mandrels and second mandrels over a substrate; and forming first spacers on sidewalls of the first mandrels and second spacers on sidewalls of the second mandrels. Each of the first and second spacers has a loop structure with two curvy portions connected by two lines. The method further includes removing the first and second mandrels; and removing the curvy portions from each of the first spacers without removing the curvy portions from the second spacers. The second spacers are used for monitoring variations of the IC fabrication processes.

Abstract: An IC manufacturing method includes forming first mandrels and second mandrels over a substrate; and forming first spacers on sidewalls of the first mandrels and second spacers on sidewalls of the second mandrels. Each of the first and second spacers has a loop structure with two curvy portions connected by two lines. The method further includes removing the first and second mandrels; and removing the curvy portions from each of the first spacers without removing the curvy portions from the second spacers. The second spacers are used for monitoring variations of the IC fabrication processes.

Abstract: An IC manufacturing method includes forming first mandrels and second mandrels over a substrate; and forming first spacers on sidewalls of the first mandrels and second spacers on sidewalls of the second mandrels. Each of the first and second spacers has a loop structure with two curvy portions connected by two lines. The method further includes removing the first and second mandrels; and removing the curvy portions from each of the first spacers without removing the curvy portions from the second spacers. The second spacers are used for monitoring variations of the IC fabrication processes.