Abstract: A semiconductor package includes an integrated passive device (IPD) including one or more passive devices over a first substrate; and metallization layers over and electrically coupled to the one or more passive devices, where a topmost metallization layer of the metallization layers includes a first plurality of conductive patterns; and a second plurality of conductive patterns interleaved with the first plurality of conductive patterns. The IPD also includes a first under bump metallization (UBM) structure over the topmost metallization layer, where the first UBM structure includes a first plurality of conductive strips, each of the first plurality of conductive strips electrically coupled to a respective one of the first plurality of conductive patterns; and a second plurality of conductive strips interleaved with the first plurality of conductive strips, each of the second plurality of conductive strips electrically coupled to a respective one of the second plurality of conductive patterns.

Abstract: A pixel package includes an electrode structure, a plurality of light-emitting units arranged on the electrode structure, and a light transmitting layer. The electrode structure has an upper layer with a first upper sheet, a lower layer with a first lower sheet, and a supporting layer arranged between the upper layer and the lower layer. The electrode structure and the plurality of light-emitting units are fully embedded in the light transmitting layer. In a top view of the pixel package, the first upper sheet is overlapped with and larger than the first lower sheet.

Abstract: An amplifier circuit having low parasitic pole effect includes a preamplifier, an output transistor and a buffer circuit. The buffer circuit generates a driving signal to control the output transistor according to a preamplification signal generated by the preamplifier. The buffer circuit includes: a buffer input transistor generating the driving signal, wherein an input impedance at its control end is less than that of the output transistor; a low output impedance circuit having an output impedance which is less than an inverting output impedance of the buffer input transistor; an amplification transistor generating an amplification signal at its inverting output; and an amplification stage circuit amplifying the amplification signal by an amplification ratio, so that an equivalent output impedance at a non-inverting output of the buffer input transistor is less than or equal to a product of the reciprocal of an intrinsic output impedance thereof and an amplification ratio.

Abstract: An image sensor module comprises an image sensor having a light sensing area, a cover glass for covering the light sensing area, a dam between the image sensor and the cover glass, which surrounds the light sensing area, and has an outer wall and an inner wall, where a cross-section of the inner wall parallel to the surface of the light sensing area of the image sensor forms a sawtooth pattern and/or, where a cross-section of the inner wall orthogonal to the surface of the light sensing area of the image sensor forms an inclined surface.

Abstract: A chip comprises a semiconductor substrate having a first side and a second side opposite to the first side, a plurality of conductive metal patterns formed on the first side of the semiconductor substrate, a plurality of solder balls formed on the first side of the semiconductor substrate, and at least one code pattern formed using laser marking on the first side of the semiconductor substrate in a space free from the plurality of conductive metal patterns and the plurality of solder balls, wherein the at least one code pattern is visible from a backside of the chip, the at least one code pattern represents a binary number having four bits; and the binary number represents a decimal number to represent a tracing number of the chip.

Abstract: An image sensor module comprises an image sensor having a light sensing area, a cover glass for covering the light sensing area, a dam between the image sensor and the cover glass, which surrounds the light sensing area, and has an outer wall and an inner wall, where a cross-section of the inner wall parallel to the surface of the light sensing area of the image sensor forms a sawtooth pattern and/or, where a cross-section of the inner wall orthogonal to the surface of the light sensing area of the image sensor forms an inclined surface.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate and a first deep trench isolation (DTI) structure filled with a dielectric material formed on the semiconductor substrate. The first DTI structure is disposed in the first seal ring region and is extended into the semiconductor substrate. The semiconductor substrate has a pixel array region and a first seal ring region. The first seal ring region is proximate to an edge of the semiconductor substrate and surrounds the pixel array region. The first DTI structure is formed in the first seal ring region and surrounds the pixel array region.

Abstract: Example of backlit switches are described. In an example, a backlit switch includes a printed circuit board (PCB) and a dome-type button coupled to the PCB. The dome-type button has a light transmitting portion. A light source is mounted on a first side of the PCB, and a tact switch is mounted on a second side of the PCB that is opposite to the first side. Further, a projection is provided to trigger the tact switch, in response to pressing of the dome-type button.

Abstract: An image sensor module comprises an image sensor having a light sensing area, a cover glass for covering the light sensing area, a dam between the image sensor and the cover glass, which surrounds the light sensing area, and has an outer wall and an inner wall, where a cross-section of the inner wall parallel to the surface of the light sensing area of the image sensor forms a sawtooth pattern and/or, where a cross-section of the inner wall orthogonal to the surface of the light sensing area of the image sensor forms an inclined surface.

Abstract: Example of backlit switches are described. In an example, a backlit switch includes a printed circuit board (PCB) and a dome-type button coupled to the PCB. The dome-type button has a light transmitting portion. A light source is mounted on a first side of the PCB, and a tact switch is mounted on a second side of the PCB that is opposite to the first side. Further, a projection is provided to trigger the tact switch, in response to pressing of the dome-type button.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate and a first deep trench isolation (DTI) structure filled with a dielectric material formed on the semiconductor substrate. The first DTI structure is disposed in the first seal ring region and is extended into the semiconductor substrate. The semiconductor substrate has a pixel array region and a first seal ring region. The first seal ring region is proximate to an edge of the semiconductor substrate and surrounds the pixel array region. The first DTI structure is formed in the first seal ring region and surrounds the pixel array region.

Abstract: An image sensor module comprises: a substrate having a first side and second side, the first side being an opposite of the second side, an image sensor attached to the first side of the substrate, bonding wires to bond the image sensor to pads on the first side of the substrate, a protective structure disposed on the first side of the substrate surrounding the image sensor, the bonding wires, and the pads, the protective structure having a dam and a lid, a cover glass disposed on the protective structure, and a set of solder balls attached to the second side of the substrate.

Abstract: A chip comprises a semiconductor substrate having a first side and a second side opposite to the first side, a plurality of conductive metal patterns formed on the first side of the semiconductor substrate, a plurality of solder balls formed on the first side of the semiconductor substrate, and at least one code pattern formed using laser marking on the first side of the semiconductor substrate in a space free from the plurality of conductive metal patterns and the plurality of solder balls, wherein the at least one code pattern is visible from a backside of the chip, the at least one code pattern represents a binary number having four bits; and the binary number represents a decimal number to represent a tracing number of the chip.

Abstract: A method of image sensor package fabrication includes forming a cavity in a ceramic substrate, and placing an image sensor in the cavity in the ceramic substrate. An image sensor processor is also placed in the cavity in the ceramic substrate, and the image sensor and the image sensor processor are wire bonded to electrical contacts. Glue is deposited on the ceramic substrate, and a glass layer is placed on the glue to adhere the glass layer to the ceramic substrate. The image sensor processor and the image sensor are disposed in the cavity between the glass layer and the ceramic substrate.

Abstract: An image sensor module comprises: a substrate having a first side and second side, the first side being an opposite of the second side, an image sensor attached to the first side of the substrate, bonding wires to bond the image sensor to pads on the first side of the substrate, a protective structure disposed on the first side of the substrate surrounding the image sensor, the bonding wires, and the pads, the protective structure having a dam and a lid, a cover glass disposed on the protective structure, and a set of solder balls attached to the second side of the substrate.

Abstract: A panel carrier includes a substrate, a die-attach region, a short sidewall, and a conductor. The die-attach region is on a top substrate surface of the substrate for supporting the LCoS panel. The short sidewall is on a first side of the die-attach region and has a top sidewall surface at a first height above the top substrate surface exceeding 0.4 millimeters and an aperture spanning the top sidewall surface and the top substrate surface. The conductor at least partially fills the aperture for electrically connecting to the conductive layer. A method for mechanically and electrically connecting a LCoS panel to a panel carrier having a short sidewall includes electrically connecting a transparent conductive layer of the LCoS panel to a conductive material, within the short sidewall, with a conductive adhesive having a thickness, between the transparent conductive layer and the short sidewall, less than two-hundred micrometers.

Abstract: A trenched device wafer includes a device substrate layer having a top surface; a plurality of devices in the device substrate layer, and a trench in the top surface. The trench extends into the device substrate layer, and is located between a pair of adjacent devices of the plurality of devices. A method for forming a device die from a device wafer includes forming a trench in a top surface of the device wafer between two adjacent devices of the device wafer. The trench has a bottom surface located (a) at a first depth beneath the top surface and (b) at a first height above a wafer bottom surface. The method also includes, after forming the trench, decreasing a thickness of the device wafer, between the two adjacent devices, to a thickness less than the first height.

Abstract: A cleaning device may include a solution tank configured to store cleaning solution. The device delivers the cleaning solution from a pump discharge of the cleaning device to a flow meter. The device initiates a priming mode by opening a first valve associated with a bypass line of the device, closing a second valve associated with a cleaning head of the cleaning device, and delivering the cleaning solution from a discharge of the flow meter to the inlet of the solution tank through the bypass line. When the device is primed, it initiates cleaning by closing the first valve associated with the bypass line, opening the second valve associated with the cleaning head, and delivering the cleaning solution to the cleaning head.

Abstract: A method of image sensor package fabrication includes forming a cavity in a ceramic substrate, and placing an image sensor in the cavity in the ceramic substrate. An image sensor processor is also placed in the cavity in the ceramic substrate, and the image sensor and the image sensor processor are wire bonded to electrical contacts. Glue is deposited on the ceramic substrate, and a glass layer is placed on the glue to adhere the glass layer to the ceramic substrate. The image sensor processor and the image sensor are disposed in the cavity between the glass layer and the ceramic substrate.

Abstract: A cleaning device may include a solution tank configured to store cleaning solution. The device delivers the cleaning solution from a pump discharge of the cleaning device to a flow meter. The device initiates a priming mode by opening a first valve associated with a bypass line of the device, closing a second valve associated with a cleaning head of the cleaning device, and delivering the cleaning solution from a discharge of the flow meter to the inlet of the solution tank through the bypass line. When the device is primed, it initiates cleaning by closing the first valve associated with the bypass line, opening the second valve associated with the cleaning head, and delivering the cleaning solution to the cleaning head.