Patents by Inventor Chi-Woo Kim

Chi-Woo Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6630688
    Abstract: First, a conductive material of aluminum-based material is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode. A gate insulating layer is formed by depositing nitride silicon in the range of more than 300° C. for 5 minutes, and a semiconductor layer an ohmic contact layer are sequentially formed. Next, a conductor layer of a metal such as Cr is deposited and patterned to form a data wire include a data line intersecting the gate line, a source electrode, a drain electrode and a data pad. Then, a passivation layer is deposited and patterned to form contact holes exposing the drain electrode, the gate pad and the data pad. Next, indium zinc oxide is deposited and patterned to form a pixel electrode, a redundant gate pad and a redundant data pad respectively connected to the drain electrode, the gate pad and the data pad.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: October 7, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyang-Shik Kong, Myung-Koo Hur, Chi-Woo Kim
  • Publication number: 20030160252
    Abstract: The Mo or MoW composition layer has a low resistivity of less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along with an Al layer or a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can be used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using polymer layer, an etch gas system using CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas of SF6+HCl (+He) or SF6+Cl2 (+He) can form the edge profile of contact holes to be smoothed.
    Type: Application
    Filed: March 18, 2003
    Publication date: August 28, 2003
    Inventors: Chang-Oh Jeong, Yang-Sun Kim, Myung-Koo Hur, Young-Jae Tak, Mun-Pyo Hong, Chi-Woo Kim, Jang-Soo Kim, Chua-Gi You
  • Patent number: 6582982
    Abstract: The Mo or MoW composition layer has a low resistivity of less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along with an Al layer or a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can be used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using polymer layer, an etch gas system using CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas of SF6+HCl (+He) or SF6+Cl2 (+He) can form the edge profile of contact holes to be smoothed.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: June 24, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Oh Jeong, Yang-Sun Kim, Myung-Koo Hur, Young-Jae Tak, Mun-Pyo Hong, Chi-Woo Kim, Jang-Soo Kim, Chun-Gi You
  • Patent number: 6570182
    Abstract: The Mo or MoW composition layer has a low resistivity of less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along with an Al layer or a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can be used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using polymer layer, an etch gas system using CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas of SF6+HCl (+He) or SF6+Cl2 (+He) can form the edge profile of contact holes to be smoothed.
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: May 27, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Oh Jeong, Yang-Sun Kim, Myung-Koo Hur, Young-Jae Tak, Mun-Pyo Hong, Chi-Woo Kim, Jang-Soo Kim, Chun-Gi You
  • Publication number: 20030016328
    Abstract: In a liquid crystal display, a plurality of gate lines and data lines are provided on a first substrate including a display area as a screen, and a peripheral area external to the display area wherein a plurality of pixel electrodes are electrically connected to the gate lines and to the data lines, and some of the pixel electrodes extend to be located in the peripheral area; and optionally, a black matrix is formed on a second substrate disposed opposite to the first substrate for screening the extended portions of the pixel electrodes located in the peripheral area, a rubbing direction of aligning films is formed on the first and the second substrates towards the extended portions of the pixel electrodes located in the peripheral area so that impurity ions on the surface of the aligning film travel along the rubbing direction to stop at the extended portions of the pixel electrodes, and an image defect area caused by the impurity ions is screened with the black matrix.
    Type: Application
    Filed: June 20, 2002
    Publication date: January 23, 2003
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Woo-Suk Chung, Chi-Woo Kim, Bo-Young An, Hyong-Gon Lee, Sung-Hee Cho
  • Publication number: 20020175395
    Abstract: The Mo or MoW composition layer has a low resistivity of less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along with an Al layer or a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can be used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using polymer layer, an etch gas system using CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas of SF6+HCl (+He) or SF6+Cl2 (+He) can form the edge profile of contact holes to be smoothed.
    Type: Application
    Filed: July 9, 2002
    Publication date: November 28, 2002
    Inventors: Chang-Oh Jeong, Yang-Sun Kim, Myung-Koo Hur, Young-Jae Tak, Mun-Pyo Hong, Chi-Woo Kim, Jang-Soo Kim, Chun-Gi You
  • Patent number: 6486494
    Abstract: The Mo or MoW composition layer has a low resistivity of less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along with An Al layer or a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can be used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using polymer layer, an etch gas system using CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas of SF6+HCl (+He) or SF6+Cl2 (+He) can form the edge profile of contact holes to be smoothed.
    Type: Grant
    Filed: January 4, 2002
    Date of Patent: November 26, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Oh Jeong, Yang-Sun Kim, Myung-Koo Hur, Young-Jae Tak, Mun-Pyo Hong, Chi-Woo Kim, Jang-Soo Kim, Chun-Gi You
  • Patent number: 6445004
    Abstract: The Mo or MoW composition layer has a low resistivity of less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along with an Al layer or a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can be used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using polymer layer, an etch gas system using CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas of SF6+HCl(+He) or SF6+Cl2(+He) can form the edge profile of contact holes to be smoothed.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: September 3, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Oh Jeong, Yang-Sun Kim, Myung-Koo Hur, Young-Jae Tak, Mun-Pyo Hong, Chi-Woo Kim, Jang-Soo Kim, Chun-Gi You
  • Publication number: 20020060323
    Abstract: The Mo or MoW composition layer has a low resistivity of less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along with an Al layer or a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can be used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using polymer layer, an etch gas system using CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas of SF6+HCl (+He) or SF6+Cl2 (+He) can form the edge profile of contact holes to be smoothed.
    Type: Application
    Filed: January 4, 2002
    Publication date: May 23, 2002
    Inventors: Chang-Oh Jeong, Yang-Sun Kim, Myung-Koo Hur, Young-Jae Tak, Mun-Pyo Hong, Chi-Woo Kim, Jang-Soo Kim, Chun-Gi You
  • Patent number: 6380098
    Abstract: The Mo or MoW composition layer has the low resistivity less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy etchant or a Cr etchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor device along with an Al layer and a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using a polymer layer, an etch gas system CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas SF6+HCl(+He) or SF6+Cl2(+He) can form the edge profile of contact holes to be smoothed.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: April 30, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Oh Jeong, Yang-Sun Kim, Myung-Koo Hur, Young-Jae Tak, Mun-Pyo Hong, Chi-Woo Kim, Jang-Soo Kim, Chun-Gi You
  • Publication number: 20020013021
    Abstract: The Mo or MoW composition layer has a low resistivity of less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along with an Al layer or a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can be used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using polymer layer, an etch gas system using CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas of SF6+HCl (+He) or SF6+Cl2 (+He) can form the edge profile of contact holes to be smoothed.
    Type: Application
    Filed: September 26, 2001
    Publication date: January 31, 2002
    Inventors: Chang-Oh Jeong, Yang-Sun Kim, Myung-Koo Hur, Young-Jae Tak, Mun-Pyo Hong, Chi-Woo Kim, Jang-Soo Kim, Chun-Gi You
  • Patent number: 6337520
    Abstract: The Mo or MoW composition layer has the low resistivity less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy etchant or a Cr etchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor device along with an Al layer and a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using a polymer layer, an etch gas system CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas SF6+HCl(+He) or SF6+Cl2(+He) can form the edge profile of contact holes to be smoothed.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: January 8, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Oh Jeong, Yang-Sun Kim, Myung-Koo Hur, Young-Jae Tak, Mun-Pyo Hong, Chi-Woo Kim, Chun-Gi You
  • Publication number: 20010032981
    Abstract: First, a conductive material of aluminum-based material is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode. A gate insulating layer is formed by depositing nitride silicon in the range of more than 300° C. for 5 minutes, and a semiconductor layer an ohmic contact layer are sequentially formed. Next, a conductor layer of a metal such as Cr is deposited and patterned to form a data wire include a data line intersecting the gate line, a source electrode, a drain electrode and a data pad. Then, a passivation layer is deposited and patterned to form contact holes exposing the drain electrode, the gate pad and the data pad. Next, indium zinc oxide is deposited and patterned to form a pixel electrode, a redundant gate pad and a redundant data pad respectively connected to the drain electrode, the gate pad and the data pad.
    Type: Application
    Filed: April 19, 2001
    Publication date: October 25, 2001
    Inventors: Hyang-Shik Kong, Myung-Koo Hur, Chi-Woo Kim
  • Patent number: 6081308
    Abstract: Since Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single Mo or MoW layer can be used as a wiring by itself of large scale and high resolution liquid crystal. The Mo or MoW layer has the low resistivity of less than 15 .mu..OMEGA.cm and is etched to have a smooth taper angle using an Al etchant with Al or Al alloy. Therefore, it is possible to reduce the number of photolithography processes and to prevent a battery effect and generation of a hillock.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: June 27, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Oh Jeong, Yang-Sun Kim, Myung-Koo Hur, Young-Jae Tak, Mun-Pyo Hong, Chi-Woo Kim, Jueng-Gil Lee
  • Patent number: 5723371
    Abstract: A method for fabricating a thin film transistor having a taper-etched semiconductor film includes the steps of forming a gate electrode on a bare substrate; forming an insulating film on the gate electrode;p forming a semiconductor film by forming an amorphous silicon film layer on the insulating film and forming an N.sup.+ amorphous silicon film on the amorphous silicon film layer, descumming photoresist residue from the semiconductor film by using a specified gas and taper etching a part of the semiconductor film, which is uncoated with the photoresist, by using HCl and SF.sub.6, to form a gentle slope in the etching profile resulting from overetching.
    Type: Grant
    Filed: August 23, 1995
    Date of Patent: March 3, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Kap Seo, Chi-Woo Kim, Ho-Chul Kang
  • Patent number: 5643817
    Abstract: A liquid crystal display having a gate insulating film of whose dielectric constant is a high and exhibits excellent leakage characteristics, includes a plurality of gate wirings formed on the transparent substrate, a plurality of signal lines arrayed to intersect the plurality of gate wirings, a plurality of switching devices located at the point of intersection between the respective gate wirings and signal lines. The switching device comprises a gate electrode constituted by aluminum or an aluminum alloy and a gate insulating film inserted between the channels of switching devices and the gate electrode. The gate insulating film has a first anodic oxide film constituted by aluminum or an aluminum alloy and a second anodic oxide film constituted by tantalum or a tantalum alloy. In the manufacturing method thereof, metals, aluminum or tantalum, are simultaneously anodically oxidized so as to suppress a hillock.
    Type: Grant
    Filed: May 12, 1994
    Date of Patent: July 1, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-seob Kim, Chi-woo Kim, Young-chan Kweon, Won-kie Chang
  • Patent number: 4839511
    Abstract: A photoconductive member is provided with increased sensitivity to radiation incident thereupon and with increased photo-yield in response thereto by means of a multi-layered, sandwich-type construction based upon the provision of successive layers of sensitizing material over corresponding successive layers of conducting material. The photoconductive member comprises at least two composite layers formed one above the other on an insulating substrate, each composite layer comprising a first layer of material capable of conducting charge and a second layer of material comprising polar molecules disposed upon the charge-conducting material layer in such a manner that successive layers of polar molecules are adsorbed and retained in an oriented fashion on successive layers of the charge-conducting material.
    Type: Grant
    Filed: January 29, 1988
    Date of Patent: June 13, 1989
    Assignee: Board of Regents, The U. of Texas System
    Inventors: James C. Thompson, Uzi J. Even, Chi-Woo Kim