Patents by Inventor Chia-Chang Hsu
Chia-Chang Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12290004Abstract: A semiconductor device includes an array region defined on a substrate, a ring of dummy pattern surrounding the array region, and a gap between the array region and the ring of dummy pattern. Preferably, the ring of dummy pattern further includes a ring of magnetic tunneling junction (MTJ) pattern surrounding the array region and a ring of metal interconnect pattern overlapping the ring of MTJ and surrounding the array region.Type: GrantFiled: May 26, 2024Date of Patent: April 29, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chih-Wei Kuo, Chia-Chang Hsu
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Publication number: 20250123552Abstract: An extreme ultraviolet (EUV) mask and method of forming an EUV mask are provided. The method includes forming a mask layer on a semiconductor wafer, generating extreme ultraviolet (EUV) light by a lithography exposure system, forming patterned EUV light by patterning the EUV light by a mask including an absorber having extinction coefficient at an EUV wavelength that exceeds extinction coefficients of TaBN and TaN at the EUV wavelength, and exposing the mask layer by the patterned EUV light.Type: ApplicationFiled: April 5, 2024Publication date: April 17, 2025Inventors: Pei-Cheng HSU, Hsuan-I WANG, Ping-Hsun LIN, Ching-Fang YU, Chia-Jen CHEN, Hsin-Chang LEE
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Patent number: 12274719Abstract: Disclosed herein is a composition including Lactobacillus plantarum TWK10 deposited at the China General Microbiological Culture Collection Center (CGMCC) under accession number CGMCC 13008 for use in improving walking capacity of an elderly subject.Type: GrantFiled: September 14, 2021Date of Patent: April 15, 2025Assignee: SYNBIO TECH INC.Inventors: Chia-Chia Lee, Han-Yin Hsu, Chi-Chang Huang, Yi-Ju Hsu, Mon-Chien Lee
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Patent number: 12278277Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.Type: GrantFiled: February 16, 2024Date of Patent: April 15, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Liang Pan, Yung Tzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung, Po-Chuan Wang, Guan-Xuan Chen, Huan-Just Lin
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Publication number: 20250110283Abstract: A coupling system includes a chip configured to receive an optical signal, wherein an angle between a propagation direction of the optical signal and a top surface of the chip ranges from about 92-degrees to about 88-degrees. The chip includes a grating configured to receive the optical signal; and a waveguide, wherein the grating is configured to receive the optical signal and redirect the optical signal along the waveguide, and the grating is on a light incident side of the waveguide.Type: ApplicationFiled: December 13, 2024Publication date: April 3, 2025Inventors: Sui-Ying HSU, Yuehying LEE, Chien-Ying WU, Chen-Hao HUANG, Chien-Chang LEE, Chia-Ping LAI
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Publication number: 20250110307Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: ApplicationFiled: December 12, 2024Publication date: April 3, 2025Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
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Patent number: 12263297Abstract: A nebulizer includes a main body (1), a spraying head (2) and an engagement structure (4). The main body (1) includes a body (11). The spraying head (2) includes a spraying seat (21) assembled to the body (11). The engagement structure (4) includes a notch (41) formed on one of the body (11) and the spraying seat (21), a T-shaped trench (42) formed on an inner wall of the notch (41), an engaging trench (43) formed on another one of the body (11) and the spraying seat (21), and a movable member (44) received in the notch (41). The movable member (44) is extended with a handle (441) exposed from the notch (41), a T-shaped block (442) slidably received in the T-shaped trench (42) and an engaging block (443) embedded in or separated from the engaging trench (43).Type: GrantFiled: May 26, 2022Date of Patent: April 1, 2025Assignee: GALEMED CORPORATIONInventors: Po-Chang Chen, Hsin-Chen Wang, Chia-Chin Yang, Hao-Hsiang Chen, Chun-Wei Hsu
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Patent number: 12265322Abstract: An extreme ultraviolet mask including a substrate, a reflective multilayer stack on the substrate and a capping layer on the reflective multilayer stack is provided. The reflective multilayer stack is treated prior to formation of the capping layer on the reflective multilayer stack. The capping layer is formed by an ion-assisted ion beam deposition or an ion-assisted sputtering process.Type: GrantFiled: August 4, 2023Date of Patent: April 1, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ping-Hsun Lin, Pei-Cheng Hsu, Ching-Fang Yu, Ta-Cheng Lien, Chia-Jen Chen, Hsin-Chang Lee
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Publication number: 20250091265Abstract: A method for manufacturing a keycap includes a plastic injection step that involves forming a keycap preform; a coating layer forming step that involves spraying a surface paint material onto a processing surface of the keycap preform to form a surface paint coating layer, which has an engraved marking portion; a protection layer forming step that involves spraying a protection material onto the surface paint coating layer to form a first protection layer; a laser engraving step that involves removing the engraved marking portion; and a screen printing step that involves forming a second protection layer on the processing surface.Type: ApplicationFiled: December 21, 2023Publication date: March 20, 2025Applicant: SUNREX TECHNOLOGY CORP.Inventors: Chia-Chang HSU, Chia-Hung TSAI
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Patent number: 12256202Abstract: The invention discloses a stereo enhancement system and a stereo enhancement method. The stereo enhancement system includes a beamforming unit and a signal processing unit. The beamforming unit is used for receiving a plurality of input sound signals and generating a plurality of beamforming sound signals corresponding to a plurality of direction intervals respectively. The signal processing unit is coupled to the beamforming unit and used for receiving the plurality of beamforming sound signals corresponding to the plurality of direction intervals respectively and generating a first synthesized output sound signal and a second synthesized sound signal accordingly.Type: GrantFiled: December 7, 2022Date of Patent: March 18, 2025Assignee: INTELLIGO TECHNOLOGY INC.Inventors: Chia-Ping Chen, Chih-Sheng Chen, Hua-Jun Hong, Chien-Hua Hsu, Jen-Feng Li, Wei-An Chang, Tsung-Liang Chen
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Publication number: 20250085476Abstract: A photonic device includes a silicon layer, wherein the silicon layer includes a waveguide portion. The photonic device further includes a cladding layer over the waveguide portion, wherein the cladding layer partially exposes a surface of the waveguide portion. The photonic device further includes a low refractive index layer in direct contact with the cladding layer, wherein the low refractive index layer comprises silicon oxide, silicon carbide, silicon oxynitride, silicon carbon oxynitride, aluminum oxide or hafnium oxide. The photonic device further includes an interconnect structure over the low refractive index layer.Type: ApplicationFiled: November 21, 2024Publication date: March 13, 2025Inventors: Chien-Ying WU, Yuehying LEE, Sui-Ying HSU, Chen-Hao HUANG, Chien-Chang LEE, Chia-Ping LAI
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Patent number: 12245519Abstract: A semiconductor memory device includes a substrate having a conductor region thereon, an interlayer dielectric layer on the substrate, and a conductive via electrically connected to the conductor region. The conductive via has a lower portion embedded in the interlayer dielectric layer and an upper portion protruding from a top surface of the interlayer dielectric layer. The upper portion has a rounded top surface. A storage structure conformally covers the rounded top surface.Type: GrantFiled: December 18, 2023Date of Patent: March 4, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chia-Chang Hsu, Tang-Chun Weng, Cheng-Yi Lin, Yung-Shen Chen, Chia-Hung Lin
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Publication number: 20250067954Abstract: An optical member driving mechanism is provided. The optical member driving mechanism includes a first movable portion used for connecting an optical element, a fixed portion, a first driving assembly used for driving the first movable portion to rotate relative to the fixed portion, and a guiding assembly having a first intermediate element. The first movable portion is movable relative to the fixed portion. The guiding assembly is used for applying a first stabilized force to the first movable portion for making the first intermediate element be in contact with the first movable portion or the fixed portion. The first movable portion is rotatable relative to the fixed portion.Type: ApplicationFiled: November 8, 2024Publication date: February 27, 2025Inventors: Chih-Wei WENG, Chao-Chang HU, Yueh-Lin LEE, Chen-Hsien FAN, Chien-Yu KAO, Chia-Ching HSU, Sung-Mao TSAI, Sin-Jhong SONG
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Patent number: 12225660Abstract: A circuit board assembly in a camera module for blocking unwanted light when images are captured includes a circuit board, a sensor, and an optical blocking body connecting the circuit board and the sensor. The circuit board includes a base board and a photomask. The photomask is arranged on a surface of the base board, the base board includes conductive circuit layers and dielectric layers, the conductive circuit layers and the dielectric layers are alternately arranged, the sensor being electronically connected to the conductive layers. The optical blocking body, the photomask, and the dielectric layers block ambient light entering the camera module other than through the lens assembly of the camera module.Type: GrantFiled: August 9, 2022Date of Patent: February 11, 2025Assignee: TRIPLE WIN TECHNOLOGY(SHENZHEN) CO.LTD.Inventors: Ying-Lin Chen, Chia-Weng Hsu, Ping-Liang Eng, Feng-Chang Chien
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Patent number: 12204163Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: GrantFiled: February 5, 2024Date of Patent: January 21, 2025Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
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Publication number: 20240415026Abstract: A semiconductor device includes a substrate comprising a MTJ region and a logic region, a magnetic tunneling junction (MTJ) on the MTJ region, and a metal interconnection on the logic region. Preferably, the MTJ includes a bottom electrode layer having a gradient concentration, a free layer on the bottom electrode layer, and a top electrode layer on the free layer.Type: ApplicationFiled: August 21, 2024Publication date: December 12, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Hui-Lin Wang, Chia-Chang Hsu, Chen-Yi Weng, Chin-Yang Hsieh, Jing-Yin Jhang
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Patent number: 12106962Abstract: The embodiments of the disclosure provide a patterning method, which includes the following processes. A target layer is formed on a substrate. A hard mask layer is formed over the target layer. A first patterning process is performed on the hard mask layer by using a photomask having a first pattern with a first pitch. The photomask is shifted along a first direction by a first distance. A second patterning process is performed on the hard mask layer by using the photomask that has been shifted, so as to form a patterned hard mask. The target layer is patterned using the patterned hard mask to form a patterned target layer. The target layer has a second pattern with a second pitch less than the first pitch.Type: GrantFiled: June 7, 2021Date of Patent: October 1, 2024Assignee: United Microelectronics Corp.Inventors: Yi Jing Wang, Chia-Chang Hsu, Chien-Hao Chen, Chang-Mao Wang, Chun-Chi Yu
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Patent number: 12102014Abstract: A semiconductor device includes a substrate comprising a MTJ region and a logic region, a magnetic tunneling junction (MTJ) on the MTJ region, and a contact plug on the logic region. Preferably, the MTJ includes a bottom electrode layer having a gradient concentration, a free layer on the bottom electrode layer, and a top electrode layer on the free layer.Type: GrantFiled: October 3, 2023Date of Patent: September 24, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Hui-Lin Wang, Chia-Chang Hsu, Chen-Yi Weng, Chin-Yang Hsieh, Jing-Yin Jhang
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Publication number: 20240315146Abstract: A semiconductor device includes an array region defined on a substrate, a ring of dummy pattern surrounding the array region, and a gap between the array region and the ring of dummy pattern. Preferably, the ring of dummy pattern further includes a ring of magnetic tunneling junction (MTJ) pattern surrounding the array region and a ring of metal interconnect pattern overlapping the ring of MTJ and surrounding the array region.Type: ApplicationFiled: May 26, 2024Publication date: September 19, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chih-Wei Kuo, Chia-Chang Hsu
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Patent number: 12096697Abstract: A semiconductor device includes a substrate, a first MTJ structure, a second MTJ structure, an interconnection structure including a first metal interconnection and a second metal interconnection disposed on and contacting the first metal interconnection, a fifth metal interconnection, and a sixth metal interconnection. The first MTJ structure, the second MTJ structure, and the interconnection structure are disposed on the substrate. The interconnection structure is located between the first MTJ structure and the second MTJ structure in a first horizontal direction. The fifth metal interconnection and the sixth metal interconnection are disposed under and contact the first MTJ structure and the second MTJ structure, respectively. The fifth metal interconnection includes a barrier layer and a metal layer disposed on the barrier layer. A length of the first MTJ structure in the first horizontal direction is greater than a length of the metal layer in the first horizontal direction.Type: GrantFiled: October 18, 2023Date of Patent: September 17, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chih-Wei Kuo, Chia-Chang Hsu