Patents by Inventor Chia-Chin Chen

Chia-Chin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190287976
    Abstract: A fabricating method of a stop layer includes providing a substrate. The substrate is divided into a memory region and a peripheral circuit region. Two conductive lines are disposed within the peripheral circuit region. Then, an atomic layer deposition is performed to form a silicon nitride layer to cover the conductive lines. Later, after forming the silicon nitride layer, a silicon carbon nitride layer is formed to cover the silicon nitride layer. The silicon carbon nitride layer serves as a stop layer.
    Type: Application
    Filed: April 23, 2018
    Publication date: September 19, 2019
    Inventors: Chih-Chien Liu, Tzu-Chin Wu, Po-Chun Chen, Chia-Lung Chang
  • Publication number: 20190250522
    Abstract: Systems and methods that include providing for measuring a first topographical height of a substrate at a first coordinate on the substrate and measuring a second topographical height of the substrate at a second coordinate on the substrate are provided. The measured first and second topographical heights may be provided as a wafer map. An exposure process is then performed on the substrate using the wafer map. The exposure process can include using a first focal point when exposing the first coordinate on the substrate and using a second focal plane when exposing the second coordinate on the substrate. The first focal point is determined using the first topographical height and the second focal point is determined using the second topographical height.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 15, 2019
    Inventors: Jui-Ching WU, Jeng-Horng CHEN, Chia-Chen CHEN, Shu-Hao CHANG, Shang-Chieh CHIEN, Ming-Chin CHIEN, Anthony YEN
  • Publication number: 20190206982
    Abstract: A semiconductor memory device includes a semiconductor substrate, a first support layer, a first electrode, a capacitor dielectric layer, and a second electrode. The first support layer is disposed on the semiconductor substrate. The first electrode is disposed on the semiconductor substrate and penetrates the first support layer. The capacitor dielectric layer is disposed on the first electrode. The second electrode is disposed on the semiconductor substrate, and at least a part of the capacitor dielectric layer is disposed between the first electrode and the second electrode. The first support layer includes a carbon doped nitride layer, and a carbon concentration of a bottom portion of the first support layer is higher than a carbon concentration of a top portion of the first support layer.
    Type: Application
    Filed: March 11, 2019
    Publication date: July 4, 2019
    Inventors: Tzu-Chin Wu, Wei-Hsin Liu, Yi-Wei Chen, Chia-Lung Chang, Jui-Min Lee, Po-Chun Chen, Li-Wei Feng, Ying-Chiao Wang, Wen-Chieh Lu, Chien-Ting Ho, Tsung-Ying Tsai, Kai-Ping Chen
  • Patent number: 10312080
    Abstract: The present invention provides a method for forming an amorphous silicon multiple layer structure, the method comprises the flowing steps: first, a substrate material layer is provided, next, a first amorphous silicon layer is formed on the substrate material layer, wherein the first amorphous silicon layer includes a plurality of hydrogen atoms disposed therein, afterwards, an UV curing process is performed to the first amorphous silicon layer, so as to remove the hydrogen atoms from the first amorphous silicon layer, finally, a second amorphous silicon layer is formed on the first amorphous silicon layer.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: June 4, 2019
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Mei-Ling Chen, Wei-Hsin Liu, Yi-Wei Chen, Ching-Hsiang Chang, Jui-Min Lee, Chia-Lung Chang, Tzu-Chin Wu, Shih-Fang Tzou
  • Patent number: 9224718
    Abstract: A white light-emitting diode (LED) package containing plural blue LED chips is disclosed. The white LED package includes a transparent plate, plural blue LED chips bonded on a front surface of the transparent plate, a front fluorescent glue layer covering the plural blue LED chips, and a rear transparent glue layer covering a rear surface of the transparent plate and located at a position aligned with the front fluorescent glue layer. The edge of the rear transparent glue layer has an inclined lateral surface or a curved inclined lateral surface. Therefore, the light can be extracted from both front and rear surfaces, and the light extraction efficiency of the rear surface of the transparent plate is increased. The rear transparent glue layer can be replaced by a rear fluorescent glue layer to reduce the color temperature difference between the lights extracted from the front surface and the rear surface.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: December 29, 2015
    Assignee: Harvatek Corporation
    Inventors: Tsung-Kan Cheng, Chia-Chin Chen, Chia-Pin Chang
  • Publication number: 20150060902
    Abstract: The present invention provides a package of LED chips. The package comprises a transparent plate having a front surface and a rear surface, a plurality of LED chips disposed on the front surface, two opposite front surface reflective walls disposed on the front surface and located at two opposite outsides of the plurality of LED chips, a front surface phosphor gel filling between the two opposite front surface reflective walls, two opposite rear surface reflective walls disposed on the rear surface and a rear surface phosphor gel filling between the two opposite rear surface reflective walls. The present invention realizes the light of the package of LED chips can be extracted from both the front side and the rear side to enhance the light extraction efficiency.
    Type: Application
    Filed: June 10, 2014
    Publication date: March 5, 2015
    Inventors: Tsung-Kan CHENG, Chia-Chin CHEN
  • Publication number: 20140209934
    Abstract: A white light-emitting diode (LED) package containing plural blue LED chips is disclosed. The white LED package includes a transparent plate, plural blue LED chips bonded on a front surface of the transparent plate, a front fluorescent glue layer covering the plural blue LED chips, and a rear transparent glue layer covering a rear surface of the transparent plate and located at a position aligned with the front fluorescent glue layer. The edge of the rear transparent glue layer has an inclined lateral surface or a curved inclined lateral surface. Therefore, the light can be extracted from both front and rear surfaces, and the light extraction efficiency of the rear surface of the transparent plate is increased. The rear transparent glue layer can be replaced by a rear fluorescent glue layer to reduce the color temperature difference between the lights extracted from the front surface and the rear surface.
    Type: Application
    Filed: November 11, 2013
    Publication date: July 31, 2014
    Applicant: Harvatek Corporation
    Inventors: Tsung-Kan CHENG, Chia-Chin CHEN, Chia-Pin CHANG
  • Publication number: 20130135857
    Abstract: A light-emitting diode road lamp structure includes a seat body and a plurality of tube bodies. The seat body includes an accommodation space to accommodate a circuit unit. The tube bodies are juxtaposedly connected to an outside of the seat body, a plurality of light-emitting (LED) units accommodated in the tube bodies are electrically connected to the circuit unit, and an interspace is formed between each of the tube bodies and the tube body abutted therewith, thereby providing the road lamp with a better heat-dissipation efficiency by the air flow passing through the interspace, maintaining the luminous efficiency of the LED units, and extending the life span of the LED units.
    Type: Application
    Filed: November 29, 2011
    Publication date: May 30, 2013
    Inventors: Chia-Chin CHEN, Jiunn-Horng LEE, Yu-Bin FANG, Tzu-I TSENG, Hung-Ta HSIAO, Chin-Feng LIN
  • Publication number: 20130135853
    Abstract: The present invention is related to a light-guiding element, a light-emitting diode (LED) lamp tube and an illumination lamp. The present invention utilizes a light-guiding element disposed on a light-emitting unit of the LED lamp tube. The light-guiding element includes a first surface and a second surface. The first surface is spaced with a plurality of reflecting units in a longitudinal direction thereof, and the second surface is partitioned with a reflecting area and non-reflecting areas corresponding to the reflecting units of the first surface. The light-emitting unit includes LEDs correspondingly attached to the non-reflecting areas of the second surface of the light-guiding element. An elongated light-emitting surface can be uniformly generated from the LED lamp tube by utilizing a destroyed total reflection phenomenon caused by lights in between the reflecting units of the first surface and the reflecting area of the second surface.
    Type: Application
    Filed: November 29, 2011
    Publication date: May 30, 2013
    Inventors: Chi-Feng Lin, Yu-Bin Fang, Chia-Chin Chen
  • Publication number: 20130126824
    Abstract: Disclosed are a semiconductor nanowire solid state optical device and a control method thereof. The device comprises a nanowire, a first electrode, a second electrode, an electrical circuit and a mechanical micro device. The nanowire has a first end and a second end. The first electrode is coupled to the first end. The second electrode is coupled to the second end. The electrical circuit is coupled to the first electrode and the second electrode. The mechanical micro device is conjuncted with the nanowire for applying an external force to the nanowire to form highest occupied molecular orbital (HOMO) and lowest unoccupied molecular orbital (LUMO) in the nanowire. The HOMO and LUMO are employed as an n-type semiconductor and a p-type semiconductor, respectively. The nanowire is a semiconductor when an external force is applied thereto.
    Type: Application
    Filed: June 19, 2012
    Publication date: May 23, 2013
    Applicant: National Applied Research Laboratories
    Inventors: YU-CHING SHIH, Jiunn-horng Lee, Chia-chin Chen, Chi-feng Lin, Yu-bin Fang, Ming-hsiao Lee, Heng-chuan Kan
  • Patent number: 5964474
    Abstract: The present invention relates to an improved headset for bicycle in which the head tube and the front fork tube are provided with a retaining ring and an inner and outer tapered bearing socket and tapered bearing respectively. The inner and outer tapered bearing socket and tapered bearing are firstly assembled to make the assembling work more easy and quickly. The headset assembly features a simplified and durable configuration which can be readily and quickly assembled.
    Type: Grant
    Filed: December 30, 1997
    Date of Patent: October 12, 1999
    Inventor: Chia-Chin Chen