Patents by Inventor Chia-Fu Chang
Chia-Fu Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240128233Abstract: A sensor package structure and a manufacturing method thereof are provided. The sensor package structure includes a substrate, a fixing adhesive layer disposed on the substrate, a sensor chip adhered to the fixing adhesive layer, an annular adhering layer disposed on the sensor chip, a light-permeable sheet adhered to the annular adhering layer, and a plurality of metal wires that are electrically coupled to the substrate and the sensor chip. The size of the light-permeable sheet is smaller than that of the sensor chip.Type: ApplicationFiled: June 6, 2023Publication date: April 18, 2024Inventors: CHIA-SHUAI CHANG, WEN-FU YU, BAE-YINN HWANG, WEI-LI WANG, CHIEN-HUNG LIN
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Publication number: 20240128291Abstract: A sensor package structure includes a substrate, a sensor chip disposed on and electrically coupled to the substrate, a light-permeable layer, an adhesive layer having a ring-shape and sandwiched between the sensor chip and the light-permeable layer, and an encapsulant formed on the substrate. The adhesive layer has two adhering surfaces having a same area and a middle cross section located at a middle position between the two adhering surfaces. An area of the middle cross section is 115% to 200% of an area of any one of the two adhering surfaces. The adhesive layer can provide for light to travel therethrough, and enables the light therein to change direction and to attenuate. The sensor chip, the adhesive layer, and the light-permeable layer are embedded in the encapsulant, and an outer surface of the light-permeable layer is at least partially exposed from the encapsulant.Type: ApplicationFiled: June 6, 2023Publication date: April 18, 2024Inventors: CHIA-SHUAI CHANG, CHIEN-HUNG LIN, WEI-LI WANG, WEN-FU YU, BAE-YINN HWANG
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Publication number: 20240116707Abstract: A powered industrial truck includes a lateral movement assembly including four sliding members and four pivotal members both on a wheeled carriage, four links having a first end pivotably secured to the sliding member and a second end pivotably secured to either end of the pivotal member, a motor shaft having two ends pivotably secured to the pivotal members respectively, a first electric motor on one frame member, and four mounts attached to the sliding members respectively; two lift assemblies including a second electric motor, a shaft having two ends rotatably secured to the sliding members respectively, two gear trains at the ends of the shaft respectively, a first gear connected to the second electric motor, a second gear on the shaft, and a first roller chain on the first and second gears; two electric attachments on the platform and being laterally moveable, each attachment. The mount has rollers.Type: ApplicationFiled: September 21, 2023Publication date: April 11, 2024Inventors: Jung-Chieh Chang, Yi-Sheng Chen, Jen-Yung Hsiao, Chia-Fu Hsiao, Wei-Qi Lao, Chen-Chih Chan, Chung-Yu Liu
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Patent number: 11955397Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.Type: GrantFiled: November 9, 2020Date of Patent: April 9, 2024Assignee: Vanguard International Semiconductor CorporationInventors: Shin-Cheng Lin, Cheng-Wei Chou, Ting-En Hsieh, Yi-Han Huang, Kwang-Ming Lin, Yung-Fong Lin, Cheng-Tao Chou, Chi-Fu Lee, Chia-Lin Chen, Shu-Wen Chang
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Publication number: 20240100880Abstract: A multi-piece wheel frame includes a rim and a disc. The rim includes a barrel, and an outer rim portion protruding outwardly from the barrel. The outer rim portion forms an inclined surface, and a ring edge surface connected to an outer edge of the inclined surface and cooperating with the inclined surface to form an obtuse angle. The disc is fixed to the rim, and includes a disc core, a plurality of spoke portions extending radially outwardly from the disc core, and a reinforced ring portion connected to the spoke portions and fixed to the outer rim portion. The reinforced ring portion abuts against at least one of the inclined surface and the ring edge surface.Type: ApplicationFiled: November 16, 2022Publication date: March 28, 2024Inventors: Te-Fu HSIAO, Che-Hao KUO, Chung-Hsin CHANG, Chia-Hsin WANG, Erh-Wei LIU
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Patent number: 11929314Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.Type: GrantFiled: March 12, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Hsien Huang, Peng-Fu Hsu, Yu-Syuan Cai, Min-Hsiu Hung, Chen-Yuan Kao, Ken-Yu Chang, Chun-I Tsai, Chia-Han Lai, Chih-Wei Chang, Ming-Hsing Tsai
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Patent number: 11921947Abstract: A touch function setting method is provided. The method comprising: receiving a sequence parameter which includes multiple clicks, each of the clicks is corresponding to one of areas of a touch panel or screen; receiving a function parameter corresponding to the sequence parameter, the function parameter is corresponding to activate a function; and storing a group of touch function parameters, which includes the sequence parameter and the function parameter.Type: GrantFiled: February 18, 2022Date of Patent: March 5, 2024Assignee: EGALAX_EMPIA TECHNOLOGY INC.Inventors: Chin-Fu Chang, Shang-Tai Yeh, Chia-Ling Sun, Jia-Ming Chen
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Patent number: 11912664Abstract: Provided herein are methods, systems, kits, and compositions useful for determining small molecule-protein interactions and protein-protein interactions. The photo-click tags provided herein can be conjugated to a small molecule or amino acid analog to provide compounds that can be integrated into a protein through photo-conjugation, allowing for identification of a small molecule-protein interaction or protein-protein interaction to elucidate the small molecules mechanism of action or the protein targeted by the small molecule. In some embodiments, the photo-click tags comprise a photo-conjugation moiety and a click chemistry handle, allowing for the attachment of various functional groups (e.g., affinity tags) to the small molecule or amino acid analog.Type: GrantFiled: June 6, 2018Date of Patent: February 27, 2024Assignee: President and Fellows of Harvard CollegeInventors: Christina M. Woo, Jinxu Gao, Yuka Amako, Chia Fu Chang, Zhi Lin, Hung-Yi Wu
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Patent number: 11881274Abstract: A program control circuit for an antifuse-type one time programming memory cell array is provided. When the program action is performed, the program control circuit monitors the program current from the memory cell in real time and increases the program voltage at proper time. When the program control circuit judges that the program current generated by the memory cell is sufficient, the program control circuit confirms that the program action is completed.Type: GrantFiled: June 17, 2022Date of Patent: January 23, 2024Assignee: EMEMORY TECHNOLOGY INC.Inventors: Chia-Fu Chang, Po-Ping Wang, Jen-Yu Peng
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Patent number: 11837282Abstract: A charge pump apparatus includes a first charge pump system, a second charge pump system, a switch transistor, and a voltage regulation circuit. The first charge pump system converts a first supply voltage into a first boost voltage. The second charge pump system converts a second supply voltage into a second boost voltage. The switch transistor is coupled to the first charge pump system and the second charge pump system, and outputs an output voltage according to the second boost voltage. The switch transistor includes a control terminal receiving the second boost voltage, a first terminal receiving the first boost voltage, and a second terminal outputting the output voltage. The voltage regulation circuit successively adjusts a code of a voltage regulation signal according to the output voltage, in order to control the second charge pump system to successively adjust the second boost voltage according to the voltage regulation signal.Type: GrantFiled: October 18, 2022Date of Patent: December 5, 2023Assignee: eMemory Technology Inc.Inventors: Chia-Fu Chang, Sung-Ling Hsieh
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Publication number: 20230154556Abstract: A program control circuit for an antifuse-type one time programming memory cell array is provided. When the program action is performed, the program control circuit monitors the program current from the memory cell in real time and increases the program voltage at proper time. When the program control circuit judges that the program current generated by the memory cell is sufficient, the program control circuit confirms that the program action is completed.Type: ApplicationFiled: June 17, 2022Publication date: May 18, 2023Inventors: Chia-Fu CHANG, Po-Ping WANG, Jen-Yu PENG
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Publication number: 20230112503Abstract: A charge pump apparatus includes a first charge pump system, a second charge pump system, a switch transistor, and a voltage regulation circuit. The first charge pump system converts a first supply voltage into a first boost voltage. The second charge pump system converts a second supply voltage into a second boost voltage. The switch transistor is coupled to the first charge pump system and the second charge pump system, and outputs an output voltage according to the second boost voltage. The switch transistor includes a control terminal receiving the second boost voltage, a first terminal receiving the first boost voltage, and a second terminal outputting the output voltage. The voltage regulation circuit successively adjusts a code of a voltage regulation signal according to the output voltage, in order to control the second charge pump system to successively adjust the second boost voltage according to the voltage regulation signal.Type: ApplicationFiled: October 18, 2022Publication date: April 13, 2023Inventors: Chia-Fu CHANG, Sung-Ling HSIEH
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Patent number: 11557338Abstract: A non-volatile memory includes a cell array, a current supply circuit, a path selecting circuit, a verification circuit and a control circuit. During a sample period of a verification action, the control circuit controls the current supply circuit to provide n M-th reference currents to the verification circuit and convert the n M-th reference currents into n reference voltages. During a verification period of the verification action, the control circuit controls n multi-level memory cells of a selected row of the cell array to generate n cell currents to the verification circuit and convert the n cell currents into n sensed voltages. The n verification devices generate the n verification signals according to the reference voltages and the sensed voltages. Accordingly, the control circuit judges whether the n multi-level memory cells have reached an M-th storage state.Type: GrantFiled: May 13, 2021Date of Patent: January 17, 2023Assignee: EMEMORY TECHNOLOGY INC.Inventors: Chia-Fu Chang, Wei-Ming Ku, Ying-Je Chen
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Patent number: 11521050Abstract: A control circuit for a neural network system includes a first multiply accumulate circuit, a first neuron value storage circuit and a first processor. The first multiply accumulate circuit includes n memristive cells. The first terminals of the n memristive cells receive a supply voltage. The second terminals of the n memristive cells are connected with a first bit line. The control terminals of the n memristive cells are respectively connected with n word lines. Moreover, n neuron values of a first layer are stored in the first neuron value storage circuit. In an application phase, the first neuron value storage circuit controls the n word lines according to binary codes of the n neuron values. The first processor generates a first neuron value of a second layer.Type: GrantFiled: May 15, 2020Date of Patent: December 6, 2022Assignee: EMEMORY TECHNOLOGY INC.Inventors: Chia-Fu Chang, Cheng-Heng Chung, Ching-Yuan Lin
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Patent number: 11508435Abstract: A charge pump apparatus including a first charge pump system, a second charge pump system, a switch transistor, and a voltage regulation circuit is provided. The first charge pump system converts a first supply voltage into a first boost voltage. The second charge pump system converts a second supply voltage into a second boost voltage. The switch transistor is coupled to the first charge pump system and the second charge pump system, and outputs an output voltage according to the second boost voltage. The switch transistor includes a control terminal receiving the second boost voltage, a first terminal receiving the first boost voltage, and a second terminal outputting the output voltage. The voltage regulation circuit controls the second charge pump system according to the output voltage to adjust the second boost voltage so that the output voltage approaches to a target output value.Type: GrantFiled: July 19, 2021Date of Patent: November 22, 2022Assignee: eMemory Technology Inc.Inventors: Chia-Fu Chang, Sung-Ling Hsieh
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Patent number: 11436478Abstract: A control circuit for a neural network system includes a first multiply accumulate circuit, a first neuron value storage circuit and a first processor. The first multiply accumulate circuit includes n memristive cells. The first terminals of the n memristive cells receive a supply voltage. The second terminals of the n memristive cells are connected with a first bit line. The control terminals of the n memristive cells are respectively connected with n word lines. Moreover, n neuron values of a first layer are stored in the first neuron value storage circuit. In an application phase, the first neuron value storage circuit controls the n word lines according to binary codes of the n neuron values. The first processor generates a first neuron value of a second layer.Type: GrantFiled: May 15, 2020Date of Patent: September 6, 2022Assignee: EMEMORY TECHNOLOGY INC.Inventors: Chia-Fu Chang, Cheng-Heng Chung, Ching-Yuan Lin
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Patent number: 11309007Abstract: A write voltage generator is connected with a magnetoresistive random access memory. The write voltage generator provides a write voltage during a write operation. A storage state of a selected memory cell in a write path of the magnetoresistive random access memory is changed in response to the write voltage. The write voltage generator includes a temperature compensation circuit and a process corner compensation circuit. The temperature compensation circuit generates a transition voltage according to an ambient temperature. The transition voltage decreases with the increasing ambient temperature. The process corner compensation circuit receives the transition voltage and generates the write voltage.Type: GrantFiled: March 18, 2021Date of Patent: April 19, 2022Assignee: EMEMORY TECHNOLOGY INC.Inventor: Chia-Fu Chang
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Publication number: 20220115948Abstract: A charge pump apparatus including a first charge pump system, a second charge pump system, a switch transistor, and a voltage regulation circuit is provided. The first charge pump system converts a first supply voltage into a first boost voltage. The second charge pump system converts a second supply voltage into a second boost voltage. The switch transistor is coupled to the first charge pump system and the second charge pump system, and outputs an output voltage according to the second boost voltage. The switch transistor includes a control terminal receiving the second boost voltage, a first terminal receiving the first boost voltage, and a second terminal outputting the output voltage. The voltage regulation circuit controls the second charge pump system according to the output voltage to adjust the second boost voltage so that the output voltage approaches to a target output value.Type: ApplicationFiled: July 19, 2021Publication date: April 14, 2022Inventors: Chia-Fu CHANG, Sung-Ling HSIEH
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Publication number: 20220115063Abstract: A non-volatile memory includes a cell array, a current supply circuit, a path selecting circuit, a verification circuit and a control circuit. During a sample period of a verification action, the control circuit controls the current supply circuit to provide n M-th reference currents to the verification circuit and convert the n M-th reference currents into n reference voltages. During a verification period of the verification action, the control circuit controls n multi-level memory cells of a selected row of the cell array to generate n cell currents to the verification circuit and convert the n cell currents into n sensed voltages. The n verification devices generate the n verification signals according to the reference voltages and the sensed voltages. Accordingly, the control circuit judges whether the n multi-level memory cells have reached an M-th storage state.Type: ApplicationFiled: May 13, 2021Publication date: April 14, 2022Inventors: Chia-Fu CHANG, Wei-Ming KU, Ying-Je CHEN
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Publication number: 20220089537Abstract: Organic compounds for target identification, drug discovery, chemical library production, high-throughput screening, fluorophore conjugation, chemiluminescent compound conjugation, creation of proximity induced modulators (e.g., protein degraders)/chimeric molecules, or a combination thereof are described. The compounds can contain small molecule moieties for identification of their potential targets; an isocyanate, photoactivatable groups; chemical moieties for enrichment and detection of target-small molecule moiety interactions; proximity induced modulator element; fluorophores; chemiluminescent groups; or combinations thereof.Type: ApplicationFiled: July 12, 2021Publication date: March 24, 2022Inventors: Angela N. Koehler, Christina Woo, Catherine Henry, Chia-Fu Chang, Sebastian Pomplun, Jasmin Kruell, Brice Curtin