Abstract: A communication device includes a crystal oscillator, an auxiliary circuit, and a control circuit. The crystal oscillator provides a clock for operation of the communication device in a second mode. The auxiliary circuit includes an accumulator and a comparator. The accumulator counts a number according to an MDI (Medium Dependent Interface) signal. The comparator compares the number with a threshold. If the number is greater than or equal to the threshold, the comparator will output a wakeup signal. The control circuit switches from the second mode to a first mode in response to a control signal, and switches from the first mode to the second mode in response to the wakeup signal. In the first mode, the control circuit disables the crystal oscillator and enables the auxiliary circuit. In the second mode, the control circuit enables the crystal oscillator.

Abstract: An immersion cooling system includes a cooling tank, a housing and a valve. The coolant tank is configured to accommodate a liquid coolant and an electronic device immersed in the liquid coolant. The housing covers a side of the cooling tank and thereby forms an enclosure. The valve has two ports, one of which communicates with the enclosure and the other communicates with a part of the cooling tank above the liquid coolant. The valve is configured to open in response to a gas pressure inside the cooling tank exceeding an upper limit.

Abstract: An Ethernet physical-layer transceiver includes a control circuit and a processing circuit. The control circuit sequentially employs a plurality of different phase combinations of a transmitter clock and a receiver clock for transmission and reception of data over a cable, and obtains a plurality of sets of samples from the cable under the plurality of different phase combinations of the transmitter clock and the receiver clock, respectively. The processing circuit performs channel characteristic analysis according to the plurality of sets of samples provided by the control circuit.

Abstract: An immersion cooling system is provided. The immersion cooling system includes a box, an upper cover, plural fixing components, plural latches and a link module. The box has an opening upwardly. The upper cover covers the opening. The fixing components are disposed on the box and arranged adjacent to the outer perimeter of the opening. The latches corresponding to the fixing components are disposed on the upper cover. The link module includes plural crossbars corresponding to the latches. The link module moves downwardly close to the upper cover, scroll-wheels of the latches roll along limiting surfaces of corresponding fixing components and press against the upper cover, the upper cover closes the opening to form an airtight space. The link module moves upwardly away from the upper cover, the scroll-wheels are separated away from the limiting surfaces of corresponding fixing components, allows the upper cover to separate from the opening.

Abstract: An immersion cooling system is provided and includes a storage tank, an adapter frame, and an electronic device. The storage tank includes an accommodating tank and a sealing cover for sealing the opening of the accommodating tank. The adapter frame includes a first wire channel attached to the side of the adapter frame, and is disposed in the accommodating tank in a vertical direction. The electronic device includes at least one power wire, and is inserted into the adapter frame along the above direction. The side of the electronic device is attached to the side of the first wire channel. A second wire channel is formed between the bottoms of the electronic device and the adapter frame, and the first and second wire channels communicate with each other. The power wire is connected to the circuit of the external power apparatus along the first and second wire channels.

Abstract: An outdoor cabinet is disclosed and includes a cabinet, an active damper and a passive damper. The cabinet includes an air inlet, an air outlet and an accommodation space. The accommodation space is in communication with an outdoor environment through the air inlet and the air outlet, respectively. The active damper is arranged adjacent to the air inlet. The passive damper includes an exhaust fan and a damper blade. The exhaust fan is arranged adjacent to the air outlet. The damper blade is arranged between the air outlet and the outdoor environment. When the exhaust fan is in operation, the damper blade allows a heat-dissipation airflow to be discharged from the air outlet to the outdoor environment. When a wind pressure of the outdoor environment is greater than a wind pressure of the accommodation space, the damper blade closes the air outlet to protect electronic devices installed in the cabinet.

Abstract: An airtight device includes a container and an airtight cover on the container, and the airtight cover includes a fixing bracket, a door, and a pressuring handle. The fixing bracket has a through hole and a guiding slot, and the through hole communicates with internal space of the container. The guiding slot has adjacent first and second top surfaces, and the second top surface is higher than the first top surface. The door selectively covers the through hole. The pressuring handle pivoted on the door has a first section, a second section, and a rotating axis between the first and second sections, and the first section rotates relative to the second section. The second section receives a force to drive the first section to move from below the second top surface to below the first top surface such that the rotating axis pressures the door.

Abstract: An airtight device includes a container and an airtight cover on the container, and the airtight cover includes a fixing bracket, a door, and a pressuring handle. The fixing bracket has a through hole and a guiding slot, and the through hole communicates with internal space of the container. The guiding slot has adjacent first and second top surfaces, and the second top surface is higher than the first top surface. The door selectively covers the through hole. The pressuring handle pivoted on the door has a first section, a second section, and a rotating axis between the first and second sections, and the first section rotates relative to the second section. The second section receives a force to drive the first section to move from below the second top surface to below the first top surface such that the rotating axis pressures the door.

Abstract: A hanging device includes an accommodation main body, a sliding assembly, a hook, and the accommodation main body that includes two parallel sidewalls, in which a first vertical path is defined between the two sidewalls. The sliding assembly is movably connected between the two sidewalls to move relative to the main body along the first vertical path. The sliding assembly further includes a sliding rail which defines a second vertical path, and the hook is movably connected to the sliding rail to move relative to the sliding assembly along the second vertical path.

Abstract: An immersion cooling system includes a cooling tank, a housing and a valve. The coolant tank is configured to accommodate a liquid coolant and an electronic device immersed in the liquid coolant. The housing covers a side of the cooling tank and thereby forms an enclosure. The valve has two ports, one of which communicates with the enclosure and the other communicates with a part of the cooling tank above the liquid coolant. The valve is configured to open in response to a gas pressure inside the cooling tank exceeding an upper limit.

Abstract: A cabinet is provided, including a case and a fin element. The case has at least one opening. The fin element is disposed in the case and is adjacent to the at least one opening and includes a main body and a plurality of fins, wherein the fins are disposed on the main body and face the at least one opening.

Abstract: A cabinet is provided, including a case and a fin element. The case has at least one opening. The fin element is disposed in the case and is adjacent to the at least one opening and includes a main body and a plurality of fins, wherein the fins are disposed on the main body and face the at least one opening.

Abstract: A hardware monitoring system and a method therefor are disclosed. The hardware monitoring method includes: sensing a first temperature value of a first temperature area by a first temperature sensor and sensing a second temperature value of a second temperature area by a second temperature sensor; reading and compensating for the second temperature value by a complex programmable logic device (CPLD); and reading the first temperature value and the compensated second temperature value and controlling heat dissipation of the computer system based on the first temperature value and the compensated second temperature value, by a hardware monitor. In this method, temperature values of different areas are sensed with multiple temperature sensors and are read and modified by the CPLD, thereby allowing temperature compensation for the temperature sensors and addressing the problem of inability to individually compensate for temperature values of different areas.

Abstract: A hardware monitoring system and a method therefor are disclosed. The hardware monitoring method includes: sensing a first temperature value of a first temperature area by a first temperature sensor and sensing a second temperature value of a second temperature area by a second temperature sensor; reading and compensating for the second temperature value by a complex programmable logic device (CPLD); and reading the first temperature value and the compensated second temperature value and controlling heat dissipation of the computer system based on the first temperature value and the compensated second temperature value, by a hardware monitor. In this method, temperature values of different areas are sensed with multiple temperature sensors and are read and modified by the CPLD, thereby allowing temperature compensation for the temperature sensors and addressing the problem of inability to individually compensate for temperature values of different areas.

Abstract: A method of designing a charge trapping memory array includes designing a memory array layout. The memory array layout includes a first type of transistors; electrical connections between memory cells of the memory array layout; a first input/output (I/O) interface; and a charge pump. The method further includes modifying the memory array layout, using a processor, to replace the first type of transistors with a second type of transistors different than the first type of transistors. The method further includes modifying the memory array layout, using the processor, to modify the charge pump based on an operating voltage of the second type of transistors.

Abstract: A method of designing a charge trapping memory array includes designing a memory array layout. The memory array layout includes a first type of transistors; electrical connections between memory cells of the memory array layout; a first input/output (I/O) interface; and a charge pump. The method further includes modifying the memory array layout, using a processor, to replace the first type of transistors with a second type of transistors different than the first type of transistors. The method further includes modifying the memory array layout, using the processor, to modify the charge pump based on an operating voltage of the second type of transistors.

Abstract: A method of designing a charge trapping memory array including designing a floating gate memory array layout. The floating gate memory layout includes a first type of transistors, electrical connections between memory cells of the floating gate memory array layout, a first input/output (I/O) interface, a first type of charge pump, and an I/O block. The method further includes modifying the floating gate memory array layout, using a processor, to replace the first type of transistors with a second type of transistors different than the first type of transistors. The method further includes determining an operating voltage difference between the I/O block and the second type of transistors. The method further includes modifying the floating gate memory array layout, using the processor, to modify the first charge pump based on the determined operating voltage difference.

Abstract: A method of designing a charge trapping memory array including designing a floating gate memory array layout. The floating gate memory layout includes a first type of transistors, electrical connections between memory cells of the floating gate memory array layout, a first input/output (I/O) interface, a first type of charge pump, and an I/O block. The method further includes modifying the floating gate memory array layout, using a processor, to replace the first type of transistors with a second type of transistors different than the first type of transistors. The method further includes determining an operating voltage difference between the I/O block and the second type of transistors. The method further includes modifying the floating gate memory array layout, using the processor, to modify the first charge pump based on the determined operating voltage difference.

Abstract: A method of designing a charge trapping memory array including designing a floating gate memory array layout. The floating gate memory layout includes a first type of transistors, electrical connections between memory cells of the floating gate memory array layout, a first input/output (I/O) interface, a first type of charge pump, and an I/O block. The method further includes modifying the floating gate memory array layout, using a processor, to replace the first type of transistors with a second type of transistors different than the first type of transistors. The method further includes determining an operating voltage difference between the I/O block and the second type of transistors. The method further includes modifying the floating gate memory array layout, using the processor, to modify the first charge pump based on the determined operating voltage difference.

Abstract: The present invention discloses a metal oxide semiconductor (MOS) device and a method for operating an array structure comprising the same devices. The MOS device of the present invention comprises a device layer; an ion-implanted layer formed on the device layer and providing the source, the drain and the channel; and a gate structure formed on the ion-implanted layer. Via applying a bias voltage to the gate, the carrier density in the channel region is different from that in the source region or the drain region; thereby, the MOS device of the present invention can undertake programming, erasing and reading activities. The present invention can simplify the MOS device fabrication process, reduce the operating voltage, and promote the integration density of a 2-dimensional or 3-dimensional MOS device array.