Patents by Inventor Chia-Hsun Chen

Chia-Hsun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230386371
    Abstract: A display method and a display system for an anti-dizziness reference image are provided. The display system includes a display, a range extraction unit, an information analyzing unit, an object analyzing unit and an image setting unit. The display is used to display the anti-dizziness reference image. The range extraction unit is used to obtain a gaze background range of a user. The image setting unit is used to set an image hue, an image lightness, an image brightness, an image content or an ambient lighting display content of the anti-dizziness reference image according to a background hue information, a background lightness information, a background brightness information, or a road information of the gaze background range; or set an image ratio between the anti-dizziness reference image and a display area of the display according to an object distance or an object area of the watched object.
    Type: Application
    Filed: May 26, 2023
    Publication date: November 30, 2023
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ya-Rou HSU, Chien-Ju LEE, Hong-Ming DAI, Yu-Hsiang TSAI, Chia-Hsun TU, Kuan-Ting CHEN
  • Publication number: 20230375911
    Abstract: An extreme ultraviolet mask including a substrate, a reflective multilayer stack on the substrate and a capping layer on the reflective multilayer stack is provided. The reflective multilayer stack is treated prior to formation of the capping layer on the reflective multilayer stack. The capping layer is formed by an ion-assisted ion beam deposition or an ion-assisted sputtering process.
    Type: Application
    Filed: August 4, 2023
    Publication date: November 23, 2023
    Inventors: Ping-Hsun LIN, Pei-Cheng HSU, Ching-Fang YU, Ta-Cheng LIEN, Chia-Jen CHEN, Hsin-Chang LEE
  • Publication number: 20230369245
    Abstract: In some embodiments, the present disclosure relates to a semiconductor structure. The semiconductor structure includes a stacked semiconductor substrate having a semiconductor material disposed over a base semiconductor substrate. The base semiconductor substrate has a first coefficient of thermal expansion and the semiconductor material has a second coefficient of thermal expansion that is different than the first coefficient of thermal expansion. The stacked semiconductor substrate includes one or more sidewalls defining a crack stop ring trench that continuously extends in a closed path between a central region of the stacked semiconductor substrate and a peripheral region of the stacked semiconductor substrate surrounding the central region. The peripheral region of the stacked semiconductor substrate includes a plurality of cracks and the central region is substantially devoid of cracks.
    Type: Application
    Filed: July 20, 2023
    Publication date: November 16, 2023
    Inventors: Jiun-Yu Chen, Chun-Lin Tsai, Yun-Hsiang Wang, Chia-Hsun Wu, Jiun-Lei Yu, Po-Chih Chen
  • Patent number: 11815804
    Abstract: An extreme ultraviolet mask including a substrate, a reflective multilayer stack on the substrate and a capping layer on the reflective multilayer stack is provided. The reflective multilayer stack is treated prior to formation of the capping layer on the reflective multilayer stack. The capping layer is formed by an ion-assisted ion beam deposition or an ion-assisted sputtering process.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: November 14, 2023
    Inventors: Ping-Hsun Lin, Pei-Cheng Hsu, Ching-Fang Yu, Ta-Cheng Lien, Chia-Jen Chen, Hsin-Chang Lee
  • Publication number: 20230342118
    Abstract: A graph application programming interface (API) is used to control an image processing flow. A system receives graph API calls to add nodes to respective subgraphs. The system further receives a given graph API call to add a control flow node to a main graph. The given graph API call identifies the subgraphs as parameters. The main graph includes the control flow node connected to other nodes by edges that are directed and acyclic. A graph compiler compiles the main graph and the subgraphs into corresponding executable code. At runtime, a condition is evaluated before the subgraphs identified in the given graph API call are executed. One or more target devices execute the corresponding executable code to perform operations of an image processing pipeline while skipping execution of one or more of the subgraphs depending on the condition.
    Type: Application
    Filed: March 3, 2023
    Publication date: October 26, 2023
    Inventors: Yu-Chieh Lin, Hungchun Liu, Po-Yuan Jeng, Yungchih Chiu, Cheng-Hsun Hsieh, Chia-Yu Chang, Li-Ming Chen
  • Patent number: 11798899
    Abstract: In some embodiments, the present disclosure relates to a semiconductor structure. The semiconductor structure includes a stacked semiconductor substrate having a semiconductor material disposed over a base semiconductor substrate. The base semiconductor substrate has a first coefficient of thermal expansion and the semiconductor material has a second coefficient of thermal expansion that is different than the first coefficient of thermal expansion. The stacked semiconductor substrate includes one or more sidewalls defining a crack stop ring trench that continuously extends in a closed path between a central region of the stacked semiconductor substrate and a peripheral region of the stacked semiconductor substrate surrounding the central region. The peripheral region of the stacked semiconductor substrate includes a plurality of cracks and the central region is substantially devoid of cracks.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: October 24, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Yu Chen, Chun-Lin Tsai, Yun-Hsiang Wang, Chia-Hsun Wu, Jiun-Lei Yu, Po-Chih Chen
  • Publication number: 20230298316
    Abstract: An image classifying device is provided in the invention. The image classifying device includes a storage device, a calculation circuit and a classifying circuit. The storage device stores information corresponding to a plurality of image classes. The calculation circuit obtains a target image from an image extracting device and obtains the feature vector of the target image. The calculation circuit obtains a first estimation result corresponding to the target image based on the information corresponding to the plurality of image classes and the feature vector and obtains a second estimation result corresponding to the target image based on a reference image, wherein the reference image corresponds to one of the image classes. The classifying circuit adds the target image into one of the image classes based on the first estimation result and the second estimation result.
    Type: Application
    Filed: June 23, 2022
    Publication date: September 21, 2023
    Inventors: Chia-Yuan CHANG, Kai-Ju CHENG, Yu-Hsun CHEN, Hao-Ping LEE, Tong-Ming HSU, Chin-Yuan TING, Shao-Ang CHEN, Kuan-Chung CHEN
  • Patent number: 11728675
    Abstract: A power supply apparatus is coupled to an AC power source, a critical load, and a general load. The power supply apparatus includes a UPS, a generator system, a power conversion system, and a controller. The power conversion system includes a first power conversion path and a second power conversion path. The first power conversion path is connected to the critical load and an output side, and the second power conversion path is connected to the general load and an input side. The first power conversion path and the second power conversion path are jointly connected to a DC bus. When the controller determines that the AC power source is abnormal, the controller controls disconnecting the AC power source, and activates the UPS to supply power to the critical load so as to enable the first power conversion path and disable the second power conversion path.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: August 15, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Kai-Wei Hu, Yen-Hsun Chen, Chia-Tse Lee, Lei-Chung Hsing
  • Patent number: 11658187
    Abstract: An electronic device is provided. The electronic device includes a substrate, a first gate circuit, a second gate circuit, a signal line, and a shielding layer. The substrate includes a display area and a peripheral area. The first gate circuit is disposed in the peripheral area. The second gate circuit is disposed in the peripheral area. The signal line is coupled between the first gate circuit and the second gate circuit. The signal line includes a specific line segment, and the specific line segment overlaps the display area. The shielding layer is disposed in the display area. The shielding layer overlaps the specific line segment.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: May 23, 2023
    Assignee: INNOLUX CORPORATION
    Inventors: Yu-Che Chang, Li-Wei Sung, Cheng-Tso Chen, Hui-Min Huang, Chia-Min Yeh, Hung-Hsun Chen
  • Patent number: 10784458
    Abstract: An organic light-emitting diode including an anode, a cathode, and a luminescent layered structure disposed between the anode and the cathode. The luminescent layered structure has a luminescent layer, a sensitizer layer and a guiding material. The luminescent-layer singlet state is two times higher than the luminescent-layer triplet state. The sensitizer layer has a sensitizer-layer triplet state between the luminescent-layer singlet state and the luminescent-layer triplet state. The guiding material has a guiding-material triplet state between the sensitizer-layer singlet state and the sensitizer-layer triplet state. The energy of molecules at the sensitizer-layer singlet state is transferred to the guiding-material triplet state and then to the sensitizer-layer triplet state, which is then transferred to the luminescent-layer triplet state and triggers triplet-triplet annihilation upconversion in the luminescent layer such that the luminescent layer emits light of a first color.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: September 22, 2020
    Assignees: YUAN ZE UNIVERSITY, NICHEM FINE TECHNOLOGY CO., LTD., WISECHIP SEMICONDUCTOR INC., TETRAHEDRON TECHNOLOGY CORPORATION, SHINE MATERIALS TECHNOLOGY CO., LTD.
    Inventors: Jiun-Haw Lee, Tien-Lung Chiu, Chia-Hsun Chen, Pei-Hsi Lee
  • Publication number: 20200295289
    Abstract: An organic light-emitting diode including an anode, a cathode, and a luminescent layered structure disposed between the anode and the cathode. The luminescent layered structure has a luminescent layer, a sensitizer layer and a guiding material. The luminescent-layer singlet state is two times higher than the luminescent-layer triplet state. The sensitizer layer has a sensitizer-layer triplet state between the luminescent-layer singlet state and the luminescent-layer triplet state. The guiding material has a guiding-material triplet state between the sensitizer-layer singlet state and the sensitizer-layer triplet state. The energy of molecules at the sensitizer-layer singlet state is transferred to the guiding-material triplet state and then to the sensitizer-layer triplet state, which is then transferred to the luminescent-layer triplet state and triggers triplet-triplet annihilation upconversion in the luminescent layer such that the luminescent layer emits light of a first color.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 17, 2020
    Applicants: Yuan Ze University, Nichem Fine Technology Co, Ltd., WISECHIP SEMICONDUCTOR INC., Tetrahedron Technology Corporation, SHINE MATERIALS TECHNOLOGY CO., LTD.
    Inventors: Jiun-Haw LEE, Tien-Lung CHIU, Chia-Hsun CHEN, Pei-Hsi LEE
  • Publication number: 20200227671
    Abstract: An organic light-emitting diode including an anode, a cathode, and a luminescent layered structure is provided. The luminescent layered structure is disposed between the anode and the cathode. The luminescent layered structure has a luminescent layer and a sensitizer layer. The luminescent layer has a luminescent-layer ground state, a luminescent-layer singlet state and a luminescent-layer triplet state, in which two times of the luminescent-layer triplet state is higher than the luminescent-layer singlet state. The sensitizer layer has a sensitizer-layer triplet state, which is between the luminescent-layer singlet state and the luminescent-layer triplet state.
    Type: Application
    Filed: March 14, 2019
    Publication date: July 16, 2020
    Applicants: Yuan Ze University, Nichem Fine Technology Co, Ltd., WISECHIP SEMICONDUCTOR INC., Tetrahedron Technology Corporation, SHINE MATERIALS TECHNOLOGY CO., LTD.
    Inventors: Jiun-Haw Lee, Tien-Lung Chiu, Chia-Hsun Chen, Pei-Hsi Lee
  • Patent number: 10700303
    Abstract: An organic light-emitting diode including an anode, a cathode, and a luminescent layered structure is provided. The luminescent layered structure is disposed between the anode and the cathode. The luminescent layered structure has a luminescent layer and a sensitizer layer. The luminescent layer has a luminescent-layer ground state, a luminescent-layer singlet state and a luminescent-layer triplet state, in which two times of the luminescent-layer triplet state is higher than the luminescent-layer singlet state. The sensitizer layer has a sensitizer-layer triplet state, which is between the luminescent-layer singlet state and the luminescent-layer triplet state. The molecules of the sensitizer layer at the sensitizer layer triplet layer transfers energy to the molecules of the luminescent layer at the luminescent-layer triplet state and triggers triplet-triplet annihilation upconversion in the luminescent layer such that the luminescent layer emits light of a first color.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: June 30, 2020
    Assignees: YUAN ZE UNIVERSITY, NICHEM FINE TECHNOLOGY CO, LTD., WISECHIP SEMICONDUCTOR INC., TETRAHEDRON TECHNOLOGY CORPORATION, SHINE MATERIALS TECHNOLOGY CO., LTD.
    Inventors: Jiun-Haw Lee, Tien-Lung Chiu, Chia-Hsun Chen, Pei-Hsi Lee
  • Patent number: 8555261
    Abstract: A system and method for parsing XML is provided. The method includes associating an input stream with a pull model parser, accepting requests to selectively parse out XML items from the input stream and retrieving metadata information associated with the parsed out XML items. The method further includes checking the pulled XML item to determine whether it conforms to XML syntax and/or semantic standards and validating the pulled XML item to determine whether it conforms to a selected DTD.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: October 8, 2013
    Assignee: Microsoft Corporation
    Inventors: Anders Hejlsberg, Christopher J. Lovett, Matthew J. Warren, Chia-Hsun Chen, Mark W. Fussell, Neetu Rajpal
  • Patent number: 8191040
    Abstract: An application program interface (API) provides a set of functions that make available support for processing XML documents for application developers who build Web applications on Microsoft Corporation's .NETâ„¢ platform.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: May 29, 2012
    Assignee: Microsoft Corporation
    Inventors: Anders Hejlsberg, Daniel Dedu-Constantin, Erik B. Christensen, Keith W. Ballinger, Mark W. Fussell, Neetu Rajpal, Nithyalakshmi Sampathkumar, Omri Gazitt, Stefan H. Pharies, William A. Adams, Yan Leshinsky, Chia-Hsun Chen, Christopher J. Lovett
  • Patent number: 8112740
    Abstract: A type system employing structural subtyping is disclosed herein. A core type system supports several structural types, such as stream, choice, intersection and sequence. Also part of the core type system is a new invariant type, which denotes values whose dynamic type is the same as its static type, and type restrictions for limiting a range of a base type. Furthermore, a streamlined structural version of delegates, called structural delegates and a validation method thereof are introduce into the type system. To further facilitate type safety, strict statically checked interface casts are introduced.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: February 7, 2012
    Assignee: Microsoft Corporation
    Inventors: Erik Meijer, Wolfram Schulte, Barend H. Venter, Chia-Hsun Chen, Christopher J. Lovett, Matthew J. Warren
  • Publication number: 20110294963
    Abstract: The present invention discloses a novel toughener selected from the group of polyurea, polyurethane and poly(urea-urethane) using a facile synthesis method. The toughener forms thick-interface particles, and creates an effective toughness improvement for epoxy resin. Different from the conventional epoxy/rubber composite or epoxy/thermoplastic composite, the epoxy/polyurea, epoxy/polyurethane, or epoxy/poly(urea-urethane) composite shows Newtonian rheological behaviour, a convenient property for processing. The unique feature of the toughener according to the present invention is that toughness can be significantly improved at low toughener content without losing other desirable properties.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 1, 2011
    Applicant: FAR EAST UNIVERSITY
    Inventors: HSU-CHIANG KUAN, CHEN-FENG KUAN, HSIN-CHIN PENG, CHIA-HSUN CHEN, KUN-CHANG LIN, MIN-CHI CHUNG, YU-CHUEN LO, JHEN-CHENG WANG, CHIN-YING WANG, CHIN-LUNG CHIANG
  • Patent number: 8060859
    Abstract: A type system employing structural subtyping is disclosed herein. A core type system supports several structural types, such as stream, choice, intersection and sequence. Also part of the core type system is a new invariant type, which denotes values whose dynamic type is the same as its static type, and type restrictions for limiting a range of a base type. Furthermore, a streamlined structural version of delegates, called structural delegates and a validation method thereof are introduce into the type system. To further facilitate type safety, strict statically checked interface casts are introduced.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: November 15, 2011
    Assignee: Microsoft Corporation
    Inventors: Erik Meijer, Wolfram Schulte, Barend H. Venter, Chia-Hsun Chen, Christopher J. Lovett, Matthew J. Warren
  • Patent number: D647493
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: October 25, 2011
    Assignee: Tekcore Co., Ltd.
    Inventors: Hsiang-Szu Chang, Nien-Tze Yeh, Kuen-Pu Lu, Chia-Hsun Chen, Yu-Ting Huang
  • Patent number: D647494
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: October 25, 2011
    Assignee: Tekcore Co., Ltd.
    Inventors: Hsiang-Szu Chang, Nien-Tze Yeh, Kuen-Pu Lu, Chia-Hsun Chen