Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.

Abstract: A method of manufacturing a semiconductor device is as below. An exposed photoresist layer is developed using a developer supplied by a developer supplying unit. An ammonia gas by-product of the developer is discharged through a gas outlet of the developer supplying unit into a treating tool. The ammonia gas by-product is retained in the treating tool. A concentration of the ammonia gas by-product is monitored.

Abstract: A method of manufacturing a semiconductor device is as below. An exposed photoresist layer is developed using a developer supplied by a developer supplying unit. An ammonia gas by-product of the developer is discharged through a gas outlet of the developer supplying unit into a treating tool. The ammonia gas by-product is retained in the treating tool. A concentration of the ammonia gas by-product is monitored.

Abstract: A method of manufacturing a semiconductor device and a semiconductor processing system are provided. The method includes the following steps. A photoresist layer is formed on a substrate in a lithography tool. The photoresist layer is exposed in the lithography tool to form an exposed photoresist layer. The exposed photoresist layer is developed to form a patterned photoresist layer in the lithography tool by using a developer. An ammonia gas by-product of the developer is removed from the lithography tool.

Abstract: A method of manufacturing a semiconductor device and a semiconductor processing system are provided. The method includes the following steps. A photoresist layer is formed on a substrate in a lithography tool. The photoresist layer is exposed in the lithography tool to form an exposed photoresist layer. The exposed photoresist layer is developed to form a patterned photoresist layer in the lithography tool by using a developer. An ammonia gas by-product of the developer is removed from the lithography tool.

Abstract: A method of manufacturing a semiconductor device and a semiconductor processing system are provided. The method includes the following steps. A photoresist layer is formed on a substrate in a lithography tool. The photoresist layer is exposed in the lithography tool to form an exposed photoresist layer. The exposed photoresist layer is developed to form a patterned photoresist layer in the lithography tool by using a developer. An ammonia gas by-product of the developer is removed from the lithography tool.

Abstract: A method for monitoring gas in a wafer processing system is provided. The method includes producing an exhaust flow in an exhausting conduit from a processing chamber. The method further includes placing a gas sensor in fluid communication with a detection point located in the exhausting conduit via a sampling tube that passes through a through hole formed on the exhausting conduit. The detection point is located away from the through hole. The method also includes detecting a gas condition at the detection point with the gas sensor. In addition, the method also includes analyzing the gas condition detected by the gas sensor to determine if the gas condition in the exhausting conduit is in a range of values.

Abstract: The present disclosure describes a container for placing an object therein. The container includes a container body and a lid over the container body, a collision-preventing portion attached to one or more of the container body and the lid and configured to buffer an impact force, a pairing recognition mechanism configured to detect an object placed in the container body, and a liquid-detecting sensor configured to detect a leakage from the object.

Abstract: The present disclosure describes a container for placing an object therein. The container includes a container body and a lid over the container body, a collision-preventing portion attached to one or more of the container body and the lid and configured to buffer an impact force, a pairing recognition mechanism configured to detect an object placed in the container body, and a liquid-detecting sensor configured to detect a leakage from the object.

Abstract: A method for monitoring gas in a wafer processing system is provided. The method includes producing an exhaust flow in an exhausting conduit from a processing chamber. The method further includes placing a gas sensor in fluid communication with a detection point located in the exhausting conduit via a sampling tube that passes through a through hole formed on the exhausting conduit. The detection point is located away from the through hole. The method also includes detecting a gas condition at the detection point with the gas sensor. In addition, the method also includes analyzing the gas condition detected by the gas sensor to determine if the gas condition in the exhausting conduit is in a range of values.

Abstract: A method of manufacturing a semiconductor device and a semiconductor processing system are provided. The method includes the following steps. A photoresist layer is formed on a substrate in a lithography tool. The photoresist layer is exposed in the lithography tool to form an exposed photoresist layer. The exposed photoresist layer is developed to form a patterned photoresist layer in the lithography tool by using a developer. An ammonia gas by-product of the developer is removed from the lithography tool.

Abstract: A semiconductor device including a first wafer assembly having a first substrate and a first oxide layer over the first substrate. The semiconductor device further includes a second wafer assembly having a second substrate and a second oxide layer over the second substrate. The first oxide layer and the second oxide layer are bonded together by van der Waals bonds or covalent bonds. A method of bonding a first wafer assembly and a second wafer assembly including forming a first oxide layer over a first substrate. The method further includes forming a second oxide layer over a second wafer assembly. The method further includes forming van der Waals bonds or covalent bonds between the first oxide layer and the second oxide layer.

Abstract: A wafer including a substrate, a dielectric layer over the substrate, and a conductive layer over the dielectric layer is disclosed. The substrate has a main portion. A periphery of the dielectric layer and the periphery of the main portion of the substrate are separated by a first distance. A periphery of the conductive layer and the periphery of the main portion of the substrate are separated by a second distance. The second distance ranges from about a value that is 0.5% of a diameter of the substrate less than the first distance to about a value that is 0.5% of the diameter greater than the first distance.

Abstract: A semiconductor device including a first wafer assembly having a first substrate and a first oxide layer over the first substrate. The semiconductor device further includes a second wafer assembly having a second substrate and a second oxide layer over the second substrate. The first oxide layer and the second oxide layer are bonded together by van der Waals bonds or covalent bonds. A method of bonding a first wafer assembly and a second wafer assembly including forming a first oxide layer over a first substrate. The method further includes forming a second oxide layer over a second wafer assembly. The method further includes forming van der Waals bonds or covalent bonds between the first oxide layer and the second oxide layer.

Abstract: A wafer including a substrate, a dielectric layer over the substrate, and a conductive layer over the dielectric layer is disclosed. The substrate has a main portion. A periphery of the dielectric layer and the periphery of the main portion of the substrate are separated by a first distance. A periphery of the conductive layer and the periphery of the main portion of the substrate are separated by a second distance. The second distance ranges from about a value that is 0.5% of a diameter of the substrate less than the first distance to about a value that is 0.5% of the diameter greater than the first distance.

Abstract: An apparatus for fault detection and classification (FDC) specification management including a storage device and a process module. The storage device stores a specification management record and a chart profile record. The specification management record stores statistical algorithm settings of a parameter and the chart profile record stores chart frame and alarm condition information. The process module, which resides in a memory, receives a manipulation message corresponding to the specification management record, and accordingly manipulates the chart profile record.

Abstract: An apparatus for fault detection and classification (FDC) specification management including a storage device and a process module. The storage device stores a specification management record and a chart profile record. The specification management record stores statistical algorithm settings of a parameter and the chart profile record stores chart frame and alarm condition information. The process module, which resides in a memory, receives a manipulation message corresponding to the specification management record, and accordingly manipulates the chart profile record.

Abstract: An apparatus and method for detecting in chamber wafer position and process status are disclosed. A chamber includes a processing pedestal and plurality of lift pins. Each lift pin has an associated load cell for measuring the load exerted by the wafer on the lift pins. Mispositioned wafers or broken wafers will result in load measurements outside of expected ranges. Position of the wafer may be determined from the load distribution sensed on the lift pins.

Abstract: A wafer cassette pod that is equipped with at least one position sensing device to avoid the accidental falling of a cassette pod door resulting in wafer breakage. The wafer cassette pod is provided with at least one position sensing device mounted in the sidewall of the cassette pod with a finger member protruding from the end surface of the sidewall forming the cassette pod opening. When the wafer cassette pod is not properly positioned, or docked on the loadport, the spring force of the position sensing device pushes the cassette pod away from the entrance of the loadport and thus, preventing the accidental falling of a cassette pod poor resulting in possible wafer breakage problems.

Abstract: A pod for transporting a cassette of semiconductor wafers that is equipped with a linearly operated door opening/closing mechanism is provided. The pod includes a body member, a cover member and a latch carried on the covet member for latching the cover member onto the body member. The latch is actuatable and operable linearly from a latched condition in which the cover member is latched onto the body member to a released condition allowing removal of the cover member from the body member when engaged linearly by a latch key of a door opener situated in a loadport onto which the cassette pod is positioned.