Abstract: This present invention provides a method of manufacturing a chip scale sensing chip package, comprising the steps of: providing a sensing device wafer having a first top surface and a first bottom surface opposite to each other, whereby the sensing device wafer comprises a plurality of chip areas, and each of the chip areas comprising a sensing device and a plurality of conductive pads adjacent to the sensing chip nearby the first top surface; providing a cap wafer having a second top surface and a second bottom surface opposite to each other, and bonding the second surface of the cap wafer to the first top surface of the sensing device wafer by sandwiching a first adhesive layer therebetween; providing a temporary carrier substrate, and bonding the temporary carrier substrate to the second top surface of the cap wafer by sandwiching a second adhesive layer therebetween; forming a wiring layer connecting to each of the conductive pads on the first bottom surface of the sensing device wafer; providing a first

Abstract: A stereo preview apparatus has an auto-stereoscopic display, an input interface, a motion detection circuit, and a visual transition circuit. The input interface receives at least an input stereo image pair including a left-view image and a right-view image generated from an image capture device. The motion detection circuit evaluates a motion status of the image capture device. The visual transition circuit generates an output stereo image pair based on the input stereo image pair, and outputs the output stereo image pair to the auto-stereoscopic display for stereo preview, wherein the visual transition circuit refers to the evaluated motion status to configure adjustment made to the input stereo image pair when generating the output stereo image pair.

Abstract: A chip package includes a sensing chip, a computing chip, and a protective layer annularly surrounding the sensing chip and the computing chip. The sensing chip has a first conductive pad, a sensing element, a first surface and a second surface opposite to each other. And the sensing element is disposed on the first surface. The computing chip has a second conductive pad and a computing element. The protective layer is formed by lamination and at least exposes the sensing element. The chip package further includes a conductive layer underneath the second surface of the sensing chip and extending to be in contact with the first conductive pad and the second conductive pad.

Abstract: A chip package and a fabrication method thereof are provided according to an embodiment of the invention. The chip package includes a semiconductor substrate containing a chip and having a device area and a peripheral bonding pad area. A plurality of conductive pads is disposed at the peripheral bonding pad area and a passivation layer is formed over the semiconductor substrate to expose the conductive pads. An insulating protective layer is formed on the passivation layer at the device area. A packaging layer is disposed over the insulating protective layer to expose the conductive pads and the passivation layer at the peripheral bonding pad area. The method includes forming an insulating protective layer to cover a plurality of conductive pads during a cutting process and removing the insulating protective layer on the conductive pads through an opening of a packaging layer.

Abstract: An image viewing method includes: determining at least a first partial image corresponding to a portion of a first image directly selected from a plurality of images, and driving a display apparatus according to the first partial image; in accordance with a user interaction input, determining a second partial image corresponding to a portion of a second image directly selected from the images; and driving the display apparatus according to at least the second partial image. In one implementation, the first image and the second image are spatially correlated, and a field of view (FOV) of each of the first image and the second image is larger than an FOV of the display apparatus.

Abstract: An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a first recess extending from the first surface towards the second surface; a second recess extending from a bottom of the first recess towards the second surface, wherein a sidewall and the bottom of the first recess and a second sidewall and a second bottom of the second recess together form an exterior side surface of the semiconductor substrate; a wire layer disposed over the first surface and extending into the first recess and/or the second recess; an insulating layer positioned between the wire layer and the semiconductor substrate; and a metal light shielding layer disposed over the first surface and having at least one hole, wherein a shape of the at least one hole is a quadrangle.

Abstract: A method for performing image control in an electronic device and an associated apparatus are provided, where the method may include the steps of: obtaining a specific image from a camera module of the electronic device, and obtaining a specific focus-related parameter corresponding to the specific image, wherein the specific focus-related parameter is related to focus control of the camera module; determining a specific resize parameter corresponding to the specific image according to a relationship between the specific resize parameter and the specific focus-related parameter; and performing a resize operation on the specific image according to the specific resize parameter, to control the specific image to be displayed in a quasi-scale-invariant manner.

Abstract: A chip package including a semiconductor substrate is provided. A recess is in the semiconductor substrate, wherein the semiconductor substrate has at least one spacer protruding from the bottom of the recess. A conducting layer is disposed on the semiconductor substrate and extends into the recess. A method for forming the chip package is also provided.

Abstract: A chip package including a semiconductor substrate is provided. A recess is in the semiconductor substrate and adjoins a side edge of the semiconductor substrate, wherein the semiconductor substrate has at least one spacer protruding from the bottom of the recess. A conducting layer is disposed on the semiconductor substrate and extends into the recess.

Abstract: This present invention provides a method of manufacturing a chip scale sensing chip package, comprising the steps of: providing a sensing device wafer having a first top surface and a first bottom surface opposite to each other, whereby the sensing device wafer comprises a plurality of chip areas, and each of the chip areas comprising a sensing device and a plurality of conductive pads adjacent to the sensing chip nearby the first top surface; providing a cap wafer having a second top surface and a second bottom surface opposite to each other, and bonding the second surface of the cap wafer to the first top surface of the sensing device wafer by sandwiching a first adhesive layer therebetween; providing a temporary carrier substrate, and bonding the temporary carrier substrate to the second top surface of the cap wafer by sandwiching a second adhesive layer therebetween; forming a wiring layer connecting to each of the conductive pads on the first bottom surface of the sensing device wafer; providing a first

Abstract: A video frame processing method, which comprises: (a) capturing at least two video frames via a multi-view camera system comprising a plurality of cameras; (b) recording timestamps for each the video frame; (c) determining a major camera and a first sub camera out of the multi-view camera system, based on the timestamps, wherein the major camera captures a major video sequence comprising at least one major video frame, the first sub camera captures a video sequence of first view comprising at least one video frame of first view; (d) generating a first reference video frame of first view according to one first reference major video frame of the major video frames, which is at a reference timestamp corresponding to the first reference video frame of first view, and according to at least one the video frame of first view surrounding the reference timestamp; and (e) generating a multi-view video sequence comprising a first multi-view video frame, wherein the first multi-view video frame is generated based on the

Abstract: A method for performing image control in an electronic device and an associated apparatus are provided, where the method may include the steps of: obtaining a specific image from a camera module of the electronic device, and obtaining a specific focus-related parameter corresponding to the specific image, wherein the specific focus-related parameter is related to focus control of the camera module; determining a specific resize parameter corresponding to the specific image according to a relationship between the specific resize parameter and the specific focus-related parameter; and performing a resize operation on the specific image according to the specific resize parameter, to control the specific image to be displayed in a quasi-scale-invariant manner.

Abstract: A method for performing preview control in an electronic device and an associated apparatus are provided, where the method may include the steps of: obtaining a specific preview image from a camera module of the electronic device, and obtaining a specific focus-related parameter corresponding to the specific preview image, wherein the specific focus-related parameter is related to focus control of the camera module; determining a specific resize parameter corresponding to the specific preview image according to a predetermined relationship between the specific resize parameter and the specific focus-related parameter; and performing a resize operation on the specific preview image according to the specific resize parameter, to control the specific preview image to be displayed in a quasi-scale-invariant manner with respect to a plurality of preview images.

Abstract: A linear actuator includes an actuator including a housing, a power drive mounted at one end of the housing, a screw rod axially disposed in the housing, a connection member connected between the screw rod and the power drive, a sliding block threaded onto the screw rod, and a push rod affixed to the sliding block and extending out of the housing, and a resistance scale including a resistance substrate affixed to an inner wall of the housing at an inner bottom side and a electric brush affixed to a bottom side of the sliding block and kept in contact with the resistance substrate.

Abstract: A method for performing preview control in an electronic device and an associated apparatus are provided, where the method may include the steps of: obtaining a specific preview image from a camera module of the electronic device, and obtaining a specific focus-related parameter corresponding to the specific preview image, wherein the specific focus-related parameter is related to focus control of the camera module; determining a specific resize parameter corresponding to the specific preview image according to a predetermined relationship between the specific resize parameter and the specific focus-related parameter; and performing a resize operation on the specific preview image according to the specific resize parameter, to control the specific preview image to be displayed in a quasi-scale-invariant manner with respect to a plurality of preview images.

Abstract: A manufacturing method of a chip package includes the following steps. A light transmissive substrate is bonded to a first surface of a wafer, such that a dam element between the light transmissive substrate and the wafer covers a conductive pad of the wafer. A second surface of the wafer facing away from the first surface is etched, such that a hollow region and a trench selectively communicated with the hollow region are synchronously formed in the wafer. A first isolation layer on the conductive pad is etched to expose the conductive pad through the hollow region.

Abstract: The present invention provides a chip package that includes a semiconductor chip, at least one recess, a plurality of first redistribution metal lines, and at least one protrusion. The semiconductor chip has a plurality of conductive pads disposed on an upper surface of the semiconductor chip. The recess extends from the upper surface to a lower surface of the semiconductor chip, and is arranged on the side of the semiconductor chip. The first redistribution metal lines are disposed on the upper surface, electrically connected to the conductive pad individually, and extended into the recesses separately. The protrusion is disposed in the recess and located between the adjacent first redistribution metal lines.

Abstract: A method for forming a chip package is provided. A first substrate is provided. A second substrate is attached on the first substrate, wherein the second substrate has a plurality of rectangular chip regions separated by a scribed-line region. A portion of the second substrate corresponding to the scribed-line region is removed to form a plurality of chips on the first substrate, wherein at least one bridge portion is formed between adjacent chips. A chip package formed by the method is also provided.

Abstract: An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a first recess extending from the first surface towards the second surface; a second recess extending from a bottom of the first recess towards the second surface, wherein a sidewall and the bottom of the first recess and a second sidewall and a second bottom of the second recess together form an exterior side surface of the semiconductor substrate; a wire layer disposed over the first surface and extending into the first recess and/or the second recess; an insulating layer positioned between the wire layer and the semiconductor substrate; and a metal light shielding layer disposed over the first surface and having at least one hole, wherein a shape of the at least one hole is a quadrangle.

Abstract: An auto-convergence system includes a disparity unit, a convergence unit and an active learning unit. The disparity unit performs a disparity analysis upon an input stereo image pair, and accordingly obtains a disparity distribution of the input stereo image pair. The convergence unit adjusts the input stereo image pair adaptively according to the disparity distribution and a learned convergence range, and accordingly generates an output stereo image pair for playback. The active learning unit actively learns a convergence range during playback of stereo image pairs, and accordingly determines the learned convergence range.