Patents by Inventor Chien Cheng Chen
Chien Cheng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11687006Abstract: In a method of manufacturing a photo mask for lithography, circuit pattern data are acquired. A pattern density, which is a total pattern area per predetermined area, is calculated from the circuit pattern data. Dummy pattern data for areas having pattern density less than a threshold density are generated. Mask drawing data is generated from the circuit pattern data and the dummy pattern data. By using an electron beam from an electron beam lithography apparatus, patterns are drawn according to the mask drawing data on a resist layer formed on a mask blank substrate. The drawn resist layer is developed using a developing solution. Dummy patterns included in the dummy pattern data are not printed as a photo mask pattern when the resist layer is exposed with the electron beam and is developed.Type: GrantFiled: May 9, 2022Date of Patent: June 27, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chien-Cheng Chen, Chia-Jen Chen, Hsin-Chang Lee, Shih-Ming Chang, Tran-Hui Shen, Yen-Cheng Ho, Chen-Shao Hsu
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Publication number: 20230068366Abstract: A system for aiding placement of a nasogastric tube or a nasoduodenal tube and a method for using the same is disclosed, and the system comprises that of: a placing tube; a three-way connector, having a first port, a second port, and a third port, the first port being on the opposite end to the second port, the first port being adjacent to the third port, the first port being connected with a proximal end of the placing tube, the third port being adapted for pumping air or fluid into the three-way connector; an endoscope, having an insertion tube and an image-capturing device, the distal end of the insertion tube being a bending section, the image-capturing device being located in the front end of the bending section; and a display unit, connected with the endoscope.Type: ApplicationFiled: August 24, 2022Publication date: March 2, 2023Inventors: Chien-Cheng CHEN, Chiao-Hsiung CHUANG
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Publication number: 20230060457Abstract: A chip structure is provided. The chip structure includes a substrate. The chip structure includes an interconnect layer over the substrate. The chip structure includes a conductive pad over the interconnect layer. The chip structure includes a conductive bump over the conductive pad. The conductive bump has a first portion, a second portion, and a neck portion between the first portion and the second portion. The first portion is between the neck portion and the conductive pad. The neck portion is narrower than the first portion and narrower than the second portion.Type: ApplicationFiled: August 30, 2021Publication date: March 2, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Cheng CHEN, Pei-Haw TSAO
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Patent number: 11526081Abstract: An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.Type: GrantFiled: July 2, 2021Date of Patent: December 13, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Ming Chang, Wen Lo, Chun-Hung Liu, Chia-Hua Chang, Hsin-Wei Wu, Ta-Wei Ou, Chien-Chih Chen, Chien-Cheng Chen
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Publication number: 20220390827Abstract: A lithography mask including a substrate, a phase shift layer on the substrate and an etch stop layer is provided. The phase shift layer is patterned and the substrate is protected from etching by the etch stop layer. The etch stop layer can be a material that is semi-transmissive to light used in photolithography processes or it can be transmissive to light used in photolithography processes.Type: ApplicationFiled: April 8, 2022Publication date: December 8, 2022Inventors: Chien-Cheng Chen, Huan-Ling Lee, Ta-Cheng Lien, Chia-Jen Chen, Hsin-Chang Lee
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Publication number: 20220365417Abstract: A mask for use in a semiconductor lithography process includes a substrate, a mask pattern disposed on the substrate, and a light absorbing border surrounding the mask pattern. The light absorbing border is inset from at least two edges of the substrate to define a peripheral region outside of the light absorbing border. In some designs, a first peripheral region extends from an outer perimeter of the light absorbing border to a first edge of the substrate, and a second peripheral region that extends from the outer perimeter of the light absorbing border to a second edge of the substrate, where the first edge of the substrate and the second edge of the substrate are on opposite sides of the mask pattern.Type: ApplicationFiled: May 17, 2021Publication date: November 17, 2022Inventors: Chien-Cheng Chen, Huan-Ling Lee, Ta-Cheng Lien, Chia-Jen Chen, Hsin-Chang Lee
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Publication number: 20220357660Abstract: A mask characterization method comprises measuring an interference signal of a reflection or transmission mask for use in lithography; and determining a quality metric for the reflection or transmission mask based on the interference signal. A mask characterization apparatus comprises a light source arranged to illuminate a reflective or transmissive mask with light whereby mask-reflected or mask-transmitted light is generated; an optical grating arranged to convert the mask-reflected or mask-transmitted light into an interference pattern; and an optical detector array arranged to generate an interference signal by measuring the interference pattern.Type: ApplicationFiled: May 10, 2021Publication date: November 10, 2022Inventors: Chien-Cheng Chen, Ping-Hsun Lin, Huan-Ling Lee, Ta-Cheng Lien, Chia-Jen Chen, Hsin-Chang Lee
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Publication number: 20220260926Abstract: In a method of manufacturing a photo mask for lithography, circuit pattern data are acquired. A pattern density, which is a total pattern area per predetermined area, is calculated from the circuit pattern data. Dummy pattern data for areas having pattern density less than a threshold density are generated. Mask drawing data is generated from the circuit pattern data and the dummy pattern data. By using an electron beam from an electron beam lithography apparatus, patterns are drawn according to the mask drawing data on a resist layer formed on a mask blank substrate. The drawn resist layer is developed using a developing solution. Dummy patterns included in the dummy pattern data are not printed as a photo mask pattern when the resist layer is exposed with the electron beam and is developed.Type: ApplicationFiled: May 9, 2022Publication date: August 18, 2022Inventors: Chien-Cheng CHEN, Chia-Jen CHEN, Hsin-Chang LEE, Shih-Ming CHANG, Tran-Hui SHEN, Yen-Cheng HO, Chen-Shao HSU
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Patent number: 11327405Abstract: In a method of manufacturing a photo mask for lithography, circuit pattern data are acquired. A pattern density, which is a total pattern area per predetermined area, is calculated from the circuit pattern data. Dummy pattern data for areas having pattern density less than a threshold density are generated. Mask drawing data is generated from the circuit pattern data and the dummy pattern data. By using an electron beam from an electron beam lithography apparatus, patterns are drawn according to the mask drawing data on a resist layer formed on a mask blank substrate. The drawn resist layer is developed using a developing solution. Dummy patterns included in the dummy pattern data are not printed as a photo mask pattern when the resist layer is exposed with the electron beam and is developed.Type: GrantFiled: October 26, 2020Date of Patent: May 10, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chien-Cheng Chen, Chia-Jen Chen, Hsin-Chang Lee, Shih-Ming Chang, Tran-Hui Shen, Yen-Cheng Ho, Chen-Shao Hsu
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Patent number: 11241157Abstract: An upper gastrointestinal bleeding monitoring system includes a detection device and a signal processing device to determine bleeding condition of an upper gastrointestinal tract by using relation of time and intensity ratios of RGB three primary colors. The detecting device is placed to the upper gastrointestinal tract of a patient via his/her mouth or nasal passage and then stay the upper gastrointestinal tract for several days for detection of bleeding. The signal processing device may receive and display signal from the detection device to help medical professionals check if bleeding occurs in an upper gastrointestinal tract. Moreover, a procedure of determination of bleeding in an upper gastrointestinal tract with the upper gastrointestinal bleeding monitoring system is described.Type: GrantFiled: June 19, 2017Date of Patent: February 8, 2022Assignee: MediVisionTech Co., LtdInventors: Chiao-Hsiung Chuang, Chien-Cheng Chen, Yi-Ju Chen
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Publication number: 20220026797Abstract: A pellicle includes a frame configured to attach to a photomask, wherein the frame includes a vent hole. The pellicle further includes a filter covering the vent hole, wherein the filter directly connects to an outer surface of the frame. The pellicle further includes a membrane extending over a top surface of the frame. The pellicle further includes a mount between the frame and the membrane, wherein the mount is attachable to the frame by an adhesive.Type: ApplicationFiled: October 8, 2021Publication date: January 27, 2022Inventors: Chue San YOO, Chih-Chiang TU, Chien-Cheng CHEN, Jong-Yuh CHANG, Kun-Lung HSIEH, Pei-Cheng HSU, Hsin-Chang LEE, Yun-Yue LIN
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Publication number: 20210405534Abstract: An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.Type: ApplicationFiled: July 2, 2021Publication date: December 30, 2021Inventors: Shih-Ming Chang, Wen Lo, Chun-Hung Liu, Chia-Hua Chang, Hsin-Wei Wu, Ta-Wei Ou, Chien-Chih Chen, Chien-Cheng Chen
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Patent number: 11143952Abstract: A method of removing a pellicle from a photomask includes removing a portion of a membrane from a pellicle frame, wherein the pellicle frame remains attached to the photomask following the removing of the portion of the membrane. The method further includes removing the pellicle frame from the photomask. The method further includes cleaning the photomask.Type: GrantFiled: October 31, 2017Date of Patent: October 12, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chue San Yoo, Chih-Chiang Tu, Chien-Cheng Chen, Jong-Yuh Chang, Kun-Lung Hsieh, Pei-Cheng Hsu, Hsin-Chang Lee, Yun-Yue Lin
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Publication number: 20210294203Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.Type: ApplicationFiled: June 7, 2021Publication date: September 23, 2021Inventors: Chin-Hsiang Lin, Chien-Cheng Chen, Hsin-Chang Lee, Chia-Jen Chen, Pei-Cheng Hsu, Yih-Chen Su, Gaston Lee, Tran-Hui Shen
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Patent number: 11054748Abstract: An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.Type: GrantFiled: September 21, 2018Date of Patent: July 6, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Ming Chang, Wen Lo, Chun-Hung Liu, Chia-Hua Chang, Hsin-Wei Wu, Ta-Wei Ou, Chien-Chih Chen, Chien-Cheng Chen
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Patent number: 11029593Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.Type: GrantFiled: October 22, 2019Date of Patent: June 8, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chin-Hsiang Lin, Chien-Cheng Chen, Hsin-Chang Lee, Chia-Jen Chen, Pei-Cheng Hsu, Yih-Chen Su, Gaston Lee, Tran-Hui Shen
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Publication number: 20210055646Abstract: In a method of manufacturing a photo mask for lithography, circuit pattern data are acquired. A pattern density, which is a total pattern area per predetermined area, is calculated from the circuit pattern data. Dummy pattern data for areas having pattern density less than a threshold density are generated. Mask drawing data is generated from the circuit pattern data and the dummy pattern data. By using an electron beam from an electron beam lithography apparatus, patterns are drawn according to the mask drawing data on a resist layer formed on a mask blank substrate. The drawn resist layer is developed using a developing solution. Dummy patterns included in the dummy pattern data are not printed as a photo mask pattern when the resist layer is exposed with the electron beam and is developed.Type: ApplicationFiled: October 26, 2020Publication date: February 25, 2021Inventors: Chien-Cheng CHEN, Chia-Jen CHEN, Hsin-Chang LEE, Shih-Ming CHANG, Tran-Hui SHEN, Yen-Cheng HO, Chen-Shao HSU
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Patent number: 10893608Abstract: The present invention provides a fabric having a multiple layered circuit thereon integrating with electronic devices. The fabric comprises: a base layer; a plurality of conductive circuit layers; at least one connecting layer having electrically-conductive via-hole(s) and electrically-insulated area covering the area without the via-hole(s) and electrically connecting two conductive circuit layers through the via-hole(s) but electrically insulating the rest of the two conductive circuit layers; one or more than one electrical devices mounted to the conductive circuit layer and connected to circuits on the conductive circuit layer through anisotropic conductive film (ACF); and a water-proof layer disposed on the conductive circuit layer which is the farthest away from the base layer and covering the electrical device(s).Type: GrantFiled: August 20, 2018Date of Patent: January 12, 2021Assignee: National Taipei University of TechnologyInventors: Tzu-Wei Chou, Syang-Peng Rwei, Chien-Cheng Chen, Guo-Ming Sung
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Patent number: D912661Type: GrantFiled: February 9, 2018Date of Patent: March 9, 2021Assignee: Dell Products L.P.Inventors: Eid-Beng Goh, Chih Chieh Chang, An-Chung Hsieh, Chien-Cheng Chen, Kyu Sang Park
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Patent number: D995511Type: GrantFiled: November 17, 2021Date of Patent: August 15, 2023Assignee: Dell Products L.P.Inventor: Chien-Cheng Chen