Abstract: A display apparatus includes a timing controller and a gate-driver on array (GOA) control circuit. The timing controller generates a frame synchronization signal. The GOA control circuit is coupled to the timing controller and includes a scan signal management circuit and a level shifter. The scan signal management circuit generates a scan signal management signal according to the frame synchronization signal, a predetermined panel parameter, and an operation clock signal. The scan signal management circuit includes a storage unit which stores the predetermined panel parameter. The level shifter generates a scan control signal according to the scan signal management signal to control a GOA of a display panel circuit. The GOA generates a gate driving signal to control a vertical scan operation of the display panel circuit.

Abstract: In one embodiment, a system includes a laser configured to generate a laser beam and a laser-aiming module configured to aim the laser beam to be at least in part incident on a remotely located, continuously moving solar cell. The system also includes a controller configured to receive a feedback signal indicating a position of the laser beam relative to the remotely located, continuously moving solar cell and instruct the laser-aiming module to adjust the aiming of the laser beam based on the feedback signal.

Abstract: Optical communication systems and methods using coherently combined optical beams are disclosed. A representative system includes a first mirror having a first actuator for adjusting a position of the first mirror in a path of a first optical beam and a first optical detector for receiving light reflected from the first mirror. The system also includes a second mirror having a second actuator for adjusting a position of the second mirror in a path of a second optical beam and a second optical detector for receiving light reflected from the second mirror. The system includes an interferometer for measuring an interference between the first and second optical beams and a third optical detector for receiving light from the second interfered optical beam. Intensity of the first interfered optical beam is increased by the interference, and intensity of the second interfered optical beam is decreased by the interference.

Abstract: A speaker module is provided. The speaker module includes a housing, a speaker unit, and a modulating unit. The housing has a main segment and an extension segment connecting to the main segment and extending away from the main segment, the main segment and the extension segment communicate with each other and form a chamber. The speaker unit is disposed in the housing in a position that is relative to the main segment. The modulating unit is arranged to correspond to the extension segment and is positioned in the housing. The shape of a cross section of the modulating unit is compatible with the shape of a cross section of the extension segment, and a length between the speaker unit and the modulating unit along the chamber is greater than 0.

Abstract: A speaker device includes a first cabinet, a speaker unit, a second cabinet and a tube cabinet. The first cabinet is disposed in a casing and with a first chamber formed therein. The speaker unit is disposed in the first chamber. The second cabinet is connected to the casing and with an opening formed on the casing. The second cabinet has a second chamber formed therein and communicating with the opening. The tube cabinet connects the first cabinet and the second cabinet. The tube cabinet has a tube chamber formed therein and communicating with the first chamber and the second chamber. A sound generated by the speaker unit is enhanced in the first chamber, transmitted to the second chamber via the tube chamber and emitted out via the opening.

Abstract: An integrated packaging structure is provided. In the package structure, an integrated component body has a first source region, a second source region, a first setting region, and a second setting region, which are separated from each other. A first MOSFET die and a second MOSFET die are located on the first setting region and the second setting region respectively, and have a top surface, a source electrode pad and a gate electrode pad. The source electrode pad and the gate electrode pad are exposed from the top surface and spaced apart from each other. A first source connection element is connected to the source electrode pad of the first MOSFET die and the first source region. A second source connection element is connected to the source electrode pad of the second MOSFET die and the second source region. A gate connection element is connected to the gate electrode pad and a gate region of the integrated component body.

Abstract: A common-source type package structure is provided in the present invention. In the package structure, an integrated component body is configured a common-source pin region, a first arrangement region and a second arrangement region. The second and first arrangement regions are spaced apart from each other. A first MOSFET die and a second MOSFET are respectively located at the first and second arrangement region respectively, and have a top surface, a source electrode pad and a gate electrode pad. The source electrode pad and the gate electrode pad are exposed to the top surface and spaced apart from each other. A common-source connection element is connected to the source electrode pad and the common-source pin region. A gate connection element is connected to the gate electrode pad and a gate pin region of the integrated component body.

Abstract: An integrated packaging structure is provided. In the package structure, an integrated component body has a first source region, a second source region, a first setting region, and a second setting region, which are separated from each other. A first MOSFET die and a second MOSFET die are located on the first setting region and the second setting region respectively, and have a top surface, a source electrode pad and a gate electrode pad. The source electrode pad and the gate electrode pad are exposed from the top surface and spaced apart from each other. A first source connection element is connected to the source electrode pad of the first MOSFET die and the first source region. A second source connection element is connected to the source electrode pad of the second MOSFET die and the second source region. A gate connection element is connected to the gate electrode pad and a gate region of the integrated component body.

Abstract: Disclosed is material saving clothing including a repeatedly usable general-purpose holding and looping member for replacement with a full-pad type or a partial-pad type absorbent article and an absorbent article. The holding and looping member has a rear waist portion that is provided with a rear opening and a rear clamp section and a front portion that is provided with a front opening and a front clamping section. The front portion is provided, on a lower portion of each of left and right sides thereof, with a side clamp section and anti-skidding glue. The absorbent article is provided, above a rear end thereof, with left and right rear pulling sections positionable into a rear opening and clamped (from opposite sides) by a rear clamp section and a front clamping section provided above a front end to be pulled through a front opening for clamping by a front clamping section.

Abstract: The present invention provides a display apparatus, including: a display panel circuit which includes a panel load line and performs a scanning display operation; and a panel driving circuit. The panel driving circuit determines at least a test phase and a scanning display phase according to a display control signal generated by a timing control circuit, wherein the test phase is a partial time period when the panel driving circuit does not perform the scanning display operation. The panel driving circuit generates a test driving signal on the panel load line, and detects an electronic characteristic of the display panel circuit so as to determine a failure item thereof during the test phase according to a pre-determined test instruction. The panel driving circuit generates a display driving signal on the panel load line for the scanning display operation according to the display control signal during the scanning display phase.

Abstract: The pants has two zippers symmetrically arranged from a waistband's front center extend slantwise downward to a lateral side of the pants. A detachable wrapping member is integrated with the pants. The wrapping member has a belt whose two ends thread through corresponding loops at bottom corners of the wrapping member, and a bottom portion of the wrapping member is flipped upward to reliably cover a crotch area of a user, preventing excrement or urine from overflowing. A clamping member uses Velcro fastening elements or snap buttons to lock a planar object of an absorbent member, and the clamping member can provide secured positioning, increased friction, and load distribution so that the absorbent member can be reliably worn. The clamping member contains a clamping element that is concealed when not in use. The clamping element then can be flipped to further secure its locking the absorbent member.

Abstract: A common-source type package structure is provided in the present invention. In the package structure, an integrated component body is configured a common-source pin region, a first arrangement region and a second arrangement region. The second and first arrangement regions are spaced apart from each other. A first MOSFET die and a second MOSFET are respectively located at the first and second arrangement region respectively, and have a top surface, a source electrode pad and a gate electrode pad. The source electrode pad and the gate electrode pad are exposed to the top surface and spaced apart from each other. A common-source connection element is connected to the source electrode pad and the common-source pin region. A gate connection element is connected to the gate electrode pad and a gate pin region of the integrated component body.

Abstract: A common-source type package structure is provided in the present invention. In the package structure, an integrated component body is configured a common-source pin region, a first arrangement region and a second arrangement region. The second and first arrangement regions are spaced apart from each other. A first MOSFET die and a second MOSFET are respectively located at the first and second arrangement region respectively, and have a top surface, a source electrode pad and a gate electrode pad. The source electrode pad and the gate electrode pad are exposed to the top surface and spaced apart from each other. A common-source connection element is connected to the source electrode pad and the common-source pin region. A gate connection element is connected to the gate electrode pad and a gate pin region of the integrated component body.

Abstract: A common-source type package structure is provided in the present invention. In the package structure, an integrated component body is configured a common-source pin region, a first arrangement region and a second arrangement region. The second and first arrangement regions are spaced apart from each other. A first MOSFET die and a second MOSFET are respectively located at the first and second arrangement region respectively, and have a top surface, a source electrode pad and a gate electrode pad. The source electrode pad and the gate electrode pad are exposed to the top surface and spaced apart from each other. A common-source connection element is connected to the source electrode pad and the common-source pin region. A gate connection element is connected to the gate electrode pad and a gate pin region of the integrated component body.

Abstract: The present invention provides a display apparatus, including: a display panel circuit which includes a panel load line and performs a scanning display operation; and a panel driving circuit. The panel driving circuit determines at least a test phase and a scanning display phase according to a display control signal generated by a timing control circuit, wherein the test phase is a partial time period when the panel driving circuit does not perform the scanning display operation. The panel driving circuit generates a test driving signal on the panel load line, and detects an electronic characteristic of the display panel circuit so as to determine a failure item thereof during the test phase according to a pre-determined test instruction. The panel driving circuit generates a display driving signal on the panel load line for the scanning display operation according to the display control signal during the scanning display phase.

Abstract: An interconnection structure includes a first dielectric layer, a bottom conductive feature present in the first dielectric layer, a second dielectric layer present on the first dielectric layer, an aluminum-containing etch stop layer present between the first dielectric layer and the second dielectric layer, an upper conductive via present at least in the second dielectric layer and electrically connected to the bottom conductive feature, and at least one aluminum-containing fragment present at least at a bottom corner of the upper conductive via.

Abstract: A humanized care clothing includes: a coat body, a front body thereof including left and right front side sheets spaced a full open vacancy and a detachable connecting sheet covering the vacancy, two shoulders of the connecting sheet being connectable with or detachable from two shoulder portions of a rear body, and left and right sides thereof the two opposite sides of the left and right front side sheets; a pair of restricting sleeve, two receiving pockets, two limiting pockets, a lower body clothing, the pair of buttoning sleeves being detachable from and connectable with the respective left and right front side sheets, the receiving pocket for each restricting sleeve being sewn below it, the limiting pocket being respectively overlapped with the outer parts of the receiving pockets and capable of connecting the clothing sleeve with the lower body clothing; and a collar member.

Abstract: A nonparametric method for measuring a clustered level of time rank in binary data is provided. A sample set of engineering data is classified into a target group and a reference group, and a rank is set to each sample in a chronological order. A minimum rank and a maximum rank are obtained from the target group, by which a characteristic period is defined. In the characteristic period, an average rank values of the target group and an average rank value of the reference group are calculated. After creating a dummy sample set, the dummy sample set is incorporated into an analysis data set and a new rank is set based on a comparison result of the average rank value of the target group and the average rank value of the reference group, and the minimum rank and the maximum rank of the characteristic period to obtain adjusted test data. A Mann-Whitney U test is executed on the adjusted test data to obtain a clustered level index of time rank in binary data.

Abstract: A nonparametric method for measuring a clustered level of time rank in binary data is provided. A sample set of engineering data is classified into a target group and a reference group, and a rank is set to each sample in a chronological order. A minimum rank and a maximum rank are obtained from the target group, by which a characteristic period is defined. In the characteristic period, an average rank values of the target group and an average rank value of the reference group are calculated. After creating a dummy sample set, the dummy sample set is incorporated into an analysis data set and a new rank is set based on a comparison result of the average rank value of the target group and the average rank value of the reference group, and the minimum rank and the maximum rank of the characteristic period to obtain adjusted test data. A Mann-Whitney U test is executed on the adjusted test data to obtain a clustered level index of time rank in binary data.

Abstract: A process control method is provided for performing a deposition process on a plurality of wafers of a batch. The process control method includes: deciding a placement location of the wafers of the batch according to the history information of a tool and the product information of the batch; calculating a target value of each placement location according to the placement location of the wafers of the batch and the history information of the tool; calculating a process parameter according to the history information of the tool, the product information of the batch, and the target value of each placement location; and performing a deposition process according to the placement location of the wafers of the batch and the process parameter.