Patents by Inventor Chien-Hung Kuo

Chien-Hung Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190330902
    Abstract: A slide rail assembly includes a first rail, a second rail, a base, an elastic member and a working member. The first rail is arranged with a positioning part. The second rail is movable relative to the first rail from a retracted position along a first direction and arranged with an engaging feature. The base is movably mounted to the first rail. The working member is rotatable relative to the base and arranged with an actuating structure. The actuating structure includes first and second parts. The second part is configured to be engaged with the positioning part, so as to allow the elastic member to accumulate an elastic force along a second direction. The first part is configured to be engaged with the engaging feature. The first part is arranged with a holding feature for preventing the engaging feature from being detached from the working member along a predetermined direction.
    Type: Application
    Filed: September 7, 2018
    Publication date: October 31, 2019
    Inventors: Ken-Ching Chen, Shih-Lung Huang, Chien-Hung Kuo, Chun-Chiang Wang
  • Patent number: 10459341
    Abstract: Embodiments of the present disclosure generally provide a digital lithography system that can process both large area substrates as well as semiconductor device substrates, such as wafers. Both the large area substrates and the semiconductor device substrates can be processed in the same system simultaneously. Additionally, the system can accommodate different levels of exposure for forming the features over the substrates. For example, the system can accommodate very precise feature patterning as well as less precise feature patterning. The different exposures can occur in the same chamber simultaneously. Thus, the system is capable of processing both semiconductor device substrates and large area substrates simultaneously while also accommodating very precise feature patterning simultaneous with less precise feature patterning.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: October 29, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Chien-Hua Lai, Ching-Chang Chen, Shih-Hao Kuo, Tsu-Hui Yang, Hsiu-Jen Wang, Yi-Sheng Liu, Chia-Hung Kao
  • Publication number: 20190326239
    Abstract: A method of forming a semiconductor device is provided. A first substrate is provided with a conductive feature therein, a metal bump over the conductive feature and a passivation stack aside the metal bump. A first insulating layer is formed over the metal bump and the passivation stack. First and second patterning processes are performed to form first and second opening patterns in the first insulating layer. The metal bump is exposed by the second patterning process. A second substrate is provided with a second insulating layer thereon. The second substrate is bonded to the first substrate with the second insulating layer and the first insulating layer facing each other, so that the second insulating layer fills in the first and second opening patterns of the first insulating layer. The first insulating layer and a portion of the passivation stack are removed.
    Type: Application
    Filed: April 20, 2018
    Publication date: October 24, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Hon-Lin Huang, Chao-Yi Wang, Chen-Shien Chen, Chien-Hung Kuo
  • Publication number: 20190295977
    Abstract: A semiconductor device comprises a semiconductor substrate, a conductive pad over the semiconductor substrate, a conductive bump over the conductive pad, a conductive cap over the conductive bump, and a passivation layer over the semiconductor substrate and surrounding the conductive bump. A combination of the conductive bump and the conductive cap has a stepped sidewall profile. The passivation layer has an inner sidewall at least partially facing and spaced apart from an outer sidewall of the conductive bump.
    Type: Application
    Filed: June 10, 2019
    Publication date: September 26, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu WU, Ching-Hui CHEN, Mirng-Ji LII, Kai-Di WU, Chien-Hung KUO, Chao-Yi WANG, Hon-Lin HUANG, Zi-Zhong WANG, Chun-Mao CHIU
  • Patent number: 10372645
    Abstract: A universal serial bus (USB) type C transmission line includes a host-to-host bridge, a first multiplexer, and a second multiplexer. When a first device and a second device are coupled to the first multiplexer and the second multiplexer respectively, the first multiplexer determines whether the first device is a host or a slave device and the second multiplexer determines whether the second device is another host or another slave device, and the first device optionally communicates with the second device through the host-to-host bridge, the first multiplexer, and the second multiplexer, or through the first multiplexer and the second multiplexer according to determination results of the first multiplexer and the second multiplexer.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: August 6, 2019
    Assignee: eEver Technology, Inc.
    Inventors: Shih-Min Hsu, Shao-Hung Chen, Chien-Cheng Kuo
  • Publication number: 20190235389
    Abstract: Embodiments of the present disclosure generally provide a digital lithography system that can process both large area substrates as well as semiconductor device substrates, such as wafers. Both the large area substrates and the semiconductor device substrates can be processed in the same system simultaneously. Additionally, the system can accommodate different levels of exposure for forming the features over the substrates. For example, the system can accommodate very precise feature patterning as well as less precise feature patterning. The different exposures can occur in the same chamber simultaneously. Thus, the system is capable of processing both semiconductor device substrates and large area substrates simultaneously while also accommodating very precise feature patterning simultaneous with less precise feature patterning.
    Type: Application
    Filed: December 11, 2018
    Publication date: August 1, 2019
    Inventors: Chien-Hua Lai, Ching-Chang Chen, Shih-Hao Kuo, Tsu-Hui Yang, Hsiu-Jen Wang, Yi-Sheng Liu, Chia-Hung Kao
  • Publication number: 20190229081
    Abstract: Semiconductor devices are provided. The semiconductor device includes a first dielectric layer, a bump, an etching stop layer and a spacer. The first dielectric layer is disposed over and exposes a conductive structure. The bump is partially disposed in the first dielectric layer to electrically connect the conductive structure. The etching stop layer is disposed over the first dielectric layer aside the bump. The spacer surrounds the bump and disposed between the etching stop layer and the bump.
    Type: Application
    Filed: April 2, 2019
    Publication date: July 25, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Cheng-Lung Yang, Chen-Shien Chen, Hon-Lin Huang, Chao-Yi Wang, Ching-Hui Chen, Chien-Hung Kuo
  • Publication number: 20190220742
    Abstract: An accelerator for neural network computing includes hardware engines and a buffer memory. The hardware engines include a convolution engine and at least a second engine. Each hardware engine includes circuitry to perform neural network operations. The buffer memory stores a first input tile and a second input tile of an input feature map. The second input tile overlaps with the first input tile in the buffer memory. The convolution engine is operative to retrieve the first input tile from the buffer memory, perform convolution operations on the first input tile to generate an intermediate tile of an intermediate feature map, and pass the intermediate tile to the second engine via the buffer memory.
    Type: Application
    Filed: January 14, 2019
    Publication date: July 18, 2019
    Inventors: Yu-Ting Kuo, Chien-Hung Lin, Shao-Yu Wang, ShengJe Hung, Meng-Hsuan Cheng, Chi-Ta Wu, Henrry Andrian, Yi-Siou Chen, Tai-Lung Chen
  • Patent number: 10319695
    Abstract: A semiconductor device includes a semiconductor substrate. A pad region is disposed on the semiconductor substrate. A micro bump is disposed on the pad region. The micro bump has a first portion on the pad region and a second portion on the first portion. The first portion and the second portion have different widths. The first portion has a first width and the second portion has a second width. The first width is larger or smaller than the second width. The micro bump includes nickel and gold. The semiconductor device also includes a passivation layer overlying a portion of the pad region.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: June 11, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu Wu, Ching-Hui Chen, Mirng-Ji Lii, Kai-Di Wu, Chien-Hung Kuo, Chao-Yi Wang, Hon-Lin Huang, Zi-Zhong Wang, Chun-Mao Chiu
  • Publication number: 20190165148
    Abstract: A semiconductor device and method for making the semiconductor device comprising a flash memory cell is provided. In accordance with some embodiments, the method includes: patterning a first gate material layer and a gate insulating film over a substrate, the first gate material layer comprising a first gate material, the gate insulating film disposed on the first gate material layer; forming a second gate material layer over the substrate, the gate insulating film, and side walls of the first gate material layer, the second gate material layer comprising a second gate material; etching the second gate material layer to expose the substrate and the gate insulating film and provide a portion of the second gate material layer along each of the side walls of the first gate material layer; and etching the gate insulating film and the first gate material layer so as to form a plurality of gate structures.
    Type: Application
    Filed: July 11, 2018
    Publication date: May 30, 2019
    Inventors: Chien-Hung Lin, Chun-Chieh Mo, Shih-Chi Kuo
  • Patent number: 10276528
    Abstract: A semiconductor device and a manufacturing method for the semiconductor device are provided. The semiconductor device includes a first dielectric layer, a bump, an etching stop layer and a spacer. The first dielectric layer is disposed over and exposes a conductive structure. The bump is partially disposed in the first dielectric layer to electrically connect the conductive structure. The etching stop layer is disposed over the first dielectric layer aside the bump a spacer and surrounds the bump and disposed between the etching stop layer and the bump.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Cheng-Lung Yang, Chen-Shien Chen, Hon-Lin Huang, Chao-Yi Wang, Ching-Hui Chen, Chien-Hung Kuo
  • Publication number: 20190027452
    Abstract: A semiconductor device and a manufacturing method for the semiconductor device are provided. The semiconductor device includes a first dielectric layer, a bump, an etching stop layer and a spacer. The first dielectric layer is disposed over and exposes a conductive structure. The bump is partially disposed in the first dielectric layer to electrically connect the conductive structure. The etching stop layer is disposed over the first dielectric layer aside the bump a spacer and surrounds the bump and disposed between the etching stop layer and the bump.
    Type: Application
    Filed: July 18, 2017
    Publication date: January 24, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Cheng-Lung Yang, Chen-Shien Chen, Hon-Lin Huang, Chao-Yi Wang, Ching-Hui Chen, Chien-Hung Kuo
  • Publication number: 20190006303
    Abstract: A semiconductor device includes a semiconductor substrate. A pad region is disposed on the semiconductor substrate. A micro bump is disposed on the pad region. The micro bump has a first portion on the pad region and a second portion on the first portion. The first portion and the second portion have different widths. The first portion has a first width and the second portion has a second width. The first width is larger or smaller than the second width. The micro bump includes nickel and gold. The semiconductor device also includes a passivation layer overlying a portion of the pad region.
    Type: Application
    Filed: September 26, 2017
    Publication date: January 3, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu WU, Ching-Hui CHEN, Mirng-Ji LII, Kai-Di WU, Chien-Hung KUO, Chao-Yi WANG, Hon-Lin HUANG, Zi-Zhong WANG, Chun-Mao CHIU
  • Patent number: 10163842
    Abstract: A semiconductor structure includes an interconnect structure, at least one first metal pad, at least one second metal pad, at least one first bump, at least one second bump, at least one photosensitive material, and a bonding layer. The first metal pad and the second metal pad are disposed on and electrically connected to the interconnect structure. The first bump is disposed on the first metal pad. The second bump is disposed on the second metal pad. The photosensitive material is disposed on the first bump. The bonding layer is in contact with the photosensitive material and the second bump. The photosensitive material is disposed between the first bump and the bonding layer.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: December 25, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Hung Kuo, Chin-Yu Ku, Yuh-Sen Chang, Hon-Lin Huang, Sheng-Yu Wu, Ching-Hui Chen, Mirng-Ji Lii
  • Publication number: 20180301430
    Abstract: A semiconductor structure includes an interconnect structure, at least one first metal pad, at least one second metal pad, at least one first bump, at least one second bump, at least one photosensitive material, and a bonding layer. The first metal pad and the second metal pad are disposed on and electrically connected to the interconnect structure. The first bump is disposed on the first metal pad. The second bump is disposed on the second metal pad. The photosensitive material is disposed on the first bump. The bonding layer is in contact with the photosensitive material and the second bump. The photosensitive material is disposed between the first bump and the bonding layer.
    Type: Application
    Filed: April 18, 2017
    Publication date: October 18, 2018
    Inventors: Chien-Hung Kuo, Chin-Yu Ku, Yuh-Sen Chang, Hon-Lin Huang, Sheng-Yu Wu, Ching-Hui Chen, Mirng-Ji LII
  • Patent number: 9265344
    Abstract: An adjusting device includes a fixed member; first and second plates, both connected to the fixed member; a first adjusting member; and a first locking member. The fixed member has a first hole and a window. The second plate has first and second contact portions. The first adjusting member has an adjusting portion contacting against the second contact portion and has an eccentric portion extending through the window and movably connected to the first plate. The first locking member partially extends through the first contact portion and the first hole to connect with the first plate. The second plate can be displaced relative to the fixed member in response to displacement of the first adjusting member.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: February 23, 2016
    Assignees: King Slide Works Co., Ltd., King Slide Technology Co., Ltd.
    Inventors: Ken-Ching Chen, Shih-Lung Huang, Chien-Hung Kuo, Chun-Chiang Wang
  • Patent number: 9237804
    Abstract: A drawer slide rail assembly includes movably connected first and second rails, a movable member, a supporting member, and an adjusting member. The movable member has a mounting hole corresponding to a mounting portion of the second rail and is linearly movably mounted to the second rail via the supporting member. The adjusting member includes a cam with an eccentric shaft. The cam at least partially presses against the movable member. The shaft extends through the movable member and is connected to the second rail. The second rail can be mounted to a drawer via a connector which also connects the movable member and the second rail. The drawer is adjustable in position relative to the second rail by the adjusting member.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: January 19, 2016
    Assignees: King Slide Works Co., Ltd., King Slide Technology Co., Ltd.
    Inventors: Ken-Ching Chen, Shih-Lung Huang, Chien-Hung Kuo, Chun-Chiang Wang
  • Publication number: 20150374126
    Abstract: A drawer slide rail assembly includes movably connected first and second rails, a movable member, a supporting member, and an adjusting member. The movable member has a mounting hole corresponding to a mounting portion of the second rail and is linearly movably mounted to the second rail via the supporting member. The adjusting member includes a cam with an eccentric shaft. The cam at least partially presses against the movable member. The shaft extends through the movable member and is connected to the second rail. The second rail can be mounted to a drawer via a connecter which also connects the movable member and the second rail. The drawer is adjustable in position relative to the second rail by the adjusting member.
    Type: Application
    Filed: June 25, 2014
    Publication date: December 31, 2015
    Inventors: KEN-CHING CHEN, SHIH-LUNG HUANG, CHIEN-HUNG KUO, CHUN-CHIANG WANG
  • Patent number: 9185976
    Abstract: An adjusting device includes a fixed member; first and second plates, both connected to the fixed member; a first adjusting member; and a first locking member. The fixed member has a first hole and a window. The second plate has first and second contact portions. The first adjusting member has an adjusting portion contacting against the second contact portion and has an eccentric portion extending through the window and movably connected to the first plate. The first locking member partially extends through the first contact portion and the first hole to connect with the first plate. The second plate can be displaced relative to the fixed member in response to displacement of the first adjusting member.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: November 17, 2015
    Assignees: King Slide Works Co., Ltd., King Slide Technology Co., Ltd.
    Inventors: Ken-Ching Chen, Shih-Lung Huang, Chien-Hung Kuo, Chun-Chiang Wang
  • Publication number: 20150320211
    Abstract: An adjusting device includes a fixed member; first and second plates, both connected to the fixed member; a first adjusting member; and a first locking member. The fixed member has a first hole and a window. The second plate has first and second contact portions. The first adjusting member has an adjusting portion contacting against the second contact portion and has an eccentric portion extending through the window and movably connected to the first plate. The first locking member partially extends through the first contact portion and the first hole to connect with the first plate. The second plate can be displaced relative to the fixed member in response to displacement of the first adjusting member.
    Type: Application
    Filed: July 20, 2015
    Publication date: November 12, 2015
    Inventors: KEN-CHING CHEN, SHIH-LUNG HUANG, CHIEN-HUNG KUO, CHUN-CHIANG WANG