Patents by Inventor Chih-Chiang Chang

Chih-Chiang Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220271171
    Abstract: A method for manufacturing a nanosheet semiconductor device includes forming a poly gate on a nanosheet stack which includes at least one first nanosheet and at least one second nanosheet alternating with the at least one first nanosheet; recessing the nanosheet stack to form a source/drain recess proximate to the poly gate; forming an inner spacer laterally covering the at least one first nanosheet; and selectively etching the at least one second nanosheet.
    Type: Application
    Filed: February 24, 2021
    Publication date: August 25, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Chang SU, Yan-Ting LIN, Chien-Wei LEE, Bang-Ting YAN, Chih Teng HSU, Chih-Chiang CHANG, Chien-I KUO, Chii-Horng LI, Yee-Chia YEO
  • Publication number: 20220238429
    Abstract: A semiconductor device includes an active region over a substrate extending along a first lateral direction. The semiconductor device includes a number of first conductive structures operatively coupled to the active region. The first conductive structures extend along a second lateral direction. The semiconductor device includes a number of second conductive structures disposed above the plurality of first conductive structures. The second conductive structures extend along the first lateral direction. The semiconductor device includes a first capacitor having a first electrode and a second electrode. The first electrode includes one of the first conductive structures and the active region, and the second electrode includes a first one of the second conductive structures. Each of the active region and the first conductive structures is electrically coupled to a power rail structure configured to carry a supply voltage.
    Type: Application
    Filed: November 22, 2021
    Publication date: July 28, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ting Lu, Chih-Chiang Chang, Chung-Chieh Yang, Yung-Chow Peng
  • Patent number: 11391988
    Abstract: A light source module includes a back plate and light-emitting units. The back plate includes a bottom plate and a sidewall. An included angle is formed between an outer side surface of the sidewall and a horizontal plane where the bottom plate is located, and the included angle is an acute angle. An optical distance is defined between a top end of the sidewall and the horizontal plane. The light-emitting units are arranged in the back plate. The light-emitting units which are closest to the sidewall are defined as target light-emitting units, and each of the target light-emitting units has a radiation angle, and each of the target light-emitting units is separated from the sidewall by a distance. The first horizontal distance is determined by a tangent function of a complementary angle of the radiation angle, the second horizontal distance is determined by a tangent function of the included angle.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: July 19, 2022
    Assignees: Radiant Opto-Electronics (Suzhou) Co., Ltd., Radiant Opto-Electronics Corporation
    Inventors: Chang-Yao Chen, Chih-Chiang Chang, Ya-Yin Tsai
  • Publication number: 20220158006
    Abstract: Disclosed are devices for optical sensing and manufacturing method thereof. In one embodiment, a device for optical sensing includes a substrate, a photodetector and a reflector. The photodetector is disposed in the substrate. The reflector is disposed in the substrate and spaced apart from the photodetector, wherein the reflector has a reflective surface inclined relative to the photodetector that reflects light transmitted thereto to the photodetector.
    Type: Application
    Filed: November 13, 2020
    Publication date: May 19, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chiang Chang, Chia-Chan Chen
  • Publication number: 20220082621
    Abstract: A device for measuring characteristics of a wafer is provided. The device comprises a first circuit on the wafer and having a first number of parallelly connected oscillators, and a second circuit on the wafer and having the first number of parallelly connected oscillators; wherein a first portion of the second circuit is disconnected from a second portion of the second circuit.
    Type: Application
    Filed: September 12, 2020
    Publication date: March 17, 2022
    Inventors: YUNG-SHUN CHEN, CHIH-CHIANG CHANG, CHUNG-PENG HSIEH, YUNG-CHOW PENG
  • Patent number: 11248758
    Abstract: A surface light source LED device includes a circuit board, at least one power input and at least two LED bar elements, the at least two LED bar elements are arranged in a staggered manner, and each of the LED bar elements includes a plurality of LED bars arranged linearly on the circuit board. Each of the LED bars has a straight strip structure and has a plurality of LED dies of the same type provided inside. The plurality of LED dies is arranged linearly at equal intervals.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: February 15, 2022
    Assignee: EXCELLENCE OPTOELECTRONICS INC.
    Inventors: Wei-Po Shen, Chun-Ming Lai, Chih-Chiang Chang, Wen-Hsing Huang, Tzeng-Guang Tsai, Kuo-Hsin Huang
  • Publication number: 20220029001
    Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.
    Type: Application
    Filed: January 25, 2021
    Publication date: January 27, 2022
    Inventors: Chih-Chiang Chang, Ming-Hua Yu, Li-Li Su
  • Publication number: 20220018503
    Abstract: A surface light source LED device includes a circuit board, at least one power input and at least two LED bar elements, the at least two LED bar elements are arranged in a staggered manner, and each of the LED bar elements includes a plurality of LED bars arranged linearly on the circuit board. Each of the LED bars has a straight strip structure and has a plurality of LED dies of the same type provided inside. The plurality of LED dies is arranged linearly at equal intervals.
    Type: Application
    Filed: September 21, 2020
    Publication date: January 20, 2022
    Inventors: WEI-PO SHEN, CHUN-MING LAI, CHIH-CHIANG CHANG, WEN-HSING HUANG, TZENG-GUANG TSAI, KUO-HSIN HUANG
  • Publication number: 20210382223
    Abstract: A light source module and a method for manufacturing the same, and a backlight module and a display device using the same are provided. The method includes the following steps. A reference light source module is provided. The reference light source module comprises a substrate and plural light-emitting units arranged on the substrate. Then, plural optical trends between every two adjacent light-emitting units are obtained. Then, plural optical ratios between every two adjacent light-emitting units are calculated, in which each of the optical ratios is a ratio of each of the optical trends to a total reference optical trend of the reference light source module. Then, plural target distances are calculated according to the optical ratios and plural initial distances between every two adjacent light-emitting units are adjusted according to the target distances, thereby forming a target light source module.
    Type: Application
    Filed: August 24, 2021
    Publication date: December 9, 2021
    Inventors: Chang-Yao CHEN, Chih-Chiang CHANG, Ya-Yin TSAI
  • Publication number: 20210373059
    Abstract: Systems and methods are described herein for charge-based capacitor measurement. The system includes a first pseudo-inverter circuit and a second pseudo-inverter circuit. The system also includes a control circuit coupled between the first inverter circuit and the second inverter circuit. The control circuit is configured to generate independent and non-overlapping control signals for the first pseudo-inverter circuit and the second pseudo-inverter circuit. A shielding metal is coupled to the first pseudo-inverter circuit, the second pseudo-inverter circuit, and the control circuit. The shielding metal is configured to dissipate parasitic capacitance of at least one of the first pseudo-inverter circuit or the second pseudo-inverter circuit. A device under test is coupled to each of the first inverter circuit and the second inverter circuit.
    Type: Application
    Filed: April 15, 2021
    Publication date: December 2, 2021
    Inventors: Tai-Yi Chen, Chung-Chieh Yang, Chih-Chiang Chang, Chung-Ting Lu
  • Publication number: 20210376820
    Abstract: An oscillation circuit is provided. The oscillation circuit includes a first inverting circuit. The first inverting circuit comprises a first transistor of a first type and a second transistor of the first type, wherein a gate terminal of the first transistor is connected to a gate terminal of the second transistor, and a source terminal of the first transistor is connected to a drain terminal of the second transistor.
    Type: Application
    Filed: September 12, 2020
    Publication date: December 2, 2021
    Inventors: YUNG-SHUN CHEN, CHIH-CHIANG CHANG, YUNG-CHOW PENG
  • Publication number: 20210344334
    Abstract: A digitally controlled delay line (DCDL) includes an input terminal, an output terminal, and a plurality of stages configured to propagate a signal along a first signal path from the input terminal to a selectable return stage of the plurality of stages, and along a second signal path from the return stage of the plurality of stages to the output terminal. Each stage of the plurality of stages includes a first inverter configured to selectively propagate the signal along the first signal path, a second inverter configured to selectively propagate the signal along the second signal path, and a third inverter configured to selectively propagate the signal from the first signal path to the second signal path. Each of the first and third inverters has a tunable selection configuration corresponding to greater than three output states.
    Type: Application
    Filed: July 15, 2021
    Publication date: November 4, 2021
    Inventors: Chung-Peng HSIEH, Chih-Chiang CHANG, Yung-Chow PENG
  • Publication number: 20210275004
    Abstract: A tethered opto-electronic imaging system encapsulated in an optically-transmissible housing capsule/shell and configured to image object space in multiple fields-of-view (FOVs) to form a visually-perceivable representation of the object space in which sub-images representing different FOVs remain co-directional regardless of mutual repositioning of the object and the imaging system. The capsule/shell of the system is a functionally-required portion of the train of optical components that aggregately define and form a lens of the optical imaging system. The tether is devoid of any functional optical channel or element. When different FOVs are supported by the same optical detector, co-directionality of formed sub-images images is achieved due via judicious spatial re-distribution of irradiance of an acquired sub-image to form a transformed sub-image while maintaining aspect ratios of dimensions of corresponding pixels of the acquired and transformed sub-images.
    Type: Application
    Filed: March 3, 2021
    Publication date: September 9, 2021
    Inventors: Bhaskar Banerjee, Brian Scaramella, Richard Pfisterer, Scott Ellis, Andrew Sapozink, Chih-Chiang Chang
  • Publication number: 20210270871
    Abstract: A device includes a control circuit, a scope circuit, and a time-to-current converter. The control circuit is configured to receive a voltage signal from a voltage-controlled oscillator, delay the voltage signal for a delay time to generate a first control signal, and to generate a second control signal according to the first control signal and the voltage signal. The scope circuit is configured to generate a first current signal in response to the second control signal and the voltage signal. The time-to-current converter is configured generate a second current signal according to the first control signal, the voltage signal, a first switch signal, and a test control signal.
    Type: Application
    Filed: May 20, 2021
    Publication date: September 2, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Peng HSIEH, Chih-Chiang CHANG, Chung-Chieh YANG
  • Publication number: 20210263380
    Abstract: A light source module includes a back plate and light-emitting units. The back plate includes a bottom plate and a sidewall. An included angle is formed between an outer side surface of the sidewall and a horizontal plane where the bottom plate is located, and the included angle is an acute angle. An optical distance is defined between a top end of the sidewall and the horizontal plane. The light-emitting units are arranged in the back plate. The light-emitting units which are closest to the sidewall are defined as target light-emitting units, and each of the target light-emitting units has a radiation angle, and each of the target light-emitting units is separated from the sidewall by a distance. The first horizontal distance is determined by a tangent function of a complementary angle of the radiation angle, the second horizontal distance is determined by a tangent function of the included angle.
    Type: Application
    Filed: April 20, 2021
    Publication date: August 26, 2021
    Inventors: Chang-Yao CHEN, Chih-Chiang CHANG, Ya-Yin TSAI
  • Patent number: 11082035
    Abstract: A digitally controlled delay line (DCDL) includes an input terminal, an output terminal, and a plurality of stages configured to propagate a signal along a first signal path from the input terminal to a selectable return stage of the plurality of stages, and along a second signal path from the return stage of the plurality of stages to the output terminal. Each stage of the plurality of stages includes first and second inverters configured to selectively propagate the signal along the first signal path, third and fourth inverters configured to selectively propagate the signal along the second signal path, and a fifth inverter configured to selectively propagate the signal from the first signal path to the second signal path.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: August 3, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Peng Hsieh, Chih-Chiang Chang, Yung-Chow Peng
  • Publication number: 20210224459
    Abstract: An electronic design flow generates an electronic architectural design layout for analog circuitry from a schematic diagram. The electronic design flow assigns analog circuits of the schematic diagram to various categories of analog circuits. The electronic design flow places various analog standard cells corresponding to these categories of analog circuits into analog placement sites assigned to the analog circuits. These analog standard cells have a uniform cell height which allows these analog standard cells to be readily connected or merged to digital standard cells which decreases the area of the electronic architectural design layout. This uniformity in height between these analog standard cells additionally provides a more reliable yield when compared to non-uniform analog standard cells.
    Type: Application
    Filed: December 28, 2020
    Publication date: July 22, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ting LU, Chih-Chiang CHANG, Chung-Peng HSIEH, Chung-Chieh YANG, Yung-Chow PENG, Yung-Shun CHEN, Tai-Yi CHEN, Nai Chen CHENG
  • Patent number: 11035886
    Abstract: A device is disclosed that includes a control circuit and a scope circuit. The control circuit is configured to delay a voltage signal to generate a first control signal. The scope circuit is configured to be operated in one of a first mode and a second mode according to the first control signal. In the first mode, the scope circuit is configured to generate a first current signal indicating amplitudes of the voltage signal, and in the second mode, the scope circuit is configured to stop generating the first current signal.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: June 15, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Peng Hsieh, Chih-Chiang Chang, Chung-Chieh Yang
  • Patent number: 11015790
    Abstract: A slim linear LED lighting device is provided, including: a printed circuit board on which a connecting circuit is provided, at least one power input component, and a plurality of LED Bars. The LED Bar is formed by a plurality of the same kind of LED chips, and has a slim strip-shaped condensing lens structure integrally formed in the LED Bar packaging process by molding process to control the beam angle of the LED Bar and therefore the light distribution of the slim linear LED lighting device. The LED Bar's condensing lens has a small cross-sectional dimension; therefore the effective utilization factor of the light is improved as the slim linear LED lighting device is applied to a linear automotive lamp designed with a thin light blade structure.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: May 25, 2021
    Assignee: EXCELLENCE OPTOELECTRONICS INC.
    Inventors: Yen-Cheng Chen, Sheng-Hua Yang, Hsuan-Jung Tsai, Cheng-Tai Jao, Chih-Chiang Chang
  • Patent number: 10964599
    Abstract: Methods produce integrated circuit structures that include (among other components) fins extending from a first layer, source/drain structures on the fins, source/drain contacts on the source/drain structures, an insulator on the source/drain contacts defining trenches between the source/drain contacts, gate conductors in a lower portion of the trenches adjacent the fins, a first liner material lining a middle portion and an upper portion of the trenches, a fill material in the middle portion of the trenches, and a second material in the upper portion of the trenches. The first liner material is on the gate conductors in the trenches.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: March 30, 2021
    Assignee: GLOBALFOUNDRIES U.S. Inc.
    Inventors: Asli Sirman, Jiehui Shu, Chih-Chiang Chang, Huy Cao, Haigou Huang, Jinping Liu